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Growing up with technology : young children learning in a digital world / / Lydia Plowman, Christine Stephen and Joanna McPake
| Growing up with technology : young children learning in a digital world / / Lydia Plowman, Christine Stephen and Joanna McPake |
| Autore | Plowman Lydia |
| Pubbl/distr/stampa | London ; ; New York : , : Routledge, , 2010 |
| Descrizione fisica | 1 online resource (188 p.) |
| Disciplina | 302.23/1083 |
| Altri autori (Persone) |
McPakeJoanna
StephenChristine |
| Soggetto topico |
Technology and children
Internet and children Digital media Mass media and children Digital electronics |
| ISBN |
1-135-18852-1
1-135-18853-X 1-282-59051-0 9786612590511 0-203-86361-5 |
| Formato | Materiale a stampa  |
| Livello bibliografico | Monografia |
| Lingua di pubblicazione | eng |
| Nota di contenuto |
Book Cover; Title; Copyright; Contents; Figures; Tables; Acknowledgements; Introduction; Chapter 1 Growing up with technology; Chapter 2 The technologization of childhood?; Chapter 3 Young children learning; Chapter 4 Curriculum, pedagogy and technology in preschool; Chapter 5 Support for learning with technology in preschool; Chapter 6 The home as a learning environment; Chapter 7 Learning with technology in the home; Chapter 8 Guided interaction at home and preschool; Chapter 9 Young children learning in a digital age; Conclusion: Starting school; Appendix 1 The research projects
Appendix 2 Guided enquiryAppendix 3 Conducting research with young children; Bibliography; Index |
| Record Nr. | UNINA-9910820944303321 |
Plowman Lydia
|
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| London ; ; New York : , : Routledge, , 2010 | ||
| Materiale a stampa | ||
| Lo trovi qui: Univ. Federico II | ||
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High speed digital design : design of high speed interconnects and signaling / / Hanqiao Zhang, Steve Krooswyk, Jeff Ou
| High speed digital design : design of high speed interconnects and signaling / / Hanqiao Zhang, Steve Krooswyk, Jeff Ou |
| Autore | Zhang Hanqiao |
| Edizione | [First edition.] |
| Pubbl/distr/stampa | Waltham, MA : , : Elsevier, , [2015] |
| Descrizione fisica | 1 online resource (268 p.) |
| Disciplina | 621.398 |
| Soggetto topico |
Digital electronics
Logic design |
| Soggetto genere / forma | Electronic books. |
| ISBN |
0-12-418667-X
0-12-418663-7 |
| Formato | Materiale a stampa |
| Livello bibliografico | Monografia |
| Lingua di pubblicazione | eng |
| Nota di contenuto |
Front Cover; High Speed Digital Design; Copyright Page; Contents; About the Authors/Contributors; 1 Transmission line fundamentals; Basic Electromagnetics; Electromagnetics Field Theory; Maxwell's equations; Ampere's law; Faraday's law; Gauss's law; Gauss's law for magnetism; Propagation of Plane Waves; Uniform plane wave; Uniform plane wave in conductive media; Power flow and the Poynting vector; Transmission Line Theory; Wave Equations on Lossless Transmission Lines; Lossless transmission line; Wave propagation on a lossless transmission line; Incident waves and reflected waves
Impedance, Reflection Coefficient, and Power Flow on a Lossless Transmission LineInput impedance and reflection coefficient; Power flow on a lossless transmission line; Traveling and Standing Waves on a Transmission Line; Traveling waves; Standing waves; Transmission Line Structures; Stripline; Microstrip; Coplanar Waveguides; Novel Transmission Lines; References; 2 PCB design for signal integrity; Differential Signaling; Impedance; Time Domain Analysis; Eye Diagram; Jitter; Jitter components and budget; Jitter amplification example; Frequency Domain Analysis; Spectral Content; Insertion Loss Integrated Insertion Loss NoiseReturn Loss; S11 nulls; Crosstalk; Crosstalk sum; Integrated Crosstalk; Signal-to-Noise Ratio; Stack-Up Design; Impedance Target (Routing Impedance); Optimal routing impedance; PCB Losses; Dielectric Loss; Lower loss dielectrics; Hybrid stackups; Conductor Loss; Surface roughness; Crosstalk Mitigation through StackUp; Stripline dielectric; Solder mask; Dual Stripline; PCB stackup; Angled routing; Parallelism; Densely Broadside Coupled Dual Stripline; Via Stub Mitigation; Impedance optimization; U-turn via; Back-drilling; Blind and buried via PCB Layout OptimizationLength Matching; Fiber Weave Effect; Crosstalk Reduction; Interleaving; Guard trace; Signal-to-ground ratio; Ground placement; Orthogonal placement; Component (vertical to horizontal) cancellation; Non-Ideal Return Path; Power Integrity; Repeaters; Introduction to re-timers; Introduction to re-drivers; Modeling and simulation; PCIe considerations; References; 3 Channel modeling and simulation; Transmission Lines; Causality; Checking for Model Causality; Causal Frequency-Dependent Model; Copper Surface Roughness; Modified Hammerstad model; Huray model; Conductivity Environmental ImpactHumidity; Conductivity; Temperature; Model and simulation; Model Geometries; Stripline structures; Microstrip structures; Corner Models; Iterative corner model; Monte Carlo corner model; Ideal Assumptions: Homogeneous Impedance; Ideal Assumptions: Crosstalk Aggressors; Transmitters; IBIS Models; Spice Voltage Source Model; Linearity test; 3D Modeling; Ports/Terminals; Wave ports; Lumped ports; Model Analysis Settings; Discrete or interpolating solutions; Frequency range and step size; Port order; Normalize result to 50ohms; Plated-Through-Hole Via; Model Techniques Pre-Layout Approximation |
| Record Nr. | UNISA-996426329103316 |
|
Zhang Hanqiao
|
||
| Waltham, MA : , : Elsevier, , [2015] | ||
| Materiale a stampa | ||
| Lo trovi qui: Univ. di Salerno | ||
| ||
High speed digital design : design of high speed interconnects and signaling / / Hanqiao Zhang, Steve Krooswyk, Jeff Ou
| High speed digital design : design of high speed interconnects and signaling / / Hanqiao Zhang, Steve Krooswyk, Jeff Ou |
| Autore | Zhang Hanqiao |
| Edizione | [First edition.] |
| Pubbl/distr/stampa | Waltham, MA : , : Elsevier, , [2015] |
| Descrizione fisica | 1 online resource (268 p.) |
| Disciplina | 621.398 |
| Soggetto topico |
Digital electronics
Logic design |
| ISBN |
0-12-418667-X
0-12-418663-7 |
| Formato | Materiale a stampa |
| Livello bibliografico | Monografia |
| Lingua di pubblicazione | eng |
| Nota di contenuto |
Front Cover; High Speed Digital Design; Copyright Page; Contents; About the Authors/Contributors; 1 Transmission line fundamentals; Basic Electromagnetics; Electromagnetics Field Theory; Maxwell's equations; Ampere's law; Faraday's law; Gauss's law; Gauss's law for magnetism; Propagation of Plane Waves; Uniform plane wave; Uniform plane wave in conductive media; Power flow and the Poynting vector; Transmission Line Theory; Wave Equations on Lossless Transmission Lines; Lossless transmission line; Wave propagation on a lossless transmission line; Incident waves and reflected waves
Impedance, Reflection Coefficient, and Power Flow on a Lossless Transmission LineInput impedance and reflection coefficient; Power flow on a lossless transmission line; Traveling and Standing Waves on a Transmission Line; Traveling waves; Standing waves; Transmission Line Structures; Stripline; Microstrip; Coplanar Waveguides; Novel Transmission Lines; References; 2 PCB design for signal integrity; Differential Signaling; Impedance; Time Domain Analysis; Eye Diagram; Jitter; Jitter components and budget; Jitter amplification example; Frequency Domain Analysis; Spectral Content; Insertion Loss Integrated Insertion Loss NoiseReturn Loss; S11 nulls; Crosstalk; Crosstalk sum; Integrated Crosstalk; Signal-to-Noise Ratio; Stack-Up Design; Impedance Target (Routing Impedance); Optimal routing impedance; PCB Losses; Dielectric Loss; Lower loss dielectrics; Hybrid stackups; Conductor Loss; Surface roughness; Crosstalk Mitigation through StackUp; Stripline dielectric; Solder mask; Dual Stripline; PCB stackup; Angled routing; Parallelism; Densely Broadside Coupled Dual Stripline; Via Stub Mitigation; Impedance optimization; U-turn via; Back-drilling; Blind and buried via PCB Layout OptimizationLength Matching; Fiber Weave Effect; Crosstalk Reduction; Interleaving; Guard trace; Signal-to-ground ratio; Ground placement; Orthogonal placement; Component (vertical to horizontal) cancellation; Non-Ideal Return Path; Power Integrity; Repeaters; Introduction to re-timers; Introduction to re-drivers; Modeling and simulation; PCIe considerations; References; 3 Channel modeling and simulation; Transmission Lines; Causality; Checking for Model Causality; Causal Frequency-Dependent Model; Copper Surface Roughness; Modified Hammerstad model; Huray model; Conductivity Environmental ImpactHumidity; Conductivity; Temperature; Model and simulation; Model Geometries; Stripline structures; Microstrip structures; Corner Models; Iterative corner model; Monte Carlo corner model; Ideal Assumptions: Homogeneous Impedance; Ideal Assumptions: Crosstalk Aggressors; Transmitters; IBIS Models; Spice Voltage Source Model; Linearity test; 3D Modeling; Ports/Terminals; Wave ports; Lumped ports; Model Analysis Settings; Discrete or interpolating solutions; Frequency range and step size; Port order; Normalize result to 50ohms; Plated-Through-Hole Via; Model Techniques Pre-Layout Approximation |
| Record Nr. | UNINA-9910797582903321 |
|
Zhang Hanqiao
|
||
| Waltham, MA : , : Elsevier, , [2015] | ||
| Materiale a stampa | ||
| Lo trovi qui: Univ. Federico II | ||
| ||
High speed digital design : design of high speed interconnects and signaling / / Hanqiao Zhang, Steve Krooswyk, Jeff Ou
| High speed digital design : design of high speed interconnects and signaling / / Hanqiao Zhang, Steve Krooswyk, Jeff Ou |
| Autore | Zhang Hanqiao |
| Edizione | [First edition.] |
| Pubbl/distr/stampa | Waltham, MA : , : Elsevier, , [2015] |
| Descrizione fisica | 1 online resource (268 p.) |
| Disciplina | 621.398 |
| Soggetto topico |
Digital electronics
Logic design |
| ISBN |
0-12-418667-X
0-12-418663-7 |
| Formato | Materiale a stampa |
| Livello bibliografico | Monografia |
| Lingua di pubblicazione | eng |
| Nota di contenuto |
Front Cover; High Speed Digital Design; Copyright Page; Contents; About the Authors/Contributors; 1 Transmission line fundamentals; Basic Electromagnetics; Electromagnetics Field Theory; Maxwell's equations; Ampere's law; Faraday's law; Gauss's law; Gauss's law for magnetism; Propagation of Plane Waves; Uniform plane wave; Uniform plane wave in conductive media; Power flow and the Poynting vector; Transmission Line Theory; Wave Equations on Lossless Transmission Lines; Lossless transmission line; Wave propagation on a lossless transmission line; Incident waves and reflected waves
Impedance, Reflection Coefficient, and Power Flow on a Lossless Transmission LineInput impedance and reflection coefficient; Power flow on a lossless transmission line; Traveling and Standing Waves on a Transmission Line; Traveling waves; Standing waves; Transmission Line Structures; Stripline; Microstrip; Coplanar Waveguides; Novel Transmission Lines; References; 2 PCB design for signal integrity; Differential Signaling; Impedance; Time Domain Analysis; Eye Diagram; Jitter; Jitter components and budget; Jitter amplification example; Frequency Domain Analysis; Spectral Content; Insertion Loss Integrated Insertion Loss NoiseReturn Loss; S11 nulls; Crosstalk; Crosstalk sum; Integrated Crosstalk; Signal-to-Noise Ratio; Stack-Up Design; Impedance Target (Routing Impedance); Optimal routing impedance; PCB Losses; Dielectric Loss; Lower loss dielectrics; Hybrid stackups; Conductor Loss; Surface roughness; Crosstalk Mitigation through StackUp; Stripline dielectric; Solder mask; Dual Stripline; PCB stackup; Angled routing; Parallelism; Densely Broadside Coupled Dual Stripline; Via Stub Mitigation; Impedance optimization; U-turn via; Back-drilling; Blind and buried via PCB Layout OptimizationLength Matching; Fiber Weave Effect; Crosstalk Reduction; Interleaving; Guard trace; Signal-to-ground ratio; Ground placement; Orthogonal placement; Component (vertical to horizontal) cancellation; Non-Ideal Return Path; Power Integrity; Repeaters; Introduction to re-timers; Introduction to re-drivers; Modeling and simulation; PCIe considerations; References; 3 Channel modeling and simulation; Transmission Lines; Causality; Checking for Model Causality; Causal Frequency-Dependent Model; Copper Surface Roughness; Modified Hammerstad model; Huray model; Conductivity Environmental ImpactHumidity; Conductivity; Temperature; Model and simulation; Model Geometries; Stripline structures; Microstrip structures; Corner Models; Iterative corner model; Monte Carlo corner model; Ideal Assumptions: Homogeneous Impedance; Ideal Assumptions: Crosstalk Aggressors; Transmitters; IBIS Models; Spice Voltage Source Model; Linearity test; 3D Modeling; Ports/Terminals; Wave ports; Lumped ports; Model Analysis Settings; Discrete or interpolating solutions; Frequency range and step size; Port order; Normalize result to 50ohms; Plated-Through-Hole Via; Model Techniques Pre-Layout Approximation |
| Record Nr. | UNINA-9910825865203321 |
|
Zhang Hanqiao
|
||
| Waltham, MA : , : Elsevier, , [2015] | ||
| Materiale a stampa | ||
| Lo trovi qui: Univ. Federico II | ||
| ||
High-speed digital design : a handbook of black magic / Howard W. Johnson, Martin Graham
| High-speed digital design : a handbook of black magic / Howard W. Johnson, Martin Graham |
| Autore | Johnson, Howard W. |
| Pubbl/distr/stampa | Englewood Cliffs, N.J. : Prentice Hall, c1993 |
| Descrizione fisica | xi, 447 p. : ill. ; 25 cm |
| Disciplina | 621.381 |
| Altri autori (Persone) | Graham, Martinauthor |
| Soggetto topico |
Digital electronics
Logic design |
| ISBN | 0133957241 |
| Classificazione |
LC TK7868.D5
621.3.1 |
| Formato | Materiale a stampa |
| Livello bibliografico | Monografia |
| Lingua di pubblicazione | eng |
| Record Nr. | UNISALENTO-991001883889707536 |
|
Johnson, Howard W.
|
||
| Englewood Cliffs, N.J. : Prentice Hall, c1993 | ||
| Materiale a stampa | ||
| Lo trovi qui: Univ. del Salento | ||
| ||
IEC/IEEE international . Part 2 : standard digital interface for programmable instrumentation : dodes, formats, protocols and common commands / / Institute of Electrical and Electronics Engineers
| IEC/IEEE international . Part 2 : standard digital interface for programmable instrumentation : dodes, formats, protocols and common commands / / Institute of Electrical and Electronics Engineers |
| Pubbl/distr/stampa | New York, New York : , : IEEE, , 2004 |
| Descrizione fisica | 1 online resource |
| Disciplina | 629.8 |
| Soggetto topico |
Digital control systems
Digital electronics Computer input-output equipment |
| ISBN | 0-7381-4100-3 |
| Formato | Materiale a stampa |
| Livello bibliografico | Monografia |
| Lingua di pubblicazione | eng |
| Altri titoli varianti | 60488-2-2004 - IEC/IEEE International - Standard Digital Interface for Programmable Instrumentation - Part 2 |
| Record Nr. | UNINA-9910347939003321 |
| New York, New York : , : IEEE, , 2004 | ||
| Materiale a stampa | ||
| Lo trovi qui: Univ. Federico II | ||
| ||
IEC/IEEE international . Part 2 : standard digital interface for programmable instrumentation : dodes, formats, protocols and common commands / / Institute of Electrical and Electronics Engineers
| IEC/IEEE international . Part 2 : standard digital interface for programmable instrumentation : dodes, formats, protocols and common commands / / Institute of Electrical and Electronics Engineers |
| Pubbl/distr/stampa | New York, New York : , : IEEE, , 2004 |
| Descrizione fisica | 1 online resource |
| Disciplina | 629.8 |
| Soggetto topico |
Digital control systems
Digital electronics Computer input-output equipment |
| ISBN | 0-7381-4100-3 |
| Formato | Materiale a stampa |
| Livello bibliografico | Monografia |
| Lingua di pubblicazione | eng |
| Altri titoli varianti | 60488-2-2004 - IEC/IEEE International - Standard Digital Interface for Programmable Instrumentation - Part 2 |
| Record Nr. | UNISA-996577836403316 |
| New York, New York : , : IEEE, , 2004 | ||
| Materiale a stampa | ||
| Lo trovi qui: Univ. di Salerno | ||
| ||
IEC/IEEE international standard . Part 1 : higher performance protocol for the standard digital interface for programmable instrumentation : General / / Institute of Electrical and Electronics Engineers
| IEC/IEEE international standard . Part 1 : higher performance protocol for the standard digital interface for programmable instrumentation : General / / Institute of Electrical and Electronics Engineers |
| Pubbl/distr/stampa | New York, New York : , : IEEE, , 2004 |
| Descrizione fisica | 1 online resource |
| Disciplina | 629.8 |
| Soggetto topico |
Digital control systems
Digital electronics |
| ISBN | 0-7381-4536-X |
| Formato | Materiale a stampa |
| Livello bibliografico | Monografia |
| Lingua di pubblicazione | eng |
| Altri titoli varianti | 60488-1-2004 - IEC/IEEE International Standard - Higher Performance Protocol for the Standard Digital Interface for Programmable Instrumentation - Part 1 |
| Record Nr. | UNINA-9910347939103321 |
| New York, New York : , : IEEE, , 2004 | ||
| Materiale a stampa | ||
| Lo trovi qui: Univ. Federico II | ||
| ||
IEC/IEEE international standard . Part 1 : higher performance protocol for the standard digital interface for programmable instrumentation : General / / Institute of Electrical and Electronics Engineers
| IEC/IEEE international standard . Part 1 : higher performance protocol for the standard digital interface for programmable instrumentation : General / / Institute of Electrical and Electronics Engineers |
| Pubbl/distr/stampa | New York, New York : , : IEEE, , 2004 |
| Descrizione fisica | 1 online resource |
| Disciplina | 629.8 |
| Soggetto topico |
Digital control systems
Digital electronics |
| ISBN | 0-7381-4536-X |
| Formato | Materiale a stampa |
| Livello bibliografico | Monografia |
| Lingua di pubblicazione | eng |
| Altri titoli varianti | 60488-1-2004 - IEC/IEEE International Standard - Higher Performance Protocol for the Standard Digital Interface for Programmable Instrumentation - Part 1 |
| Record Nr. | UNISA-996577836803316 |
| New York, New York : , : IEEE, , 2004 | ||
| Materiale a stampa | ||
| Lo trovi qui: Univ. di Salerno | ||
| ||
IEE proceedings Computers and digital techniques
| IEE proceedings Computers and digital techniques |
| Pubbl/distr/stampa | Stevenage, Herts., : Institution of Electrical Engineers, 1994-2006 |
| Soggetto topico |
Digital electronics
Computers Électronique numérique Ordinateurs Ordinateur Périodique électronique (Descripteur de forme) Ressource Internet (Descripteur de forme) |
| Soggetto genere / forma | Periodicals. |
| ISSN | 1359-7027 |
| Formato | Materiale a stampa |
| Livello bibliografico | Periodico |
| Lingua di pubblicazione | eng |
| Record Nr. | UNISA-996204071203316 |
| Stevenage, Herts., : Institution of Electrical Engineers, 1994-2006 | ||
| Materiale a stampa | ||
| Lo trovi qui: Univ. di Salerno | ||
| ||
Soggetto topico
-
Digital electronics
(233)
- Computer architecture (29)
- Engineering & Applied Sciences (24)
- System design (22)
- Logic design (21)