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Digital fundamentals / / Thomas Floyd
Digital fundamentals / / Thomas Floyd
Autore Floyd Thomas L.
Edizione [Eleventh global edition.]
Pubbl/distr/stampa Boston : , : Pearson, , 2015
Descrizione fisica 1 online resource (952 pages) : illustrations
Disciplina 621.381
Collana Always learning
Soggetto topico Digital electronics
Logic circuits
ISBN 1-292-23879-8
1-292-07599-6
Formato Materiale a stampa
Livello bibliografico Monografia
Lingua di pubblicazione eng
Nota di contenuto Chapter 1 Introductory Concepts -- 1-1 Digital and Analog Quantities -- 1-2 Binary Digits, Logic Levels, and Digital Waveforms -- 1-3 Basic Logic Functions -- 1-4 Combinational and Sequential Logic Functions -- 1-5 Introduction to Programmable Logic -- 1-6 Fixed-Function Logic Devices -- 1-7 Test and Measurement Instruments -- 1-8 Introduction to Troubleshooting -- Chapter 2 Number Systems, Operations, and Codes -- 2-1 Decimal Numbers -- 2-2 Binary Numbers -- 2-3 Decimal-to-Binary Conversion -- 2-4 Binary Arithmetic -- 2-5 Complements of Binary Numbers -- 2-6 Signed Numbers -- 2-7 Arithmetic Operations with Signed Numbers -- 2-8 Hexadecimal Numbers -- 2-9 Octal Numbers -- 2-10 Binary Coded Decimal (BCD) -- 2-11 Digital Codes -- 2-12 Error Codes -- Chapter 3 Logic Gates -- 3-1 The Inverter -- 3-2 The AND Gate -- 3-3 The OR Gate -- 3-4 The NAND Gate -- 3-5 The NOR Gate -- 3-6 The Exclusive-OR and Exclusive-NOR Gates -- 3-7 Programmable Logic -- 3-8 Fixed-Function Logic Gates -- 3-9 Troubleshooting -- Chapter 4 Boolean Algebra and Logic Simplification -- 4-1 Boolean Operations and Expressions -- 4-2 Laws and Rules of Boolean Algebra -- 4-3 DeMorgan's Theorems -- 4-4 Boolean Analysis of Logic Circuits -- 4-5 Logic Simplification Using Boolean Algebra -- 4-6 Standard Forms of Boolean Expressions -- 4-7 Boolean Expressions and Truth Tables -- 4-8 The Karnaugh Map -- 4-9 Karnaugh Map SOP Minimization -- 4-10 Karnaugh Map POS Minimization -- 4-11 The Quine-McCluskey Method -- 4-12 Boolean Expressions with VHDL -- Applied Logic -- Chapter 5 Combinational Logic Analysis -- 5-1 Basic Combinational Logic Circuits -- 5-2 Implementing Combinational Logic -- 5-3 The Universal Property of NAND and NOR Gates -- 5-4 Combinational Logic Using NAND and NOR Gates -- 5-5 Pulse Waveform Operation -- 5-6 Combinational Logic with VHDL -- 5-7 Troubleshooting -- Applied Logic -- Chapter 6 Functions of Combinational Logic -- 6-1 Half and Full Adders -- 6-2 Parallel Binary Adders -- 6-3 Ripple Carry and Look-Ahead Carry Adders -- 6-4 Comparators -- 6-5 Decoders -- 6-6 Encoders -- 6-7 Code Converters -- 6-8 Multiplexers (Data Selectors) -- 6-9 Demultiplexers -- 6-10 Parity Generators/Checkers -- 6-11 Troubleshooting -- Applied Logic -- Chapter 7 Latches, Flip-Flops, and Timers -- 7-1 Latches -- 7-2 Flip-Flops -- 7-3 Flip-Flop Operating Characteristics -- 7-4 Flip-Flop Applications -- 7-5 One-Shots -- 7-6 The Astable Multivibrator -- 7-7 Troubleshooting -- Applied Logic -- Chapter 8 Shift Registers -- 8-1 Shift Register Operations -- 8-2 Types of Shift Register Data I/Os -- 8-3 Bidirectional Shift Registers -- 8-4 Shift Register Counters -- 8-5 Shift Register Applications -- 8-6 Logic Symbols with Dependency Notation -- 8-7 Troubleshooting -- Applied Logic -- Chapter 9 Counters -- 9-1 Finite State Machines -- 9-2 Asynchronous Counters -- 9-3 Synchronous Counters -- 9-4 Up/Down Synchronous Counters -- 9-5 Design of Synchronous Counters -- 9-6 Cascaded Counters -- 9-7 Counter Decoding -- 9-8 Counter Applications -- 9-9 Logic Symbols with Dependency Notation -- 9-10 Troubleshooting -- Applied Logic -- Chapter 10 Programmable Logic -- 10-1 Simple Programmable Logic Devices (SPLDs) -- 10-2 Complex Programmable Logic Devices (CPLDs) -- 10-3 Macrocell Modes -- 10-4 Field-Programmable Gate Arrays (FPGAs) -- 10-5 Programmable Logic Software -- 10-6 Boundary Scan Logic -- 10-7 Troubleshooting -- Applied Logic -- Chapter 11 Data Storage -- 11-1 Semiconductor Memory Basics -- 11-2 The Random-Access Memory (RAM) -- 11-3 The Read-Only Memory (ROM) -- 11-4 Programmable ROMs -- 11-5 The Flash Memory -- 11-6 Memory Expansion -- 11-7 Special Types of Memories -- 11-8 Magnetic and Optical Storage -- 11-9 Memory Hierarchy -- 11-10 Cloud Storage -- 11-11 Troubleshooting -- Chapter 12 Signal Conversion and Processing -- 12-1 Analog-to-Digital Conversion -- 12-2 Methods of Analog-to-Digital Conversion -- 12-3 Methods of Digital-to-Analog Conversion -- 12-4 Digital Signal Processing -- 12-5 The Digital Signal Processor (DSP) -- Chapter 13 Data transmission -- 13-1 Data Transmission Media -- 13-2 Methods and Modes of Data Transmission -- 13-3 Modulation of Analog Signals with Digital Data -- 13-4 Modulation of Digital Signals with Analog Data -- 13-5 Multiplexing and Demultiplexing -- 13-6 Bus Basics -- 13-7 Parallel Buses -- 13-8 The Universal Serial Bus (USB) -- 13-9 Other Serial Buses -- 13-10 Bus Interfacing -- Chapter 14 Data Processing and Control -- 14-1 The Computer System -- 14-2 Practical Computer System Considerations -- 14-3 The Processor: Basic Operation -- 14-4 The Processor: Addressing Modes -- 14-5 The Processor: Special Operations -- 14-6 Operating Systems and Hardware -- 14-7 Programming -- 14-8 Microcontrollers and Embedded Systems -- 14-9 System on Chip (SoC) -- Chapter 15 Integrated Circuit Technologies -- 15-1 Basic Operational Characteristics and Parameters -- 15-2 CMOS Circuits -- 15-3 TTL (Bipolar) Circuits -- 15-4 Practical Considerations in the Use of TTL -- 15-5 Comparison of CMOS and TTL Performance -- 15-6 Emitter-Coupled Logic (ECL) Circuits -- 15-7 PMOS, NMOS, and E2CMOS.
Record Nr. UNINA-9910154773503321
Floyd Thomas L.  
Boston : , : Pearson, , 2015
Materiale a stampa
Lo trovi qui: Univ. Federico II
Opac: Controlla la disponibilità qui
Digital fundamentals : a systems approach / / Thomas L. Floyd
Digital fundamentals : a systems approach / / Thomas L. Floyd
Autore Floyd Thomas L.
Edizione [First, Pearson new international edition.]
Pubbl/distr/stampa Harlow, England : , : Pearson, , [2014]
Descrizione fisica 1 online resource (577 pages) : illustrations
Disciplina 621.381
Collana Always Learning
Soggetto topico Digital electronics
ISBN 1-292-12545-4
1-292-05296-1
Formato Materiale a stampa
Livello bibliografico Monografia
Lingua di pubblicazione eng
Nota di contenuto Cover -- Table of Contents -- 1. Introduction to Digital Systems -- 2. Number Systems, Operations, and Codes -- 3. Logic Gates and Gate Combinations -- 4. Combinational Logic -- 5. Functions of Combinational Logic -- 6. Latches, Flip-Flops, and Timers -- 7. Shift Registers -- 8. Counters -- 9. Memory and Storage -- Appendix: Conversions -- Appendix: Programs for Security and System Components -- Glossary -- Index -- 4 -- 5 -- 8.
Record Nr. UNINA-9910153086703321
Floyd Thomas L.  
Harlow, England : , : Pearson, , [2014]
Materiale a stampa
Lo trovi qui: Univ. Federico II
Opac: Controlla la disponibilità qui
Digital logic design [[electronic resource] /] / B. Holdsworth and R.C. Woods
Digital logic design [[electronic resource] /] / B. Holdsworth and R.C. Woods
Autore Holdsworth B (Brian)
Edizione [4th ed.]
Pubbl/distr/stampa Oxford, : Newnes, 2002
Descrizione fisica 1 online resource (535 p.)
Disciplina 321.395
Altri autori (Persone) WoodsR. C (R. Clive)
Soggetto topico Logic design
Digital electronics
Soggetto genere / forma Electronic books.
ISBN 1-281-22270-4
9786611222703
0-08-047730-5
Formato Materiale a stampa
Livello bibliografico Monografia
Lingua di pubblicazione eng
Nota di contenuto Front Cover; Digital Logic Design; Copyright Page; Contents; Preface to the fourth edition; Acknowledgments; Chapter 1. Number systems and codes; 1.1 Introduction; 1.2 Number systems; 1.3 Conversion between number systems; 1.4 Binary addition and subtraction; 1.5 Signed arithmetic; 1.6 Complement arithmetic; 1.7 Complement representation for binary numbers; 1.8 The vlidity of 1's and 2's complement arithmetic; 1.9 Offset binary representation; 1.10 Addition and subtraction of 2's complement numbrs; 1.11 Graphical interpretation of 2's complemnt representation
1.12 Addition and subtraction of 1's complement numbers1.13 Multiplication of unsigned binary numbers; 1.14 Multiplication of signed binary numbers; 1.15 Binary division; 1.16 Floating point arithmetic; 1.17 Binary codes for decimal digits; 1.18 n-cubes and distance; 1.19 Error detection and correction; 1.20 The Hamming code; 1.21 Gray code; 1.22 The ASCII code; Chapter 2. Boolean algebra; 2.1 Introduction; 2.2 Boolean algebra; 2.3 Derived Boolean operations; 2.4 Boolean functions; 2.5 Truth tables; 2.6 The logic o a switch; 2.7 The switch implementation of the AND function
2.8 The switch implementation of the OR function2.9 The gating function of the AND and OR gates; 2.10 The inversion function; 2.11 Gate or switch imlementation of a Boolean function; 2.12 The Boolean theorems; 2.13 Complete sets; 2.14 The exclusive-OR (XOR) function; 2.15 The Reed-Muller equation; 2.16 Set theory and the Venn diagram; Chapter 3. Karnaugh maps and function simplification; 3.1 Introduction; 3.2 Minterms and maxterms; 3.3 Canonical forms; 3.4 Boolean functions of two variables; 3.5 The Karnaugh map; 3.6 Poltting Boolean functions on a Karnaugh map
3.7 Maxterms on the Karnaugh map3.8 Simplificaion of Boolean functions; 3.9 The inverse function; 3.10 'Don't care' terms; 3.11 Simplification of products of maxterms; 3.12 The Quine-McCluskey tablar simplification method; 3.13 Properties of prime implicant tables; 3.14 Cyclic prime implicant tables; 3.15 Semi-cyclic prime implicant tables; 3.16 Quine-McCluskey simplification of functions containing 'don't care' terms; 3.17 Decimal approach to Quine-McCluskey simplification of Boolean functions; 3.18 Multiple output circuits; 3.19 Tabular methods for multiple output functions
3.20 Reduced dimension maps3.21 Plotting RDMs from truth tables; 3.22 Reading RDM functions; 3.23 Looping rules for RDMs; 3.24 Criteria for minimisation; Chapter 4. Combinational logic design principles; 4.1 Introduction; 4.2 The NAND function; 4.3 NAND logic implementation of AND and OR functions; 4.4 NAND logic implementation of sums-of-products; 4.5 The NOR function; 4.6 NOR logic implementation of AND and OR functions; 4.7 NOR logic implementation of products-of-sums; 4.8 NOR logic implementation of sums-of-products; 4.9 Bookean algebraic analysis of NAND and NOR networks
4.10 Symbolic circuit analysis for NAND and NOR networks
Record Nr. UNINA-9910457332303321
Holdsworth B (Brian)  
Oxford, : Newnes, 2002
Materiale a stampa
Lo trovi qui: Univ. Federico II
Opac: Controlla la disponibilità qui
Digital logic design [[electronic resource] /] / B. Holdsworth and R.C. Woods
Digital logic design [[electronic resource] /] / B. Holdsworth and R.C. Woods
Autore Holdsworth B (Brian)
Edizione [4th ed.]
Pubbl/distr/stampa Oxford, : Newnes, 2002
Descrizione fisica 1 online resource (535 p.)
Disciplina 321.395
Altri autori (Persone) WoodsR. C (R. Clive)
Soggetto topico Logic design
Digital electronics
ISBN 1-281-22270-4
9786611222703
0-08-047730-5
Formato Materiale a stampa
Livello bibliografico Monografia
Lingua di pubblicazione eng
Nota di contenuto Front Cover; Digital Logic Design; Copyright Page; Contents; Preface to the fourth edition; Acknowledgments; Chapter 1. Number systems and codes; 1.1 Introduction; 1.2 Number systems; 1.3 Conversion between number systems; 1.4 Binary addition and subtraction; 1.5 Signed arithmetic; 1.6 Complement arithmetic; 1.7 Complement representation for binary numbers; 1.8 The vlidity of 1's and 2's complement arithmetic; 1.9 Offset binary representation; 1.10 Addition and subtraction of 2's complement numbrs; 1.11 Graphical interpretation of 2's complemnt representation
1.12 Addition and subtraction of 1's complement numbers1.13 Multiplication of unsigned binary numbers; 1.14 Multiplication of signed binary numbers; 1.15 Binary division; 1.16 Floating point arithmetic; 1.17 Binary codes for decimal digits; 1.18 n-cubes and distance; 1.19 Error detection and correction; 1.20 The Hamming code; 1.21 Gray code; 1.22 The ASCII code; Chapter 2. Boolean algebra; 2.1 Introduction; 2.2 Boolean algebra; 2.3 Derived Boolean operations; 2.4 Boolean functions; 2.5 Truth tables; 2.6 The logic o a switch; 2.7 The switch implementation of the AND function
2.8 The switch implementation of the OR function2.9 The gating function of the AND and OR gates; 2.10 The inversion function; 2.11 Gate or switch imlementation of a Boolean function; 2.12 The Boolean theorems; 2.13 Complete sets; 2.14 The exclusive-OR (XOR) function; 2.15 The Reed-Muller equation; 2.16 Set theory and the Venn diagram; Chapter 3. Karnaugh maps and function simplification; 3.1 Introduction; 3.2 Minterms and maxterms; 3.3 Canonical forms; 3.4 Boolean functions of two variables; 3.5 The Karnaugh map; 3.6 Poltting Boolean functions on a Karnaugh map
3.7 Maxterms on the Karnaugh map3.8 Simplificaion of Boolean functions; 3.9 The inverse function; 3.10 'Don't care' terms; 3.11 Simplification of products of maxterms; 3.12 The Quine-McCluskey tablar simplification method; 3.13 Properties of prime implicant tables; 3.14 Cyclic prime implicant tables; 3.15 Semi-cyclic prime implicant tables; 3.16 Quine-McCluskey simplification of functions containing 'don't care' terms; 3.17 Decimal approach to Quine-McCluskey simplification of Boolean functions; 3.18 Multiple output circuits; 3.19 Tabular methods for multiple output functions
3.20 Reduced dimension maps3.21 Plotting RDMs from truth tables; 3.22 Reading RDM functions; 3.23 Looping rules for RDMs; 3.24 Criteria for minimisation; Chapter 4. Combinational logic design principles; 4.1 Introduction; 4.2 The NAND function; 4.3 NAND logic implementation of AND and OR functions; 4.4 NAND logic implementation of sums-of-products; 4.5 The NOR function; 4.6 NOR logic implementation of AND and OR functions; 4.7 NOR logic implementation of products-of-sums; 4.8 NOR logic implementation of sums-of-products; 4.9 Bookean algebraic analysis of NAND and NOR networks
4.10 Symbolic circuit analysis for NAND and NOR networks
Record Nr. UNINA-9910784329403321
Holdsworth B (Brian)  
Oxford, : Newnes, 2002
Materiale a stampa
Lo trovi qui: Univ. Federico II
Opac: Controlla la disponibilità qui
Digital logic design / / B. Holdsworth and R.C. Woods
Digital logic design / / B. Holdsworth and R.C. Woods
Autore Holdsworth B (Brian)
Edizione [4th ed.]
Pubbl/distr/stampa Oxford, : Newnes, 2002
Descrizione fisica 1 online resource (535 p.)
Disciplina 321.395
Altri autori (Persone) WoodsR. C (R. Clive)
Soggetto topico Logic design
Digital electronics
ISBN 1-281-22270-4
9786611222703
0-08-047730-5
Formato Materiale a stampa
Livello bibliografico Monografia
Lingua di pubblicazione eng
Nota di contenuto Front Cover; Digital Logic Design; Copyright Page; Contents; Preface to the fourth edition; Acknowledgments; Chapter 1. Number systems and codes; 1.1 Introduction; 1.2 Number systems; 1.3 Conversion between number systems; 1.4 Binary addition and subtraction; 1.5 Signed arithmetic; 1.6 Complement arithmetic; 1.7 Complement representation for binary numbers; 1.8 The vlidity of 1's and 2's complement arithmetic; 1.9 Offset binary representation; 1.10 Addition and subtraction of 2's complement numbrs; 1.11 Graphical interpretation of 2's complemnt representation
1.12 Addition and subtraction of 1's complement numbers1.13 Multiplication of unsigned binary numbers; 1.14 Multiplication of signed binary numbers; 1.15 Binary division; 1.16 Floating point arithmetic; 1.17 Binary codes for decimal digits; 1.18 n-cubes and distance; 1.19 Error detection and correction; 1.20 The Hamming code; 1.21 Gray code; 1.22 The ASCII code; Chapter 2. Boolean algebra; 2.1 Introduction; 2.2 Boolean algebra; 2.3 Derived Boolean operations; 2.4 Boolean functions; 2.5 Truth tables; 2.6 The logic o a switch; 2.7 The switch implementation of the AND function
2.8 The switch implementation of the OR function2.9 The gating function of the AND and OR gates; 2.10 The inversion function; 2.11 Gate or switch imlementation of a Boolean function; 2.12 The Boolean theorems; 2.13 Complete sets; 2.14 The exclusive-OR (XOR) function; 2.15 The Reed-Muller equation; 2.16 Set theory and the Venn diagram; Chapter 3. Karnaugh maps and function simplification; 3.1 Introduction; 3.2 Minterms and maxterms; 3.3 Canonical forms; 3.4 Boolean functions of two variables; 3.5 The Karnaugh map; 3.6 Poltting Boolean functions on a Karnaugh map
3.7 Maxterms on the Karnaugh map3.8 Simplificaion of Boolean functions; 3.9 The inverse function; 3.10 'Don't care' terms; 3.11 Simplification of products of maxterms; 3.12 The Quine-McCluskey tablar simplification method; 3.13 Properties of prime implicant tables; 3.14 Cyclic prime implicant tables; 3.15 Semi-cyclic prime implicant tables; 3.16 Quine-McCluskey simplification of functions containing 'don't care' terms; 3.17 Decimal approach to Quine-McCluskey simplification of Boolean functions; 3.18 Multiple output circuits; 3.19 Tabular methods for multiple output functions
3.20 Reduced dimension maps3.21 Plotting RDMs from truth tables; 3.22 Reading RDM functions; 3.23 Looping rules for RDMs; 3.24 Criteria for minimisation; Chapter 4. Combinational logic design principles; 4.1 Introduction; 4.2 The NAND function; 4.3 NAND logic implementation of AND and OR functions; 4.4 NAND logic implementation of sums-of-products; 4.5 The NOR function; 4.6 NOR logic implementation of AND and OR functions; 4.7 NOR logic implementation of products-of-sums; 4.8 NOR logic implementation of sums-of-products; 4.9 Bookean algebraic analysis of NAND and NOR networks
4.10 Symbolic circuit analysis for NAND and NOR networks
Record Nr. UNINA-9910808491603321
Holdsworth B (Brian)  
Oxford, : Newnes, 2002
Materiale a stampa
Lo trovi qui: Univ. Federico II
Opac: Controlla la disponibilità qui
Digital power electronics and applications [[electronic resource] /] / Fang Lin Luo, Hong Ye, Muhammed Rashid
Digital power electronics and applications [[electronic resource] /] / Fang Lin Luo, Hong Ye, Muhammed Rashid
Autore Luo Fang Lin
Pubbl/distr/stampa London, : Elsevier Academic, 2005
Descrizione fisica 1 online resource (421 p.)
Disciplina 621.317
Altri autori (Persone) YeHong <1973->
RashidM. H
Soggetto topico Power electronics
Digital electronics
Digital control systems
Soggetto genere / forma Electronic books.
ISBN 1-280-63787-0
9786610637874
0-08-045902-1
Formato Materiale a stampa
Livello bibliografico Monografia
Lingua di pubblicazione eng
Nota di contenuto Cover; Digital Power Electronics and Applications; Contents; Preface; Autobiography; 1. Introduction; 1.1 Historical review; 1.1.1 WORK, ENERGY AND HEAT; 1.1.2 DC AND AC EQUIPMENT; DC Power Supply; AC Power Supply; 1.1.3 LOADS; Linear Passive Loads; Linear Dynamic Loads; 1.1.4 IMPEDANCE; 1.1.5 POWERS; Apparent Power S; Power P; Reactive Power Q; 1.2 Traditional parameters; 1.2.1 POWER FACTOR (PF); 1.2.2 POWER-TRANSFER EFFICIENCY (η); 1.2.3 TOTAL HARMONIC DISTORTION (THD); 1.2.4 RIPPLE FACTOR (RF); 1.2.5 APPLICATION EXAMPLES; Power and Efficiency (η); An R-L Circuit Calculation
A Three-Phase Circuit Calculation1.3 Multiple-quadrant operations and choppers; 1.3.1 THE FIRST-QUADRANT CHOPPER; 1.3.2 THE SECOND-QUADRANT CHOPPER; 1.3.3 THE THIRD-QUADRANT CHOPPER; 1.3.4 THE FOURTH-QUADRANT CHOPPER; 1.3.5 THE FIRST-SECOND-QUADRANT CHOPPER; 1.3.6 THE THIRD-FOURTH-QUADRANT CHOPPER; 1.3.7 THE FOUR-QUADRANT CHOPPER; 1.4 Digital power electronics: pump circuits and conversion technology; 1.4.1 FUNDAMENTAL PUMP CIRCUITS; 1.4.2 AC/DC RECTIFIERS; 1.4.3 DC/AC PWM INVERTERS; 1.4.4 DC/DC CONVERTERS; 1.4.5 AC/AC CONVERTERS
1.5 Shortage of analog power electronics and conversion technology1.6 Power semiconductor devices applied in digital power electronics; FURTHER READING; 2. Energy Factor (EF) and Sub-sequential Parameters; 2.1 Introduction; 2.2 Pumping energy (PE); 2.2.1 ENERGY QUANTIZATION; 2.2.2 ENERGY QUANTIZATION FUNCTION; 2.3 Stored energy (SE); 2.3.1 STORED ENERGY IN CONTINUOUS CONDUCTION MODE; Stored Energy (SE); Capacitor-Inductor Stored Energy Ratio (CIR); Energy Losses (EL); Stored Energy Variation on Inductors and Capacitors (VE); 2.3.2 STORED ENERGY IN DISCONTINUOUS CONDUCTION MODE (DCM)
2.4 Energy factor (EF)2.5 Variation energy factor (EF[sub(V)]); 2.6 Time constant, τ, and damping time constant, τ[sub(d)]; 2.6.1 TIME CONSTANT, τ; 2.6.2 DAMPING TIME CONSTANT, τ[sub(d)]; 2.6.3 TIME CONSTANT RATIO, ξ; 2.6.4 MATHEMATICAL MODELING FOR POWER DC/DC CONVERTERS; 2.7 Examples of applications; 2.7.1 A BUCK CONVERTER IN CCM; Buck Converter without Energy Losses (r[sub(L)] = 0Ω); Buck Converter with Small Energy Losses (r[sub(L)] = 1.5Ω); Buck Converter with Energy Losses (r[sub(L)] = 4.5Ω); Buck Converter with Large Energy Losses (r[sub(L)] = 6Ω)
2.7.2 A SUPER-LIFT LUO-CONVERTER IN CCM2.7.3 A BOOST CONVERTER IN CCM (NO POWER LOSSES); 2.7.4 A BUCK-BOOST CONVERTER IN CCM (NO POWER LOSSES); 2.7.5 POSITIVE-OUTPUT LUO-CONVERTER IN CCM (NO POWER LOSSES); 2.8 Small signal analysis; 2.8.1 A BUCK CONVERTER IN CCM WITHOUT ENERGY LOSSES (r[sub(L)] = 0); 2.8.2 BUCK-CONVERTER WITH SMALL ENERGY LOSSES (r[sub(L)] = 1.5Ω); 2.8.3 SUPER-LIFT LUO-CONVERTER WITH ENERGY LOSSES (r[sub(L)] = 0.12Ω); FURTHER READING; APPENDIX A - A SECOND-ORDER TRANSFER FUNCTION; A.1 Very Small Damping Time Constant; A.2 Small Damping Time Constant
A.3 Critical Damping Time Constant
Record Nr. UNINA-9910458714403321
Luo Fang Lin  
London, : Elsevier Academic, 2005
Materiale a stampa
Lo trovi qui: Univ. Federico II
Opac: Controlla la disponibilità qui
Digital power electronics and applications [[electronic resource] /] / Fang Lin Luo, Hong Ye, Muhammed Rashid
Digital power electronics and applications [[electronic resource] /] / Fang Lin Luo, Hong Ye, Muhammed Rashid
Autore Luo Fang Lin
Pubbl/distr/stampa London, : Elsevier Academic, 2005
Descrizione fisica 1 online resource (421 p.)
Disciplina 621.317
Altri autori (Persone) YeHong <1973->
RashidM. H
Soggetto topico Power electronics
Digital electronics
Digital control systems
ISBN 1-280-63787-0
9786610637874
0-08-045902-1
Formato Materiale a stampa
Livello bibliografico Monografia
Lingua di pubblicazione eng
Nota di contenuto Cover; Digital Power Electronics and Applications; Contents; Preface; Autobiography; 1. Introduction; 1.1 Historical review; 1.1.1 WORK, ENERGY AND HEAT; 1.1.2 DC AND AC EQUIPMENT; DC Power Supply; AC Power Supply; 1.1.3 LOADS; Linear Passive Loads; Linear Dynamic Loads; 1.1.4 IMPEDANCE; 1.1.5 POWERS; Apparent Power S; Power P; Reactive Power Q; 1.2 Traditional parameters; 1.2.1 POWER FACTOR (PF); 1.2.2 POWER-TRANSFER EFFICIENCY (η); 1.2.3 TOTAL HARMONIC DISTORTION (THD); 1.2.4 RIPPLE FACTOR (RF); 1.2.5 APPLICATION EXAMPLES; Power and Efficiency (η); An R-L Circuit Calculation
A Three-Phase Circuit Calculation1.3 Multiple-quadrant operations and choppers; 1.3.1 THE FIRST-QUADRANT CHOPPER; 1.3.2 THE SECOND-QUADRANT CHOPPER; 1.3.3 THE THIRD-QUADRANT CHOPPER; 1.3.4 THE FOURTH-QUADRANT CHOPPER; 1.3.5 THE FIRST-SECOND-QUADRANT CHOPPER; 1.3.6 THE THIRD-FOURTH-QUADRANT CHOPPER; 1.3.7 THE FOUR-QUADRANT CHOPPER; 1.4 Digital power electronics: pump circuits and conversion technology; 1.4.1 FUNDAMENTAL PUMP CIRCUITS; 1.4.2 AC/DC RECTIFIERS; 1.4.3 DC/AC PWM INVERTERS; 1.4.4 DC/DC CONVERTERS; 1.4.5 AC/AC CONVERTERS
1.5 Shortage of analog power electronics and conversion technology1.6 Power semiconductor devices applied in digital power electronics; FURTHER READING; 2. Energy Factor (EF) and Sub-sequential Parameters; 2.1 Introduction; 2.2 Pumping energy (PE); 2.2.1 ENERGY QUANTIZATION; 2.2.2 ENERGY QUANTIZATION FUNCTION; 2.3 Stored energy (SE); 2.3.1 STORED ENERGY IN CONTINUOUS CONDUCTION MODE; Stored Energy (SE); Capacitor-Inductor Stored Energy Ratio (CIR); Energy Losses (EL); Stored Energy Variation on Inductors and Capacitors (VE); 2.3.2 STORED ENERGY IN DISCONTINUOUS CONDUCTION MODE (DCM)
2.4 Energy factor (EF)2.5 Variation energy factor (EF[sub(V)]); 2.6 Time constant, τ, and damping time constant, τ[sub(d)]; 2.6.1 TIME CONSTANT, τ; 2.6.2 DAMPING TIME CONSTANT, τ[sub(d)]; 2.6.3 TIME CONSTANT RATIO, ξ; 2.6.4 MATHEMATICAL MODELING FOR POWER DC/DC CONVERTERS; 2.7 Examples of applications; 2.7.1 A BUCK CONVERTER IN CCM; Buck Converter without Energy Losses (r[sub(L)] = 0Ω); Buck Converter with Small Energy Losses (r[sub(L)] = 1.5Ω); Buck Converter with Energy Losses (r[sub(L)] = 4.5Ω); Buck Converter with Large Energy Losses (r[sub(L)] = 6Ω)
2.7.2 A SUPER-LIFT LUO-CONVERTER IN CCM2.7.3 A BOOST CONVERTER IN CCM (NO POWER LOSSES); 2.7.4 A BUCK-BOOST CONVERTER IN CCM (NO POWER LOSSES); 2.7.5 POSITIVE-OUTPUT LUO-CONVERTER IN CCM (NO POWER LOSSES); 2.8 Small signal analysis; 2.8.1 A BUCK CONVERTER IN CCM WITHOUT ENERGY LOSSES (r[sub(L)] = 0); 2.8.2 BUCK-CONVERTER WITH SMALL ENERGY LOSSES (r[sub(L)] = 1.5Ω); 2.8.3 SUPER-LIFT LUO-CONVERTER WITH ENERGY LOSSES (r[sub(L)] = 0.12Ω); FURTHER READING; APPENDIX A - A SECOND-ORDER TRANSFER FUNCTION; A.1 Very Small Damping Time Constant; A.2 Small Damping Time Constant
A.3 Critical Damping Time Constant
Record Nr. UNINA-9910784544303321
Luo Fang Lin  
London, : Elsevier Academic, 2005
Materiale a stampa
Lo trovi qui: Univ. Federico II
Opac: Controlla la disponibilità qui
Digital power electronics and applications / / Fang Lin Luo, Hong Ye, Muhammed Rashid
Digital power electronics and applications / / Fang Lin Luo, Hong Ye, Muhammed Rashid
Autore Luo Fang Lin
Edizione [1st ed.]
Pubbl/distr/stampa London, : Elsevier Academic, 2005
Descrizione fisica 1 online resource (421 p.)
Disciplina 621.317
Altri autori (Persone) YeHong <1973->
RashidM. H
Soggetto topico Power electronics
Digital electronics
Digital control systems
ISBN 1-280-63787-0
9786610637874
0-08-045902-1
Formato Materiale a stampa
Livello bibliografico Monografia
Lingua di pubblicazione eng
Nota di contenuto Cover; Digital Power Electronics and Applications; Contents; Preface; Autobiography; 1. Introduction; 1.1 Historical review; 1.1.1 WORK, ENERGY AND HEAT; 1.1.2 DC AND AC EQUIPMENT; DC Power Supply; AC Power Supply; 1.1.3 LOADS; Linear Passive Loads; Linear Dynamic Loads; 1.1.4 IMPEDANCE; 1.1.5 POWERS; Apparent Power S; Power P; Reactive Power Q; 1.2 Traditional parameters; 1.2.1 POWER FACTOR (PF); 1.2.2 POWER-TRANSFER EFFICIENCY (η); 1.2.3 TOTAL HARMONIC DISTORTION (THD); 1.2.4 RIPPLE FACTOR (RF); 1.2.5 APPLICATION EXAMPLES; Power and Efficiency (η); An R-L Circuit Calculation
A Three-Phase Circuit Calculation1.3 Multiple-quadrant operations and choppers; 1.3.1 THE FIRST-QUADRANT CHOPPER; 1.3.2 THE SECOND-QUADRANT CHOPPER; 1.3.3 THE THIRD-QUADRANT CHOPPER; 1.3.4 THE FOURTH-QUADRANT CHOPPER; 1.3.5 THE FIRST-SECOND-QUADRANT CHOPPER; 1.3.6 THE THIRD-FOURTH-QUADRANT CHOPPER; 1.3.7 THE FOUR-QUADRANT CHOPPER; 1.4 Digital power electronics: pump circuits and conversion technology; 1.4.1 FUNDAMENTAL PUMP CIRCUITS; 1.4.2 AC/DC RECTIFIERS; 1.4.3 DC/AC PWM INVERTERS; 1.4.4 DC/DC CONVERTERS; 1.4.5 AC/AC CONVERTERS
1.5 Shortage of analog power electronics and conversion technology1.6 Power semiconductor devices applied in digital power electronics; FURTHER READING; 2. Energy Factor (EF) and Sub-sequential Parameters; 2.1 Introduction; 2.2 Pumping energy (PE); 2.2.1 ENERGY QUANTIZATION; 2.2.2 ENERGY QUANTIZATION FUNCTION; 2.3 Stored energy (SE); 2.3.1 STORED ENERGY IN CONTINUOUS CONDUCTION MODE; Stored Energy (SE); Capacitor-Inductor Stored Energy Ratio (CIR); Energy Losses (EL); Stored Energy Variation on Inductors and Capacitors (VE); 2.3.2 STORED ENERGY IN DISCONTINUOUS CONDUCTION MODE (DCM)
2.4 Energy factor (EF)2.5 Variation energy factor (EF[sub(V)]); 2.6 Time constant, τ, and damping time constant, τ[sub(d)]; 2.6.1 TIME CONSTANT, τ; 2.6.2 DAMPING TIME CONSTANT, τ[sub(d)]; 2.6.3 TIME CONSTANT RATIO, ξ; 2.6.4 MATHEMATICAL MODELING FOR POWER DC/DC CONVERTERS; 2.7 Examples of applications; 2.7.1 A BUCK CONVERTER IN CCM; Buck Converter without Energy Losses (r[sub(L)] = 0Ω); Buck Converter with Small Energy Losses (r[sub(L)] = 1.5Ω); Buck Converter with Energy Losses (r[sub(L)] = 4.5Ω); Buck Converter with Large Energy Losses (r[sub(L)] = 6Ω)
2.7.2 A SUPER-LIFT LUO-CONVERTER IN CCM2.7.3 A BOOST CONVERTER IN CCM (NO POWER LOSSES); 2.7.4 A BUCK-BOOST CONVERTER IN CCM (NO POWER LOSSES); 2.7.5 POSITIVE-OUTPUT LUO-CONVERTER IN CCM (NO POWER LOSSES); 2.8 Small signal analysis; 2.8.1 A BUCK CONVERTER IN CCM WITHOUT ENERGY LOSSES (r[sub(L)] = 0); 2.8.2 BUCK-CONVERTER WITH SMALL ENERGY LOSSES (r[sub(L)] = 1.5Ω); 2.8.3 SUPER-LIFT LUO-CONVERTER WITH ENERGY LOSSES (r[sub(L)] = 0.12Ω); FURTHER READING; APPENDIX A - A SECOND-ORDER TRANSFER FUNCTION; A.1 Very Small Damping Time Constant; A.2 Small Damping Time Constant
A.3 Critical Damping Time Constant
Record Nr. UNINA-9910816265603321
Luo Fang Lin  
London, : Elsevier Academic, 2005
Materiale a stampa
Lo trovi qui: Univ. Federico II
Opac: Controlla la disponibilità qui
Digital principles and circuits [[electronic resource] /] / C.B. Agarwal
Digital principles and circuits [[electronic resource] /] / C.B. Agarwal
Autore Agarwal C. B
Edizione [1st ed.]
Pubbl/distr/stampa Mumbai [India], : Himalaya Pub. House, 2006
Descrizione fisica 1 online resource (469 p.)
Disciplina 621.395
Soggetto topico Digital electronics
Electronic circuits
Soggetto genere / forma Electronic books.
ISBN 1-282-80165-1
9786612801655
1-4416-6132-8
93-5043-319-2
600-00-2700-1
Formato Materiale a stampa
Livello bibliografico Monografia
Lingua di pubblicazione eng
Nota di contenuto COVER; CONTENTS; CHAPTER 1 : DIGITAL CONCEPTS; CHAPTER 2 :NUMBER SYSTEMS; CHAPTER 3 :BINARY CODES; CHAPTER 4 :LOGIC GATES AND IC FAMILIES; CHAPTER 5 :BOOLEAN ALGEBRA; CHAPTER 6 :COMBINATIONAL CIRCUITS; CHAPTER 7 :FLIP-FLOPS AND REGISTERS; CHAPTER 8 :DIGITAL COUNTERS; CHAPTER 9 :MEMORY SYSTEMS; CHAPTER 10 :D/A CONVERTERS AND A/D CONVERTERS; APPENDIX A; APPENDIX B; APPENDIX C; INDEX
Record Nr. UNINA-9910459288703321
Agarwal C. B  
Mumbai [India], : Himalaya Pub. House, 2006
Materiale a stampa
Lo trovi qui: Univ. Federico II
Opac: Controlla la disponibilità qui
Digital principles and circuits [[electronic resource] /] / C.B. Agarwal
Digital principles and circuits [[electronic resource] /] / C.B. Agarwal
Autore Agarwal C. B
Edizione [1st ed.]
Pubbl/distr/stampa Mumbai [India], : Himalaya Pub. House, 2006
Descrizione fisica 1 online resource (469 p.)
Disciplina 621.395
Soggetto topico Digital electronics
Electronic circuits
ISBN 1-282-80165-1
9786612801655
1-4416-6132-8
93-5043-319-2
600-00-2700-1
Formato Materiale a stampa
Livello bibliografico Monografia
Lingua di pubblicazione eng
Nota di contenuto COVER; CONTENTS; CHAPTER 1 : DIGITAL CONCEPTS; CHAPTER 2 :NUMBER SYSTEMS; CHAPTER 3 :BINARY CODES; CHAPTER 4 :LOGIC GATES AND IC FAMILIES; CHAPTER 5 :BOOLEAN ALGEBRA; CHAPTER 6 :COMBINATIONAL CIRCUITS; CHAPTER 7 :FLIP-FLOPS AND REGISTERS; CHAPTER 8 :DIGITAL COUNTERS; CHAPTER 9 :MEMORY SYSTEMS; CHAPTER 10 :D/A CONVERTERS AND A/D CONVERTERS; APPENDIX A; APPENDIX B; APPENDIX C; INDEX
Record Nr. UNINA-9910785194303321
Agarwal C. B  
Mumbai [India], : Himalaya Pub. House, 2006
Materiale a stampa
Lo trovi qui: Univ. Federico II
Opac: Controlla la disponibilità qui