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Digital logic design [[electronic resource] /] / B. Holdsworth and R.C. Woods
Digital logic design [[electronic resource] /] / B. Holdsworth and R.C. Woods
Autore Holdsworth B (Brian)
Edizione [4th ed.]
Pubbl/distr/stampa Oxford, : Newnes, 2002
Descrizione fisica 1 online resource (535 p.)
Disciplina 321.395
Altri autori (Persone) WoodsR. C (R. Clive)
Soggetto topico Logic design
Digital electronics
Soggetto genere / forma Electronic books.
ISBN 1-281-22270-4
9786611222703
0-08-047730-5
Formato Materiale a stampa
Livello bibliografico Monografia
Lingua di pubblicazione eng
Nota di contenuto Front Cover; Digital Logic Design; Copyright Page; Contents; Preface to the fourth edition; Acknowledgments; Chapter 1. Number systems and codes; 1.1 Introduction; 1.2 Number systems; 1.3 Conversion between number systems; 1.4 Binary addition and subtraction; 1.5 Signed arithmetic; 1.6 Complement arithmetic; 1.7 Complement representation for binary numbers; 1.8 The vlidity of 1's and 2's complement arithmetic; 1.9 Offset binary representation; 1.10 Addition and subtraction of 2's complement numbrs; 1.11 Graphical interpretation of 2's complemnt representation
1.12 Addition and subtraction of 1's complement numbers1.13 Multiplication of unsigned binary numbers; 1.14 Multiplication of signed binary numbers; 1.15 Binary division; 1.16 Floating point arithmetic; 1.17 Binary codes for decimal digits; 1.18 n-cubes and distance; 1.19 Error detection and correction; 1.20 The Hamming code; 1.21 Gray code; 1.22 The ASCII code; Chapter 2. Boolean algebra; 2.1 Introduction; 2.2 Boolean algebra; 2.3 Derived Boolean operations; 2.4 Boolean functions; 2.5 Truth tables; 2.6 The logic o a switch; 2.7 The switch implementation of the AND function
2.8 The switch implementation of the OR function2.9 The gating function of the AND and OR gates; 2.10 The inversion function; 2.11 Gate or switch imlementation of a Boolean function; 2.12 The Boolean theorems; 2.13 Complete sets; 2.14 The exclusive-OR (XOR) function; 2.15 The Reed-Muller equation; 2.16 Set theory and the Venn diagram; Chapter 3. Karnaugh maps and function simplification; 3.1 Introduction; 3.2 Minterms and maxterms; 3.3 Canonical forms; 3.4 Boolean functions of two variables; 3.5 The Karnaugh map; 3.6 Poltting Boolean functions on a Karnaugh map
3.7 Maxterms on the Karnaugh map3.8 Simplificaion of Boolean functions; 3.9 The inverse function; 3.10 'Don't care' terms; 3.11 Simplification of products of maxterms; 3.12 The Quine-McCluskey tablar simplification method; 3.13 Properties of prime implicant tables; 3.14 Cyclic prime implicant tables; 3.15 Semi-cyclic prime implicant tables; 3.16 Quine-McCluskey simplification of functions containing 'don't care' terms; 3.17 Decimal approach to Quine-McCluskey simplification of Boolean functions; 3.18 Multiple output circuits; 3.19 Tabular methods for multiple output functions
3.20 Reduced dimension maps3.21 Plotting RDMs from truth tables; 3.22 Reading RDM functions; 3.23 Looping rules for RDMs; 3.24 Criteria for minimisation; Chapter 4. Combinational logic design principles; 4.1 Introduction; 4.2 The NAND function; 4.3 NAND logic implementation of AND and OR functions; 4.4 NAND logic implementation of sums-of-products; 4.5 The NOR function; 4.6 NOR logic implementation of AND and OR functions; 4.7 NOR logic implementation of products-of-sums; 4.8 NOR logic implementation of sums-of-products; 4.9 Bookean algebraic analysis of NAND and NOR networks
4.10 Symbolic circuit analysis for NAND and NOR networks
Record Nr. UNINA-9910457332303321
Holdsworth B (Brian)  
Oxford, : Newnes, 2002
Materiale a stampa
Lo trovi qui: Univ. Federico II
Opac: Controlla la disponibilità qui
Digital logic design [[electronic resource] /] / B. Holdsworth and R.C. Woods
Digital logic design [[electronic resource] /] / B. Holdsworth and R.C. Woods
Autore Holdsworth B (Brian)
Edizione [4th ed.]
Pubbl/distr/stampa Oxford, : Newnes, 2002
Descrizione fisica 1 online resource (535 p.)
Disciplina 321.395
Altri autori (Persone) WoodsR. C (R. Clive)
Soggetto topico Logic design
Digital electronics
ISBN 1-281-22270-4
9786611222703
0-08-047730-5
Formato Materiale a stampa
Livello bibliografico Monografia
Lingua di pubblicazione eng
Nota di contenuto Front Cover; Digital Logic Design; Copyright Page; Contents; Preface to the fourth edition; Acknowledgments; Chapter 1. Number systems and codes; 1.1 Introduction; 1.2 Number systems; 1.3 Conversion between number systems; 1.4 Binary addition and subtraction; 1.5 Signed arithmetic; 1.6 Complement arithmetic; 1.7 Complement representation for binary numbers; 1.8 The vlidity of 1's and 2's complement arithmetic; 1.9 Offset binary representation; 1.10 Addition and subtraction of 2's complement numbrs; 1.11 Graphical interpretation of 2's complemnt representation
1.12 Addition and subtraction of 1's complement numbers1.13 Multiplication of unsigned binary numbers; 1.14 Multiplication of signed binary numbers; 1.15 Binary division; 1.16 Floating point arithmetic; 1.17 Binary codes for decimal digits; 1.18 n-cubes and distance; 1.19 Error detection and correction; 1.20 The Hamming code; 1.21 Gray code; 1.22 The ASCII code; Chapter 2. Boolean algebra; 2.1 Introduction; 2.2 Boolean algebra; 2.3 Derived Boolean operations; 2.4 Boolean functions; 2.5 Truth tables; 2.6 The logic o a switch; 2.7 The switch implementation of the AND function
2.8 The switch implementation of the OR function2.9 The gating function of the AND and OR gates; 2.10 The inversion function; 2.11 Gate or switch imlementation of a Boolean function; 2.12 The Boolean theorems; 2.13 Complete sets; 2.14 The exclusive-OR (XOR) function; 2.15 The Reed-Muller equation; 2.16 Set theory and the Venn diagram; Chapter 3. Karnaugh maps and function simplification; 3.1 Introduction; 3.2 Minterms and maxterms; 3.3 Canonical forms; 3.4 Boolean functions of two variables; 3.5 The Karnaugh map; 3.6 Poltting Boolean functions on a Karnaugh map
3.7 Maxterms on the Karnaugh map3.8 Simplificaion of Boolean functions; 3.9 The inverse function; 3.10 'Don't care' terms; 3.11 Simplification of products of maxterms; 3.12 The Quine-McCluskey tablar simplification method; 3.13 Properties of prime implicant tables; 3.14 Cyclic prime implicant tables; 3.15 Semi-cyclic prime implicant tables; 3.16 Quine-McCluskey simplification of functions containing 'don't care' terms; 3.17 Decimal approach to Quine-McCluskey simplification of Boolean functions; 3.18 Multiple output circuits; 3.19 Tabular methods for multiple output functions
3.20 Reduced dimension maps3.21 Plotting RDMs from truth tables; 3.22 Reading RDM functions; 3.23 Looping rules for RDMs; 3.24 Criteria for minimisation; Chapter 4. Combinational logic design principles; 4.1 Introduction; 4.2 The NAND function; 4.3 NAND logic implementation of AND and OR functions; 4.4 NAND logic implementation of sums-of-products; 4.5 The NOR function; 4.6 NOR logic implementation of AND and OR functions; 4.7 NOR logic implementation of products-of-sums; 4.8 NOR logic implementation of sums-of-products; 4.9 Bookean algebraic analysis of NAND and NOR networks
4.10 Symbolic circuit analysis for NAND and NOR networks
Record Nr. UNINA-9910784329403321
Holdsworth B (Brian)  
Oxford, : Newnes, 2002
Materiale a stampa
Lo trovi qui: Univ. Federico II
Opac: Controlla la disponibilità qui
Digital logic design [[electronic resource] /] / B. Holdsworth and R.C. Woods
Digital logic design [[electronic resource] /] / B. Holdsworth and R.C. Woods
Autore Holdsworth B (Brian)
Edizione [4th ed.]
Pubbl/distr/stampa Oxford, : Newnes, 2002
Descrizione fisica 1 online resource (535 p.)
Disciplina 321.395
Altri autori (Persone) WoodsR. C (R. Clive)
Soggetto topico Logic design
Digital electronics
ISBN 1-281-22270-4
9786611222703
0-08-047730-5
Formato Materiale a stampa
Livello bibliografico Monografia
Lingua di pubblicazione eng
Nota di contenuto Front Cover; Digital Logic Design; Copyright Page; Contents; Preface to the fourth edition; Acknowledgments; Chapter 1. Number systems and codes; 1.1 Introduction; 1.2 Number systems; 1.3 Conversion between number systems; 1.4 Binary addition and subtraction; 1.5 Signed arithmetic; 1.6 Complement arithmetic; 1.7 Complement representation for binary numbers; 1.8 The vlidity of 1's and 2's complement arithmetic; 1.9 Offset binary representation; 1.10 Addition and subtraction of 2's complement numbrs; 1.11 Graphical interpretation of 2's complemnt representation
1.12 Addition and subtraction of 1's complement numbers1.13 Multiplication of unsigned binary numbers; 1.14 Multiplication of signed binary numbers; 1.15 Binary division; 1.16 Floating point arithmetic; 1.17 Binary codes for decimal digits; 1.18 n-cubes and distance; 1.19 Error detection and correction; 1.20 The Hamming code; 1.21 Gray code; 1.22 The ASCII code; Chapter 2. Boolean algebra; 2.1 Introduction; 2.2 Boolean algebra; 2.3 Derived Boolean operations; 2.4 Boolean functions; 2.5 Truth tables; 2.6 The logic o a switch; 2.7 The switch implementation of the AND function
2.8 The switch implementation of the OR function2.9 The gating function of the AND and OR gates; 2.10 The inversion function; 2.11 Gate or switch imlementation of a Boolean function; 2.12 The Boolean theorems; 2.13 Complete sets; 2.14 The exclusive-OR (XOR) function; 2.15 The Reed-Muller equation; 2.16 Set theory and the Venn diagram; Chapter 3. Karnaugh maps and function simplification; 3.1 Introduction; 3.2 Minterms and maxterms; 3.3 Canonical forms; 3.4 Boolean functions of two variables; 3.5 The Karnaugh map; 3.6 Poltting Boolean functions on a Karnaugh map
3.7 Maxterms on the Karnaugh map3.8 Simplificaion of Boolean functions; 3.9 The inverse function; 3.10 'Don't care' terms; 3.11 Simplification of products of maxterms; 3.12 The Quine-McCluskey tablar simplification method; 3.13 Properties of prime implicant tables; 3.14 Cyclic prime implicant tables; 3.15 Semi-cyclic prime implicant tables; 3.16 Quine-McCluskey simplification of functions containing 'don't care' terms; 3.17 Decimal approach to Quine-McCluskey simplification of Boolean functions; 3.18 Multiple output circuits; 3.19 Tabular methods for multiple output functions
3.20 Reduced dimension maps3.21 Plotting RDMs from truth tables; 3.22 Reading RDM functions; 3.23 Looping rules for RDMs; 3.24 Criteria for minimisation; Chapter 4. Combinational logic design principles; 4.1 Introduction; 4.2 The NAND function; 4.3 NAND logic implementation of AND and OR functions; 4.4 NAND logic implementation of sums-of-products; 4.5 The NOR function; 4.6 NOR logic implementation of AND and OR functions; 4.7 NOR logic implementation of products-of-sums; 4.8 NOR logic implementation of sums-of-products; 4.9 Bookean algebraic analysis of NAND and NOR networks
4.10 Symbolic circuit analysis for NAND and NOR networks
Record Nr. UNINA-9910808491603321
Holdsworth B (Brian)  
Oxford, : Newnes, 2002
Materiale a stampa
Lo trovi qui: Univ. Federico II
Opac: Controlla la disponibilità qui
Digital power electronics and applications [[electronic resource] /] / Fang Lin Luo, Hong Ye, Muhammed Rashid
Digital power electronics and applications [[electronic resource] /] / Fang Lin Luo, Hong Ye, Muhammed Rashid
Autore Luo Fang Lin
Pubbl/distr/stampa London, : Elsevier Academic, 2005
Descrizione fisica 1 online resource (421 p.)
Disciplina 621.317
Altri autori (Persone) YeHong <1973->
RashidM. H
Soggetto topico Power electronics
Digital electronics
Digital control systems
Soggetto genere / forma Electronic books.
ISBN 1-280-63787-0
9786610637874
0-08-045902-1
Formato Materiale a stampa
Livello bibliografico Monografia
Lingua di pubblicazione eng
Nota di contenuto Cover; Digital Power Electronics and Applications; Contents; Preface; Autobiography; 1. Introduction; 1.1 Historical review; 1.1.1 WORK, ENERGY AND HEAT; 1.1.2 DC AND AC EQUIPMENT; DC Power Supply; AC Power Supply; 1.1.3 LOADS; Linear Passive Loads; Linear Dynamic Loads; 1.1.4 IMPEDANCE; 1.1.5 POWERS; Apparent Power S; Power P; Reactive Power Q; 1.2 Traditional parameters; 1.2.1 POWER FACTOR (PF); 1.2.2 POWER-TRANSFER EFFICIENCY (η); 1.2.3 TOTAL HARMONIC DISTORTION (THD); 1.2.4 RIPPLE FACTOR (RF); 1.2.5 APPLICATION EXAMPLES; Power and Efficiency (η); An R-L Circuit Calculation
A Three-Phase Circuit Calculation1.3 Multiple-quadrant operations and choppers; 1.3.1 THE FIRST-QUADRANT CHOPPER; 1.3.2 THE SECOND-QUADRANT CHOPPER; 1.3.3 THE THIRD-QUADRANT CHOPPER; 1.3.4 THE FOURTH-QUADRANT CHOPPER; 1.3.5 THE FIRST-SECOND-QUADRANT CHOPPER; 1.3.6 THE THIRD-FOURTH-QUADRANT CHOPPER; 1.3.7 THE FOUR-QUADRANT CHOPPER; 1.4 Digital power electronics: pump circuits and conversion technology; 1.4.1 FUNDAMENTAL PUMP CIRCUITS; 1.4.2 AC/DC RECTIFIERS; 1.4.3 DC/AC PWM INVERTERS; 1.4.4 DC/DC CONVERTERS; 1.4.5 AC/AC CONVERTERS
1.5 Shortage of analog power electronics and conversion technology1.6 Power semiconductor devices applied in digital power electronics; FURTHER READING; 2. Energy Factor (EF) and Sub-sequential Parameters; 2.1 Introduction; 2.2 Pumping energy (PE); 2.2.1 ENERGY QUANTIZATION; 2.2.2 ENERGY QUANTIZATION FUNCTION; 2.3 Stored energy (SE); 2.3.1 STORED ENERGY IN CONTINUOUS CONDUCTION MODE; Stored Energy (SE); Capacitor-Inductor Stored Energy Ratio (CIR); Energy Losses (EL); Stored Energy Variation on Inductors and Capacitors (VE); 2.3.2 STORED ENERGY IN DISCONTINUOUS CONDUCTION MODE (DCM)
2.4 Energy factor (EF)2.5 Variation energy factor (EF[sub(V)]); 2.6 Time constant, τ, and damping time constant, τ[sub(d)]; 2.6.1 TIME CONSTANT, τ; 2.6.2 DAMPING TIME CONSTANT, τ[sub(d)]; 2.6.3 TIME CONSTANT RATIO, ξ; 2.6.4 MATHEMATICAL MODELING FOR POWER DC/DC CONVERTERS; 2.7 Examples of applications; 2.7.1 A BUCK CONVERTER IN CCM; Buck Converter without Energy Losses (r[sub(L)] = 0Ω); Buck Converter with Small Energy Losses (r[sub(L)] = 1.5Ω); Buck Converter with Energy Losses (r[sub(L)] = 4.5Ω); Buck Converter with Large Energy Losses (r[sub(L)] = 6Ω)
2.7.2 A SUPER-LIFT LUO-CONVERTER IN CCM2.7.3 A BOOST CONVERTER IN CCM (NO POWER LOSSES); 2.7.4 A BUCK-BOOST CONVERTER IN CCM (NO POWER LOSSES); 2.7.5 POSITIVE-OUTPUT LUO-CONVERTER IN CCM (NO POWER LOSSES); 2.8 Small signal analysis; 2.8.1 A BUCK CONVERTER IN CCM WITHOUT ENERGY LOSSES (r[sub(L)] = 0); 2.8.2 BUCK-CONVERTER WITH SMALL ENERGY LOSSES (r[sub(L)] = 1.5Ω); 2.8.3 SUPER-LIFT LUO-CONVERTER WITH ENERGY LOSSES (r[sub(L)] = 0.12Ω); FURTHER READING; APPENDIX A - A SECOND-ORDER TRANSFER FUNCTION; A.1 Very Small Damping Time Constant; A.2 Small Damping Time Constant
A.3 Critical Damping Time Constant
Record Nr. UNINA-9910458714403321
Luo Fang Lin  
London, : Elsevier Academic, 2005
Materiale a stampa
Lo trovi qui: Univ. Federico II
Opac: Controlla la disponibilità qui
Digital power electronics and applications [[electronic resource] /] / Fang Lin Luo, Hong Ye, Muhammed Rashid
Digital power electronics and applications [[electronic resource] /] / Fang Lin Luo, Hong Ye, Muhammed Rashid
Autore Luo Fang Lin
Pubbl/distr/stampa London, : Elsevier Academic, 2005
Descrizione fisica 1 online resource (421 p.)
Disciplina 621.317
Altri autori (Persone) YeHong <1973->
RashidM. H
Soggetto topico Power electronics
Digital electronics
Digital control systems
ISBN 1-280-63787-0
9786610637874
0-08-045902-1
Formato Materiale a stampa
Livello bibliografico Monografia
Lingua di pubblicazione eng
Nota di contenuto Cover; Digital Power Electronics and Applications; Contents; Preface; Autobiography; 1. Introduction; 1.1 Historical review; 1.1.1 WORK, ENERGY AND HEAT; 1.1.2 DC AND AC EQUIPMENT; DC Power Supply; AC Power Supply; 1.1.3 LOADS; Linear Passive Loads; Linear Dynamic Loads; 1.1.4 IMPEDANCE; 1.1.5 POWERS; Apparent Power S; Power P; Reactive Power Q; 1.2 Traditional parameters; 1.2.1 POWER FACTOR (PF); 1.2.2 POWER-TRANSFER EFFICIENCY (η); 1.2.3 TOTAL HARMONIC DISTORTION (THD); 1.2.4 RIPPLE FACTOR (RF); 1.2.5 APPLICATION EXAMPLES; Power and Efficiency (η); An R-L Circuit Calculation
A Three-Phase Circuit Calculation1.3 Multiple-quadrant operations and choppers; 1.3.1 THE FIRST-QUADRANT CHOPPER; 1.3.2 THE SECOND-QUADRANT CHOPPER; 1.3.3 THE THIRD-QUADRANT CHOPPER; 1.3.4 THE FOURTH-QUADRANT CHOPPER; 1.3.5 THE FIRST-SECOND-QUADRANT CHOPPER; 1.3.6 THE THIRD-FOURTH-QUADRANT CHOPPER; 1.3.7 THE FOUR-QUADRANT CHOPPER; 1.4 Digital power electronics: pump circuits and conversion technology; 1.4.1 FUNDAMENTAL PUMP CIRCUITS; 1.4.2 AC/DC RECTIFIERS; 1.4.3 DC/AC PWM INVERTERS; 1.4.4 DC/DC CONVERTERS; 1.4.5 AC/AC CONVERTERS
1.5 Shortage of analog power electronics and conversion technology1.6 Power semiconductor devices applied in digital power electronics; FURTHER READING; 2. Energy Factor (EF) and Sub-sequential Parameters; 2.1 Introduction; 2.2 Pumping energy (PE); 2.2.1 ENERGY QUANTIZATION; 2.2.2 ENERGY QUANTIZATION FUNCTION; 2.3 Stored energy (SE); 2.3.1 STORED ENERGY IN CONTINUOUS CONDUCTION MODE; Stored Energy (SE); Capacitor-Inductor Stored Energy Ratio (CIR); Energy Losses (EL); Stored Energy Variation on Inductors and Capacitors (VE); 2.3.2 STORED ENERGY IN DISCONTINUOUS CONDUCTION MODE (DCM)
2.4 Energy factor (EF)2.5 Variation energy factor (EF[sub(V)]); 2.6 Time constant, τ, and damping time constant, τ[sub(d)]; 2.6.1 TIME CONSTANT, τ; 2.6.2 DAMPING TIME CONSTANT, τ[sub(d)]; 2.6.3 TIME CONSTANT RATIO, ξ; 2.6.4 MATHEMATICAL MODELING FOR POWER DC/DC CONVERTERS; 2.7 Examples of applications; 2.7.1 A BUCK CONVERTER IN CCM; Buck Converter without Energy Losses (r[sub(L)] = 0Ω); Buck Converter with Small Energy Losses (r[sub(L)] = 1.5Ω); Buck Converter with Energy Losses (r[sub(L)] = 4.5Ω); Buck Converter with Large Energy Losses (r[sub(L)] = 6Ω)
2.7.2 A SUPER-LIFT LUO-CONVERTER IN CCM2.7.3 A BOOST CONVERTER IN CCM (NO POWER LOSSES); 2.7.4 A BUCK-BOOST CONVERTER IN CCM (NO POWER LOSSES); 2.7.5 POSITIVE-OUTPUT LUO-CONVERTER IN CCM (NO POWER LOSSES); 2.8 Small signal analysis; 2.8.1 A BUCK CONVERTER IN CCM WITHOUT ENERGY LOSSES (r[sub(L)] = 0); 2.8.2 BUCK-CONVERTER WITH SMALL ENERGY LOSSES (r[sub(L)] = 1.5Ω); 2.8.3 SUPER-LIFT LUO-CONVERTER WITH ENERGY LOSSES (r[sub(L)] = 0.12Ω); FURTHER READING; APPENDIX A - A SECOND-ORDER TRANSFER FUNCTION; A.1 Very Small Damping Time Constant; A.2 Small Damping Time Constant
A.3 Critical Damping Time Constant
Record Nr. UNINA-9910784544303321
Luo Fang Lin  
London, : Elsevier Academic, 2005
Materiale a stampa
Lo trovi qui: Univ. Federico II
Opac: Controlla la disponibilità qui
Digital power electronics and applications [[electronic resource] /] / Fang Lin Luo, Hong Ye, Muhammed Rashid
Digital power electronics and applications [[electronic resource] /] / Fang Lin Luo, Hong Ye, Muhammed Rashid
Autore Luo Fang Lin
Edizione [1st ed.]
Pubbl/distr/stampa London, : Elsevier Academic, 2005
Descrizione fisica 1 online resource (421 p.)
Disciplina 621.317
Altri autori (Persone) YeHong <1973->
RashidM. H
Soggetto topico Power electronics
Digital electronics
Digital control systems
ISBN 1-280-63787-0
9786610637874
0-08-045902-1
Formato Materiale a stampa
Livello bibliografico Monografia
Lingua di pubblicazione eng
Nota di contenuto Cover; Digital Power Electronics and Applications; Contents; Preface; Autobiography; 1. Introduction; 1.1 Historical review; 1.1.1 WORK, ENERGY AND HEAT; 1.1.2 DC AND AC EQUIPMENT; DC Power Supply; AC Power Supply; 1.1.3 LOADS; Linear Passive Loads; Linear Dynamic Loads; 1.1.4 IMPEDANCE; 1.1.5 POWERS; Apparent Power S; Power P; Reactive Power Q; 1.2 Traditional parameters; 1.2.1 POWER FACTOR (PF); 1.2.2 POWER-TRANSFER EFFICIENCY (η); 1.2.3 TOTAL HARMONIC DISTORTION (THD); 1.2.4 RIPPLE FACTOR (RF); 1.2.5 APPLICATION EXAMPLES; Power and Efficiency (η); An R-L Circuit Calculation
A Three-Phase Circuit Calculation1.3 Multiple-quadrant operations and choppers; 1.3.1 THE FIRST-QUADRANT CHOPPER; 1.3.2 THE SECOND-QUADRANT CHOPPER; 1.3.3 THE THIRD-QUADRANT CHOPPER; 1.3.4 THE FOURTH-QUADRANT CHOPPER; 1.3.5 THE FIRST-SECOND-QUADRANT CHOPPER; 1.3.6 THE THIRD-FOURTH-QUADRANT CHOPPER; 1.3.7 THE FOUR-QUADRANT CHOPPER; 1.4 Digital power electronics: pump circuits and conversion technology; 1.4.1 FUNDAMENTAL PUMP CIRCUITS; 1.4.2 AC/DC RECTIFIERS; 1.4.3 DC/AC PWM INVERTERS; 1.4.4 DC/DC CONVERTERS; 1.4.5 AC/AC CONVERTERS
1.5 Shortage of analog power electronics and conversion technology1.6 Power semiconductor devices applied in digital power electronics; FURTHER READING; 2. Energy Factor (EF) and Sub-sequential Parameters; 2.1 Introduction; 2.2 Pumping energy (PE); 2.2.1 ENERGY QUANTIZATION; 2.2.2 ENERGY QUANTIZATION FUNCTION; 2.3 Stored energy (SE); 2.3.1 STORED ENERGY IN CONTINUOUS CONDUCTION MODE; Stored Energy (SE); Capacitor-Inductor Stored Energy Ratio (CIR); Energy Losses (EL); Stored Energy Variation on Inductors and Capacitors (VE); 2.3.2 STORED ENERGY IN DISCONTINUOUS CONDUCTION MODE (DCM)
2.4 Energy factor (EF)2.5 Variation energy factor (EF[sub(V)]); 2.6 Time constant, τ, and damping time constant, τ[sub(d)]; 2.6.1 TIME CONSTANT, τ; 2.6.2 DAMPING TIME CONSTANT, τ[sub(d)]; 2.6.3 TIME CONSTANT RATIO, ξ; 2.6.4 MATHEMATICAL MODELING FOR POWER DC/DC CONVERTERS; 2.7 Examples of applications; 2.7.1 A BUCK CONVERTER IN CCM; Buck Converter without Energy Losses (r[sub(L)] = 0Ω); Buck Converter with Small Energy Losses (r[sub(L)] = 1.5Ω); Buck Converter with Energy Losses (r[sub(L)] = 4.5Ω); Buck Converter with Large Energy Losses (r[sub(L)] = 6Ω)
2.7.2 A SUPER-LIFT LUO-CONVERTER IN CCM2.7.3 A BOOST CONVERTER IN CCM (NO POWER LOSSES); 2.7.4 A BUCK-BOOST CONVERTER IN CCM (NO POWER LOSSES); 2.7.5 POSITIVE-OUTPUT LUO-CONVERTER IN CCM (NO POWER LOSSES); 2.8 Small signal analysis; 2.8.1 A BUCK CONVERTER IN CCM WITHOUT ENERGY LOSSES (r[sub(L)] = 0); 2.8.2 BUCK-CONVERTER WITH SMALL ENERGY LOSSES (r[sub(L)] = 1.5Ω); 2.8.3 SUPER-LIFT LUO-CONVERTER WITH ENERGY LOSSES (r[sub(L)] = 0.12Ω); FURTHER READING; APPENDIX A - A SECOND-ORDER TRANSFER FUNCTION; A.1 Very Small Damping Time Constant; A.2 Small Damping Time Constant
A.3 Critical Damping Time Constant
Record Nr. UNINA-9910816265603321
Luo Fang Lin  
London, : Elsevier Academic, 2005
Materiale a stampa
Lo trovi qui: Univ. Federico II
Opac: Controlla la disponibilità qui
Digital principles and circuits [[electronic resource] /] / C.B. Agarwal
Digital principles and circuits [[electronic resource] /] / C.B. Agarwal
Autore Agarwal C. B
Edizione [1st ed.]
Pubbl/distr/stampa Mumbai [India], : Himalaya Pub. House, 2006
Descrizione fisica 1 online resource (469 p.)
Disciplina 621.395
Soggetto topico Digital electronics
Electronic circuits
Soggetto genere / forma Electronic books.
ISBN 1-282-80165-1
9786612801655
1-4416-6132-8
93-5043-319-2
600-00-2700-1
Formato Materiale a stampa
Livello bibliografico Monografia
Lingua di pubblicazione eng
Nota di contenuto COVER; CONTENTS; CHAPTER 1 : DIGITAL CONCEPTS; CHAPTER 2 :NUMBER SYSTEMS; CHAPTER 3 :BINARY CODES; CHAPTER 4 :LOGIC GATES AND IC FAMILIES; CHAPTER 5 :BOOLEAN ALGEBRA; CHAPTER 6 :COMBINATIONAL CIRCUITS; CHAPTER 7 :FLIP-FLOPS AND REGISTERS; CHAPTER 8 :DIGITAL COUNTERS; CHAPTER 9 :MEMORY SYSTEMS; CHAPTER 10 :D/A CONVERTERS AND A/D CONVERTERS; APPENDIX A; APPENDIX B; APPENDIX C; INDEX
Record Nr. UNINA-9910459288703321
Agarwal C. B  
Mumbai [India], : Himalaya Pub. House, 2006
Materiale a stampa
Lo trovi qui: Univ. Federico II
Opac: Controlla la disponibilità qui
Digital principles and circuits [[electronic resource] /] / C.B. Agarwal
Digital principles and circuits [[electronic resource] /] / C.B. Agarwal
Autore Agarwal C. B
Edizione [1st ed.]
Pubbl/distr/stampa Mumbai [India], : Himalaya Pub. House, 2006
Descrizione fisica 1 online resource (469 p.)
Disciplina 621.395
Soggetto topico Digital electronics
Electronic circuits
ISBN 1-282-80165-1
9786612801655
1-4416-6132-8
93-5043-319-2
600-00-2700-1
Formato Materiale a stampa
Livello bibliografico Monografia
Lingua di pubblicazione eng
Nota di contenuto COVER; CONTENTS; CHAPTER 1 : DIGITAL CONCEPTS; CHAPTER 2 :NUMBER SYSTEMS; CHAPTER 3 :BINARY CODES; CHAPTER 4 :LOGIC GATES AND IC FAMILIES; CHAPTER 5 :BOOLEAN ALGEBRA; CHAPTER 6 :COMBINATIONAL CIRCUITS; CHAPTER 7 :FLIP-FLOPS AND REGISTERS; CHAPTER 8 :DIGITAL COUNTERS; CHAPTER 9 :MEMORY SYSTEMS; CHAPTER 10 :D/A CONVERTERS AND A/D CONVERTERS; APPENDIX A; APPENDIX B; APPENDIX C; INDEX
Record Nr. UNINA-9910785194303321
Agarwal C. B  
Mumbai [India], : Himalaya Pub. House, 2006
Materiale a stampa
Lo trovi qui: Univ. Federico II
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Digital principles and circuits [[electronic resource] /] / C.B. Agarwal
Digital principles and circuits [[electronic resource] /] / C.B. Agarwal
Autore Agarwal C. B
Edizione [1st ed.]
Pubbl/distr/stampa Mumbai [India], : Himalaya Pub. House, 2006
Descrizione fisica 1 online resource (469 p.)
Disciplina 621.395
Soggetto topico Digital electronics
Electronic circuits
ISBN 1-282-80165-1
9786612801655
1-4416-6132-8
93-5043-319-2
600-00-2700-1
Formato Materiale a stampa
Livello bibliografico Monografia
Lingua di pubblicazione eng
Nota di contenuto COVER; CONTENTS; CHAPTER 1 : DIGITAL CONCEPTS; CHAPTER 2 :NUMBER SYSTEMS; CHAPTER 3 :BINARY CODES; CHAPTER 4 :LOGIC GATES AND IC FAMILIES; CHAPTER 5 :BOOLEAN ALGEBRA; CHAPTER 6 :COMBINATIONAL CIRCUITS; CHAPTER 7 :FLIP-FLOPS AND REGISTERS; CHAPTER 8 :DIGITAL COUNTERS; CHAPTER 9 :MEMORY SYSTEMS; CHAPTER 10 :D/A CONVERTERS AND A/D CONVERTERS; APPENDIX A; APPENDIX B; APPENDIX C; INDEX
Record Nr. UNINA-9910823700103321
Agarwal C. B  
Mumbai [India], : Himalaya Pub. House, 2006
Materiale a stampa
Lo trovi qui: Univ. Federico II
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Digital principles switching theory [[electronic resource] /] / A.K. Singh, Manish Tiwari, Arun Prakash
Digital principles switching theory [[electronic resource] /] / A.K. Singh, Manish Tiwari, Arun Prakash
Autore Singh A. K
Edizione [2nd ed.]
Pubbl/distr/stampa New Delhi, : New Age International (P) Ltd., Publishers, c2006
Descrizione fisica 1 online resource (545 p.)
Disciplina 621.3815
621.3815/37
Altri autori (Persone) TiwariManish
PrakashArun
Soggetto topico Digital electronics
Switching theory
Soggetto genere / forma Electronic books.
ISBN 1-281-44964-4
81-224-2306-X
Formato Materiale a stampa
Livello bibliografico Monografia
Lingua di pubblicazione eng
Nota di contenuto Cover; Preface; Contents; Chapter 0 Introduction to Digital Electronics; Chapter 1 Numbering Systems; Chapter 2 Digital Design Fundamentals-Boolean Algebra and Logic Gates; Chapter 3 Boolean Function Minimization Techniques; Chapter 4 Combinational Logic; Chapter 5 Programmable Logic Devices; Chapter 6 Synchronous (Clocked) Sequential Circuits; Chapter 7 Shift Registers and Counters; Chapter 8 Asynchronous Sequential Logic; Chapter 9 Algorithmic State Machine; Chapter 10 Switching Elements and Implementation of Logic Gates; Chapter 11 Memory Fundamentals; Appendices; References; Index
Record Nr. UNINA-9910454712603321
Singh A. K  
New Delhi, : New Age International (P) Ltd., Publishers, c2006
Materiale a stampa
Lo trovi qui: Univ. Federico II
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