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Introduction to electromagnetic compatibility [[electronic resource] /] / Clayton R. Paul
Introduction to electromagnetic compatibility [[electronic resource] /] / Clayton R. Paul
Autore Paul Clayton R
Edizione [2nd ed.]
Pubbl/distr/stampa Hoboken, N.J., : Wiley-Interscience, c2006
Descrizione fisica 1 online resource (1013 p.)
Disciplina 621.382/24
621.38224
Collana Wiley series in microwave and optical engineering
Soggetto topico Electromagnetic compatibility
Electronic circuits - Noise
Digital electronics
Shielding (Electricity)
ISBN 1-280-28820-5
9786610288205
1-61344-509-1
0-470-36407-6
0-471-75815-9
0-471-75814-0
Formato Materiale a stampa
Livello bibliografico Monografia
Lingua di pubblicazione eng
Nota di contenuto Introduction to Electromagnetic Compatibility Second Edition; Contents; Preface; 1 Introduction to Electromagnetic Compatibility (EMC); 1.1 Aspects of EMC; 1.2 History of EMC; 1.3 Examples; 1.4 Electrical Dimensions and Waves; 1.5 Decibels and Common EMC Units; 1.5.1 Power Loss in Cables; 1.5.2 Signal Source Specification; Problems; References; 2 EMC Requirements for Electronic Systems; 2.1 Governmental Requirements; 2.1.1 Requirements for Commercial Products Marketed in the United States; 2.1.2 Requirements for Commercial Products Marketed outside the United States
2.1.3 Requirements for Military Products Marketed in the United States2.1.4 Measurement of Emissions for Verification of Compliance; 2.1.4.1 Radiated Emissions; 2.1.4.2 Conducted Emissions; 2.1.5 Typical Product Emissions; 2.1.6 A Simple Example to Illustrate the Difficulty in Meeting the Regulatory Limits; 2.2 Additional Product Requirements; 2.2.1 Radiated Susceptibility (Immunity); 2.2.2 Conducted Susceptibility (Immunity); 2.2.3 Electrostatic Discharge (ESD); 2.2.4 Requirements for Commercial Aircraft; 2.2.5 Requirements for Commercial Vehicles; 2.3 Design Constraints for Products
2.4 Advantages of EMC DesignProblems; References; 3 Signal Spectra-the Relationship between the Time Domain and the Frequency Domain; 3.1 Periodic Signals; 3.1.1 The Fourier Series Representation of Periodic Signals; 3.1.2 Response of Linear Systems to Periodic Input Signals; 3.1.3 Important Computational Techniques; 3.2 Spectra of Digital Waveforms; 3.2.1 The Spectrum of Trapezoidal (Clock) Waveforms; 3.2.2 Spectral Bounds for Trapezoidal Waveforms; 3.2.2.1 Effect of Rise/Falltime on Spectral Content; 3.2.2.2 Bandwidth of Digital Waveforms; 3.2.2.3 Effect of Repetition Rate and Duty Cycle
3.2.2.4 Effect of Ringing (Undershoot/Overshoot)3.2.3 Use of Spectral Bounds in Computing Bounds on the Output Spectrum of a Linear System; 3.3 Spectrum Analyzers; 3.3.1 Basic Principles; 3.3.2 Peak versus Quasi-Peak versus Average; 3.4 Representation of Nonperiodic Waveforms; 3.4.1 The Fourier Transform; 3.4.2 Response of Linear Systems to Nonperiodic Inputs; 3.5 Representation of Random (Data) Signals; 3.6 Use of SPICE (PSPICE) In Fourier Analysis; Problems; References; 4 Transmission Lines and Signal Integrity; 4.1 The Transmission-Line Equations; 4.2 The Per-Unit-Length Parameters
4.2.1 Wire-Type Structures4.2.2 Printed Circuit Board (PCB) Structures; 4.3 The Time-Domain Solution; 4.3.1 Graphical Solutions; 4.3.2 The SPICE Model; 4.4 High-Speed Digital Interconnects and Signal Integrity; 4.4.1 Effect of Terminations on the Line Waveforms; 4.4.1.1 Effect of Capacitive Terminations; 4.4.1.2 Effect of Inductive Terminations; 4.4.2 Matching Schemes for Signal Integrity; 4.4.3 When Does the Line Not Matter, i.e., When is Matching Not Required?; 4.4.4 Effects of Line Discontinuities; 4.5 Sinusoidal Excitation of the Line and the Phasor Solution
4.5.1 Voltage and Current as Functions of Position
Record Nr. UNINA-9910143404503321
Paul Clayton R  
Hoboken, N.J., : Wiley-Interscience, c2006
Materiale a stampa
Lo trovi qui: Univ. Federico II
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Introduction to electromagnetic compatibility [[electronic resource] /] / Clayton R. Paul
Introduction to electromagnetic compatibility [[electronic resource] /] / Clayton R. Paul
Autore Paul Clayton R
Edizione [2nd ed.]
Pubbl/distr/stampa Hoboken, N.J., : Wiley-Interscience, c2006
Descrizione fisica 1 online resource (1013 p.)
Disciplina 621.382/24
621.38224
Collana Wiley series in microwave and optical engineering
Soggetto topico Electromagnetic compatibility
Electronic circuits - Noise
Digital electronics
Shielding (Electricity)
ISBN 1-280-28820-5
9786610288205
1-61344-509-1
0-470-36407-6
0-471-75815-9
0-471-75814-0
Formato Materiale a stampa
Livello bibliografico Monografia
Lingua di pubblicazione eng
Nota di contenuto Introduction to Electromagnetic Compatibility Second Edition; Contents; Preface; 1 Introduction to Electromagnetic Compatibility (EMC); 1.1 Aspects of EMC; 1.2 History of EMC; 1.3 Examples; 1.4 Electrical Dimensions and Waves; 1.5 Decibels and Common EMC Units; 1.5.1 Power Loss in Cables; 1.5.2 Signal Source Specification; Problems; References; 2 EMC Requirements for Electronic Systems; 2.1 Governmental Requirements; 2.1.1 Requirements for Commercial Products Marketed in the United States; 2.1.2 Requirements for Commercial Products Marketed outside the United States
2.1.3 Requirements for Military Products Marketed in the United States2.1.4 Measurement of Emissions for Verification of Compliance; 2.1.4.1 Radiated Emissions; 2.1.4.2 Conducted Emissions; 2.1.5 Typical Product Emissions; 2.1.6 A Simple Example to Illustrate the Difficulty in Meeting the Regulatory Limits; 2.2 Additional Product Requirements; 2.2.1 Radiated Susceptibility (Immunity); 2.2.2 Conducted Susceptibility (Immunity); 2.2.3 Electrostatic Discharge (ESD); 2.2.4 Requirements for Commercial Aircraft; 2.2.5 Requirements for Commercial Vehicles; 2.3 Design Constraints for Products
2.4 Advantages of EMC DesignProblems; References; 3 Signal Spectra-the Relationship between the Time Domain and the Frequency Domain; 3.1 Periodic Signals; 3.1.1 The Fourier Series Representation of Periodic Signals; 3.1.2 Response of Linear Systems to Periodic Input Signals; 3.1.3 Important Computational Techniques; 3.2 Spectra of Digital Waveforms; 3.2.1 The Spectrum of Trapezoidal (Clock) Waveforms; 3.2.2 Spectral Bounds for Trapezoidal Waveforms; 3.2.2.1 Effect of Rise/Falltime on Spectral Content; 3.2.2.2 Bandwidth of Digital Waveforms; 3.2.2.3 Effect of Repetition Rate and Duty Cycle
3.2.2.4 Effect of Ringing (Undershoot/Overshoot)3.2.3 Use of Spectral Bounds in Computing Bounds on the Output Spectrum of a Linear System; 3.3 Spectrum Analyzers; 3.3.1 Basic Principles; 3.3.2 Peak versus Quasi-Peak versus Average; 3.4 Representation of Nonperiodic Waveforms; 3.4.1 The Fourier Transform; 3.4.2 Response of Linear Systems to Nonperiodic Inputs; 3.5 Representation of Random (Data) Signals; 3.6 Use of SPICE (PSPICE) In Fourier Analysis; Problems; References; 4 Transmission Lines and Signal Integrity; 4.1 The Transmission-Line Equations; 4.2 The Per-Unit-Length Parameters
4.2.1 Wire-Type Structures4.2.2 Printed Circuit Board (PCB) Structures; 4.3 The Time-Domain Solution; 4.3.1 Graphical Solutions; 4.3.2 The SPICE Model; 4.4 High-Speed Digital Interconnects and Signal Integrity; 4.4.1 Effect of Terminations on the Line Waveforms; 4.4.1.1 Effect of Capacitive Terminations; 4.4.1.2 Effect of Inductive Terminations; 4.4.2 Matching Schemes for Signal Integrity; 4.4.3 When Does the Line Not Matter, i.e., When is Matching Not Required?; 4.4.4 Effects of Line Discontinuities; 4.5 Sinusoidal Excitation of the Line and the Phasor Solution
4.5.1 Voltage and Current as Functions of Position
Record Nr. UNINA-9910677904303321
Paul Clayton R  
Hoboken, N.J., : Wiley-Interscience, c2006
Materiale a stampa
Lo trovi qui: Univ. Federico II
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Introduction to switching theory and logical design / Fredrick J. Hill, Gerald R. Peterson
Introduction to switching theory and logical design / Fredrick J. Hill, Gerald R. Peterson
Autore Hill, Fredrick J.
Edizione [2nd ed.]
Pubbl/distr/stampa New York : John Wiley & Sons, 1974
Descrizione fisica xvii, 596 p. ; 23 cm.
Altri autori (Persone) Peterson, Gerald R.
Soggetto topico Digital electronics
ISBN 0471398829
Classificazione 621.3.9.2
621.3.9.4
621.3819'58'2
TK7868.S9H5
Formato Materiale a stampa
Livello bibliografico Monografia
Lingua di pubblicazione eng
Record Nr. UNISALENTO-991001027199707536
Hill, Fredrick J.  
New York : John Wiley & Sons, 1974
Materiale a stampa
Lo trovi qui: Univ. del Salento
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Mastering Digital Electronics : An Ultimate Guide to Logic Circuits and Advanced Circuitry
Mastering Digital Electronics : An Ultimate Guide to Logic Circuits and Advanced Circuitry
Autore Ward Hubert Henry
Edizione [1st ed.]
Pubbl/distr/stampa Berkeley, CA : , : Apress L. P., , 2023
Descrizione fisica 1 online resource (505 pages)
Disciplina 621.3815
Collana Maker Innovations Series
Soggetto topico Digital electronics
ISBN 1-4842-9878-0
Formato Materiale a stampa
Livello bibliografico Monografia
Lingua di pubblicazione eng
Nota di contenuto Intro -- Contents -- About the Author -- About the Technical Reviewer -- Introduction -- Chapter 1: Introduction to Logic Gates -- Integrated Circuits, or ICs -- Gate Technology -- The Main Differences Between TTL and CMOS -- Logic Families -- Fan-Out and Fan-In -- Unused Inputs -- Handling Logic ICs -- The Historical Circuits of the Logic Gates -- The Laws of Logic -- Diode-Resistor (DR) Logic -- Analysis of Diode-Resistor Circuit 1 -- Analysis of Diode-Resistor Circuit 2 -- Analysis of Circuit 3 -- The "4000" Series -- The PLA, or Programmable Logic Array -- The Binary Number System -- Binary Numbers -- Converting from Decimal to Binary -- Converting from Binary to Decimal -- Exercise 1 -- Adding and Subtracting Binary Numbers -- Worked Example -- Exercise 2 -- Subtracting Binary Numbers -- Worked Example -- Exercise 3 -- The Logic Gates -- The AND Gate -- The NAND Gate -- The OR Gate -- The NOR Gate -- The EXOR Gate -- The NOT Gate or Inverter -- Summary -- Chapter 2: Boolean Algebra -- What Is Boolean Algebra -- The Basic Concept -- The NOT Gate -- The AND and NAND Gates -- The OR and NOR Gates -- The Exclusive OR Gate, That Is, the EXOR Gate -- Deriving Boolean Expressions from Logic Circuits -- Boolean Derivation Circuit 1 -- Boolean Derivation Circuit 2 -- Boolean Derivation Circuit 3 -- Building Logic Circuits from Boolean Expressions -- Build Logic Circuit Example 1 -- Build Logic Circuit Example 2 -- Build Logic Circuit Example 3 -- Exercise 1 -- Exercise 2 -- The Laws of Boolean Algebra -- Commutative Law -- Commutative Example 1 -- Commutative Example 2 -- Associative Law -- Associative Law Example 1 -- Associative Law Example 2 -- Distributive Law -- Distributive Law Example 1 -- Distributive Law Example 2 -- Distribution Law Example 3 -- Absorption Law -- De Morgan's Theory -- De Morgan's Example 1 -- De Morgan's Example 2.
De Morgan's Examples 3 -- The OR Function with NAND Gates -- Summary -- Chapter 3: Simplifying Boolean Expressions -- Some Fundamental Identities -- The Inverse Law -- The Identity Law -- The Null Law -- The Idempotent Law -- The OR Version of the Idempotent Law -- The OR Version of the Identity Law -- The OR Version of the Null Law -- The OR Version of the Inverse Law -- Using Boolean Algebra to Minimize Expressions -- Simplification Example 1 -- Simplification Example 2 -- Simplification Example 3 -- Simplification Example 4 -- Simplification Example 5 -- Simplification Example 6 -- Karnaugh Maps -- Karnaugh Map Example 1 -- Using the Karnaugh Map -- Karnaugh Map Example 2 -- Simplification Examples -- Simplification Example 7 -- The 1st and 2nd Canonical Formats and the Minterms and Maxterms -- The 2nd Canonical Format -- Simplification Example 8 -- Simplification Example 9 -- Simplification Example 10 -- Simplification Example 11 -- Exercise 3.1 -- Exercise 3.2 -- Exercise 3.3 -- Exercise 3.4 -- Summary -- Chapter 4: Moving On from the NAND Gate -- The SR Latch -- The De-bounce Circuit -- The Basic SR Latch with NOR Gates -- The Indeterminate State -- The Clocked -- The Master-Slave Clocked SR -- The JK Flip Flop -- Using the JK Flip Flop -- The D-Type Latch -- The T Latch -- The Main Configurations for the JK Flip Flop -- The JK Flip Flop -- Summary -- Chapter 5: Design Methods for Digital Circuits -- Combinational and Sequential Logic -- Combinational Logic -- Sequential Logic -- Representing a Digital System -- Asynchronous and Synchronous Logic Systems -- The Ripple Counter -- Design Example 1: The Modulo 10 Counter -- Design Example 2: A Non-sequential Output -- Design Example 3: A Synchronized Sequential Circuit -- Exercise 5.1 -- Design Example 4: A Synchronized Up Counter -- Exercise 5.2 -- Design Example 5: A Modulo 6 Binary Counter.
Determining the Inputs for the Three D-Type Latches -- The D0 Inputs -- The D1 Inputs -- The D2 Inputs -- Synopsis -- Chapter 6: State Example 3 A Bit Stream Monitor -- State Diagrams -- The State Diagram of the JK Flip Flop -- Creating the JK Flip Flop State Table -- Methodology for Designing Sequential Digital Logic Circuits -- State Diagram Example 1: The Synchronized Binary Counter -- Determining the Inputs for the Four D-Type Latches -- The D0 Input -- Exercise 1 -- The D1 Input -- The D2 Input -- Exercise 2 -- State Diagram Example 2: The Design of a Modulo 10 Binary Counter Using State Diagrams -- The State Table -- Determining the Inputs for the Four D-Type Latches -- The D0 Input -- The D1 Input -- Exercise 3 -- State Diagram Example 3: A Bit Stream Monitor -- The D0 Inputs -- The D1 Expression -- State Diagram Example 4 -- The D0 Expression -- Exercise 4 -- Moore's and Mealy Diagrams -- Summary -- Chapter 7: Combinational Logic -- The Tri-state Buffer -- The Half Adder Circuit -- The Design of the Full Adder Circuit -- Exercise 1 -- A 3-Bit Full Adder -- The Binary Subtractor Circuit -- An Alternative Subtractor Circuit -- Subtracting by Adding Decimal Numbers -- A 4-Bit Multiplexer -- A Demultiplexer -- Digital Encoders -- Application of Digital Encoders -- The Digital Decoder -- A Seven-Segment Decoder Chip -- The Seven-Segment Display -- Common Anode Seven-Segment Display -- Common Cathode Seven-Segment Display -- Exercise 2 -- Summary -- Chapter 8: Shift Registers and More -- The D-Type Latch -- The 4-Bit Shift Register or SISO (Serial In Serial Out) -- The PISO (Parallel In Serial Out) Register -- The PIPO (Parallel In Parallel Out) Register -- The SIPO (Serial In Parallel Out) -- The Ring Counter -- The Johnson Ring Counter -- A Frequency Divider -- The Divide by 4 Johnson Ring Counter -- The Phase Shift Across the Latches -- Summary.
Chapter 9: Designing Some Useful Logic Circuits -- Example 1: A Design Process for a Single Set of Traffic Lights -- Analysis of the Output Logic -- Example 2: An Alternative Single Set of Traffic Lights -- Example 3: Adding a Pelican Crossing -- An Egg Timer Circuit -- The SN74168 -- The Practical IC We Have Looked At -- The 7400 Quad-Two-Input NAND Gate -- Counters -- The 7493 Binary Counter -- The SN74194 Multifunction Shift Register -- Summary -- Chapter 10: Introduction to the 555 Timer -- The 555 Timer -- The Pins of the 555 Timer -- The Timer Used as a Monostable -- The Basic Astable -- Creating a 50/50 Duty Cycle Square Wave -- Creating a 1Hz Square Wave -- A PWM Application -- Summary -- Chapter 11: Using TINA 12 -- What Is ECAD and TINA 12 -- Running the Software -- Creating Our First Test Circuit -- Using a Binary Counter -- Using Jumper Terminals -- Creating a Macro for the 7400 IC, a Quad-Two-I/P NAND Gate -- Using the Quad NAND 7400 Macro -- Summary -- Appendix: Appendix 1 -- Exercise 1 -- Exercise 2 -- Exercise 3 -- Exercise 4 -- Exercise 5 -- Appendix 2: Solutions for Exercises in the Chapters -- Chapter 1 -- Exercise 1 -- Exercise 2 -- Exercise 3 -- Chapter 2 -- Exercise 1 -- Exercise 2 -- Chapter 3 -- Exercise 3.1 -- Exercise 3.2 -- Exercise 3.3 -- Exercise 3.4 -- Chapter 7 -- Appendix: Exercises -- Exercise 1 -- Exercise 3 -- Exercise 5 -- Index.
Record Nr. UNINA-9910799205703321
Ward Hubert Henry  
Berkeley, CA : , : Apress L. P., , 2023
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Microwave and wireless synthesizers : theory and design / / Ulrich L. Rohde, Enrico Rubiola, Jerry C. Whitaker
Microwave and wireless synthesizers : theory and design / / Ulrich L. Rohde, Enrico Rubiola, Jerry C. Whitaker
Autore Rohde Ulrich L.
Edizione [Second edition.]
Pubbl/distr/stampa Hoboken, NJ : , : Wiley, , 2021
Descrizione fisica 1 online resource (xxii, 794 pages) : illustrations
Disciplina 621.3815486
Soggetto topico Frequency synthesizers - Design and construction
Phase-locked loops
Digital electronics
Microwave circuits - Design and construction
Radio frequency
Soggetto genere / forma Electronic books.
ISBN 1-5231-4359-2
1-119-66611-2
1-119-66609-0
1-119-66612-0
Formato Materiale a stampa
Livello bibliografico Monografia
Lingua di pubblicazione eng
Nota di contenuto Cover -- Title Page -- Copyright -- Contents -- Author Biography -- Preface -- Important Notations -- Chapter 1 Loop Fundamentals -- 1-1 Introduction to Linear Loops -- 1-2 Characteristics of a Loop -- 1-3 Digital Loops -- 1-4 Type 1 First‐Order Loop -- 1-5 Type 1 Second‐Order Loop -- 1-6 Type 2 Second‐Order Loop -- 1-6-1 Transient Behavior of Digital Loops Using Tri‐state Phase Detectors -- 1-7 Type 2 Third‐Order Loop -- 1-7-1 Transfer Function of Type 2 Third‐Order Loop -- 1-7-2 FM Noise Suppression -- 1-8 Higher‐Order Loops -- 1-8-1 Fifth‐Order Loop Transient Response -- 1-9 Digital Loops with Mixers -- 1-10 Acquisition -- 1-10-0 Example 1 -- 1-10-1 Pull‐in Performance of the Digital Loop -- 1-10-2 Coarse Steering of the VCO as an Acquisition Aid -- 1-10-3 Loop Stability -- References -- Suggested Reading -- Chapter 2 ALMOST ALL ABOUT PHASE NOISE -- 2-1 INTRODUCTION TO PHASE NOISE -- 2-1-1 The Clock Signal -- 2-1-2 The Power Spectral Density (PSD) -- 2-1-3 Basics of Noise -- 2-1-4 Phase and Frequency Noise -- 2-2 THE ALLAN VARIANCE AND OTHER TWO‐SAMPLE VARIANCES -- 2-2-1 Frequency Counters -- 2-2-2 The Two‐Sample Variances AVAR, MVAR, and PVAR -- 2-2-3 Conversion from Spectra to Two‐Sample Variances -- 2-3 PHASE NOISE IN COMPONENTS -- 2-3-1 Amplifiers -- 2-3-2 Frequency Dividers -- 2-3-3 Frequency Multipliers -- 2-3-4 Direct Digital Synthesizer (DDS) -- 2-3-5 Phase Detectors -- 2-3-6 Noise Contribution from Power Supplies -- 2-4 PHASE NOISE IN OSCILLATORS -- 2-4-1 Modern View of the Leeson Model -- 2-4-2 Circumventing the Resonator's Thermal Noise -- 2-4-3 Oscillator Hacking -- 2-5 THE MEASUREMENT OF PHASE NOISE -- 2-5-1 Double‐Balanced Mixer Instruments -- 2-5-2 The Cross‐Spectrum Method -- 2-5-3 Digital Instruments -- 2-5-4 Pitfalls and Limitations of the Cross‐Spectrum Measurements -- 2-5-5 The Bridge (Interferometric) Method.
2-5-6 Artifacts and Oddities Often Found in the Real World -- 2-5 References -- 2-5 SUGGESTED READINGS -- 2-5-6 Power spectra and Fourier transform -- 2-5-6 Electromagnetic Compatibility -- 2-5-6 General Aspects of Noise -- 2-5-6 Phase Noise, Frequency Stability, and Measurements -- 2-5-6 Amplifiers -- 2-5-6 Frequency Dividers -- 2-5-6 Frequency Multipliers -- 2-5-6 DDS -- 2-5-6 Phase‐Frequency Detectors -- 2-5-6 Oscillators -- 2-5-6 Resonators -- 2-5-6 Double‐Balanced Mixer -- Chapter 3 Special Loops -- 3-1 Introduction -- 3-2 Direct Digital Synthesis Techniques -- 3-2-1 A First Look at Fractional N -- 3-2-2 Digital Waveform Synthesizers -- 3-2-3 Signal Quality -- 3-2-4 Future Prospects -- 3-3 Loops with Delay Line as Phase Comparators -- 3-4 Fractional Division N Synthesizers -- 3-4-1 Example Implementation -- 3-4-2 Some Special Past Patents for Fractional Division N Synthesizers -- References -- Bibliography -- FRACTIONAL DIVISION N READINGS -- Chapter 4 LOOP COMPONENTS -- 4-1 INTRODUCTION TO OSCILLATORS AND THEIR MATHEMATICAL TREATMENT -- 4-2 THE COLPITTS OSCILLATOR -- 4-2-1 Linear Approach -- 4-2-2 Design Example for a 350 MHz Fixed‐Frequency Colpitts Oscillator -- 4-2-3 Validation Circuits -- 4-2-4 Series Feedback Oscillator [5, Appendix A, pp. 384-388] -- 4-2-5 2400 MHz MOSFET‐Based Push-Pull Oscillator -- 4-2-6 Oscillators for IC Applications -- 4-2-7 Noise in Semiconductors and Circuits -- 4-2-8 Summary -- 4-3 USE OF TUNING DIODES -- 4-3-1 Diode Tuned Resonant Circuits -- 4-3-2 Practical Circuits -- 4-4 USE OF DIODE SWITCHES -- 4-4-1 Diode Switches for Electronic Band Selection -- 4-4-2 Use of Diodes for Frequency Multiplication -- 4-5 REFERENCE FREQUENCY STANDARDS -- 4-5-1 Specifying Oscillators -- 4-5-2 Typical Examples of Crystal Oscillator Specifications -- 4-6 MIXER APPLICATIONS -- 4-7 PHASE/FREQUENCY COMPARATORS -- 4-7-1 Diode Rings.
4-7-2 Exclusive ORs -- 4-7-3 Sample/Hold Detectors -- 4-7-4 Edge‐Triggered JK Master/Slave Flip‐Flops -- 4-7-5 Digital Tri‐State Comparators -- 4-8 WIDEBAND HIGH‐GAIN AMPLIFIERS -- 4-8-1 Summation Amplifiers -- 4-8-2 Differential Limiters -- 4-8-3 Isolation Amplifiers -- 4-8-4 Example Implementations -- 4-9 PROGRAMMABLE DIVIDERS -- 4-9-1 Asynchronous Counters -- 4-9-2 Programmable Synchronous Up‐/Down‐Counters -- 4-9-3 Advanced Implementation Example -- 4-9-4 Swallow Counters/Dual‐Modulus Counters -- 4-9-5 Look‐Ahead and Delay Compensation -- 4-10 LOOP FILTERS -- 4-10-1 Passive RC Filters -- 4-10-2 Active RC Filters -- 4-10-3 Active Second‐Order Low‐Pass Filters -- 4-10-4 Passive LC Filters -- 4-10-5 Spur‐Suppression Techniques -- 4-11 MICROWAVE OSCILLATOR DESIGN -- 4-11-1 The Compressed Smith Chart -- 4-11-2 Series or Parallel Resonance -- 4-11-3 Two‐Port Oscillator Design -- 4-12 MICROWAVE RESONATORS -- 4-12-1 SAW Oscillators -- 4-12-2 Dielectric Resonators -- 4-12-3 YIG Oscillators -- 4-12-4 Varactor Resonators -- 4-12-5 Ceramic Resonators -- 4-12 REFERENCES -- 4-12 SUGGESTED READINGS -- 4-12-5 Section 4‐3 Documents -- 4-12-5 Section 4‐5 Documents -- 4-12-5 Section 4‐6 Documents -- 4-12-5 Section 4‐7 Documents -- 4-12-5 Section 4‐8 Documents -- 4-12-5 Section 4.9 Documents -- 4-12-5 Section 4.10 Documents -- 4-12-5 Section 4.11 Documents -- 4-12-5 Section 4.12 Documents -- Chapter 5 Digital PLL Synthesizers -- 5-1 Multiloop Synthesizers Using Different Techniques -- 5-1-1 Direct Frequency Synthesis -- 5-1-2 Multiple Loops -- 5-2 System Analysis -- 5-3 Low‐Noise Microwave Synthesizers -- 5-3-1 Building Blocks -- 5-3-2 Output Loop Response -- 5-3-3 Low Phase Noise References: Frequency Standards -- 5-3-4 Critical Stage -- 5-3-5 Time Domain Analysis -- 5-3-6 Summary -- 5-3-7 Two Commercial Synthesizer Examples.
5-4 Microprocessor Applications in Synthesizers -- 5-5 Transceiver Applications -- 5-6 About Bits, Symbols, and Waveforms -- 5-6-1 Representation of a Modulated RF Carrier -- 5-6-2 Generation of the Modulated Carrier -- 5-6-3 Putting It all Together -- 5-6-4 Combination of Techniques -- 5-6 Acknowledgments -- 5-6 References -- 5-6 Bibliography and Suggested Reading -- Chapter 6 A High‐Performance Hybrid Synthesizer -- 6-1 Introduction -- 6-2 Basic Synthesizer Approach -- 6-3 Loop Filter Design -- 6-4 Summary -- Bibliography -- Chapter A Mathematical Review -- A-1 FUNCTIONS OF A COMPLEX VARIABLE -- A-2 COMPLEX PLANES -- A-2-1 Functions in the Complex Frequency Plane -- A-3 BODE DIAGRAM -- A-4 LAPLACE TRANSFORM -- A-4-1 The Step Function -- A-4-2 The Ramp -- A-4-3 Linearity Theorem -- A-4-4 Differentiation and Integration -- A-4-5 Initial Value Theorem -- A-4-6 Final Value Theorem -- A-4-7 The Active Integrator -- A-4-8 Locking Behavior of the PLL -- A-5 LOW‐NOISE OSCILLATOR DESIGN -- A-5-1 Example Implementation -- A-6 OSCILLATOR AMPLITUDE STABILIZATION -- A-7 VERY LOW PHASE NOISE VCO FOR 800 MHZ -- REFERENCES -- Chapter B A General‐Purpose Nonlinear Approach to the Computation of Sideband Phase Noise in Free‐Running Microwave and RF Oscillators -- B-1 Introduction -- B-2 Noise Generation in Oscillators -- B-3 Bias‐Dependent Noise Model -- B-3-1 Bias‐Dependent Model -- B-3-2 Derivation of the Model -- B-4 General Concept of Noisy Circuits -- B-4-1 Noise from Linear Elements -- B-5 Noise Figure of Mixer Circuits -- B-6 Oscillator Noise Analysis -- B-7 Limitations of the Frequency‐Conversion Approach -- B-7-1 Assumptions -- B-7-2 Conversion and Modulation Noise -- B-7-3 Properties of Modulation Noise -- B-7-4 Noise Analysis of Autonomous Circuits -- B-7-5 Conversion Noise Analysis Results -- B-7-6 Modulation Noise Analysis Results.
B-8 Summary of the Phase Noise Spectrum of the Oscillator -- B-9 Verification Examples for the Calculation of Phase Noise in Oscillators Using Nonlinear Techniques -- B-9-1 Example 1: High‐Q Case Microstrip DRO -- B-9-2 Example 2: 10 MHz Crystal Oscillator -- B-9-3 Example 3: The 1‐GHz Ceramic Resonator VCO -- B-9-4 Example 4: Low Phase Noise FET Oscillator -- B-9-5 Example 5: Millimeter‐Wave Applications -- B-9-6 Example 6: Discriminator Stabilized DRO -- B-10 Summary -- B-10 References -- Chapter C EXAMPLE OF WIRELESS SYNTHESIZERS USING COMMERCIAL ICs -- Chapter D MMIC‐BASED SYNTHESIZERS -- D-1 INTRODUCTION -- BIBLIOGRAPHY -- Chapter E ARTICLES ON DESIGN OF DIELECTRIC RESONATOR OSCILLATORS -- E-1 THE DESIGN OF AN ULTRA‐LOW PHASE NOISE DRO -- E-1-1 Basic Considerations and Component Selection -- E-1-2 Component Selection -- E-1-3 DRO Topologies -- E-1-4 Small Signal Design Approach for the Parallel Feedback Type DRO -- E-1-5 Simulated Versus Measured Results -- E-1-6 Physical Embodiment -- E-1-7 Acknowledgments -- E-1-8 Final Remarks -- REFERENCES -- BIBLIOGRAPHY -- E-2 A NOVEL OSCILLATOR DESIGN WITH METAMATERIAL‐MÖBIUS COUPLING TO A DIELECTRIC RESONATOR -- E-2-1 Abstract -- E-2-2 Introduction -- REFERENCES -- Chapter F OPTO‐ELECTRONICALLY STABILIZED RF OSCILLATORS -- F-1 INTRODUCTION -- F-1-1 Oscillator Basics -- F-1-2 Resonator Technologies -- F-1-3 Motivation for OEO -- F-1-4 Operation Principle of the OEO -- F-2 EXPERIMENTAL EVALUATION AND THERMAL STABILITY OF OEO -- F-2-1 Experimental Setup -- F-2-2 Phase Noise Measurements -- F-2-3 Thermal Sensitivity Analysis of Standard Fibers -- F-2-4 Temperature Sensitivity Measurements -- F-2-5 Temperature Sensitivity Improvement with HC‐PCF -- F-2-6 Improve Thermal Stability Versus Phase Noise Degradation -- F-2-7 Passive Temperature Compensation -- F-2-8 Improving Effective Q with Raman Amplification.
F-3 FORCED OSCILLATION TECHNIQUES OF OEO.
Record Nr. UNINA-9910555149603321
Rohde Ulrich L.  
Hoboken, NJ : , : Wiley, , 2021
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Microwave and wireless synthesizers : theory and design / / Ulrich L. Rohde, Enrico Rubiola, Jerry C. Whitaker
Microwave and wireless synthesizers : theory and design / / Ulrich L. Rohde, Enrico Rubiola, Jerry C. Whitaker
Autore Rohde Ulrich L.
Edizione [Second edition.]
Pubbl/distr/stampa Hoboken, NJ : , : Wiley, , 2021
Descrizione fisica 1 online resource (xxii, 794 pages) : illustrations
Disciplina 621.3815486
Soggetto topico Frequency synthesizers - Design and construction
Phase-locked loops
Digital electronics
Microwave circuits - Design and construction
Radio frequency
ISBN 1-5231-4359-2
1-119-66611-2
1-119-66609-0
1-119-66612-0
Formato Materiale a stampa
Livello bibliografico Monografia
Lingua di pubblicazione eng
Nota di contenuto Cover -- Title Page -- Copyright -- Contents -- Author Biography -- Preface -- Important Notations -- Chapter 1 Loop Fundamentals -- 1-1 Introduction to Linear Loops -- 1-2 Characteristics of a Loop -- 1-3 Digital Loops -- 1-4 Type 1 First‐Order Loop -- 1-5 Type 1 Second‐Order Loop -- 1-6 Type 2 Second‐Order Loop -- 1-6-1 Transient Behavior of Digital Loops Using Tri‐state Phase Detectors -- 1-7 Type 2 Third‐Order Loop -- 1-7-1 Transfer Function of Type 2 Third‐Order Loop -- 1-7-2 FM Noise Suppression -- 1-8 Higher‐Order Loops -- 1-8-1 Fifth‐Order Loop Transient Response -- 1-9 Digital Loops with Mixers -- 1-10 Acquisition -- 1-10-0 Example 1 -- 1-10-1 Pull‐in Performance of the Digital Loop -- 1-10-2 Coarse Steering of the VCO as an Acquisition Aid -- 1-10-3 Loop Stability -- References -- Suggested Reading -- Chapter 2 ALMOST ALL ABOUT PHASE NOISE -- 2-1 INTRODUCTION TO PHASE NOISE -- 2-1-1 The Clock Signal -- 2-1-2 The Power Spectral Density (PSD) -- 2-1-3 Basics of Noise -- 2-1-4 Phase and Frequency Noise -- 2-2 THE ALLAN VARIANCE AND OTHER TWO‐SAMPLE VARIANCES -- 2-2-1 Frequency Counters -- 2-2-2 The Two‐Sample Variances AVAR, MVAR, and PVAR -- 2-2-3 Conversion from Spectra to Two‐Sample Variances -- 2-3 PHASE NOISE IN COMPONENTS -- 2-3-1 Amplifiers -- 2-3-2 Frequency Dividers -- 2-3-3 Frequency Multipliers -- 2-3-4 Direct Digital Synthesizer (DDS) -- 2-3-5 Phase Detectors -- 2-3-6 Noise Contribution from Power Supplies -- 2-4 PHASE NOISE IN OSCILLATORS -- 2-4-1 Modern View of the Leeson Model -- 2-4-2 Circumventing the Resonator's Thermal Noise -- 2-4-3 Oscillator Hacking -- 2-5 THE MEASUREMENT OF PHASE NOISE -- 2-5-1 Double‐Balanced Mixer Instruments -- 2-5-2 The Cross‐Spectrum Method -- 2-5-3 Digital Instruments -- 2-5-4 Pitfalls and Limitations of the Cross‐Spectrum Measurements -- 2-5-5 The Bridge (Interferometric) Method.
2-5-6 Artifacts and Oddities Often Found in the Real World -- 2-5 References -- 2-5 SUGGESTED READINGS -- 2-5-6 Power spectra and Fourier transform -- 2-5-6 Electromagnetic Compatibility -- 2-5-6 General Aspects of Noise -- 2-5-6 Phase Noise, Frequency Stability, and Measurements -- 2-5-6 Amplifiers -- 2-5-6 Frequency Dividers -- 2-5-6 Frequency Multipliers -- 2-5-6 DDS -- 2-5-6 Phase‐Frequency Detectors -- 2-5-6 Oscillators -- 2-5-6 Resonators -- 2-5-6 Double‐Balanced Mixer -- Chapter 3 Special Loops -- 3-1 Introduction -- 3-2 Direct Digital Synthesis Techniques -- 3-2-1 A First Look at Fractional N -- 3-2-2 Digital Waveform Synthesizers -- 3-2-3 Signal Quality -- 3-2-4 Future Prospects -- 3-3 Loops with Delay Line as Phase Comparators -- 3-4 Fractional Division N Synthesizers -- 3-4-1 Example Implementation -- 3-4-2 Some Special Past Patents for Fractional Division N Synthesizers -- References -- Bibliography -- FRACTIONAL DIVISION N READINGS -- Chapter 4 LOOP COMPONENTS -- 4-1 INTRODUCTION TO OSCILLATORS AND THEIR MATHEMATICAL TREATMENT -- 4-2 THE COLPITTS OSCILLATOR -- 4-2-1 Linear Approach -- 4-2-2 Design Example for a 350 MHz Fixed‐Frequency Colpitts Oscillator -- 4-2-3 Validation Circuits -- 4-2-4 Series Feedback Oscillator [5, Appendix A, pp. 384-388] -- 4-2-5 2400 MHz MOSFET‐Based Push-Pull Oscillator -- 4-2-6 Oscillators for IC Applications -- 4-2-7 Noise in Semiconductors and Circuits -- 4-2-8 Summary -- 4-3 USE OF TUNING DIODES -- 4-3-1 Diode Tuned Resonant Circuits -- 4-3-2 Practical Circuits -- 4-4 USE OF DIODE SWITCHES -- 4-4-1 Diode Switches for Electronic Band Selection -- 4-4-2 Use of Diodes for Frequency Multiplication -- 4-5 REFERENCE FREQUENCY STANDARDS -- 4-5-1 Specifying Oscillators -- 4-5-2 Typical Examples of Crystal Oscillator Specifications -- 4-6 MIXER APPLICATIONS -- 4-7 PHASE/FREQUENCY COMPARATORS -- 4-7-1 Diode Rings.
4-7-2 Exclusive ORs -- 4-7-3 Sample/Hold Detectors -- 4-7-4 Edge‐Triggered JK Master/Slave Flip‐Flops -- 4-7-5 Digital Tri‐State Comparators -- 4-8 WIDEBAND HIGH‐GAIN AMPLIFIERS -- 4-8-1 Summation Amplifiers -- 4-8-2 Differential Limiters -- 4-8-3 Isolation Amplifiers -- 4-8-4 Example Implementations -- 4-9 PROGRAMMABLE DIVIDERS -- 4-9-1 Asynchronous Counters -- 4-9-2 Programmable Synchronous Up‐/Down‐Counters -- 4-9-3 Advanced Implementation Example -- 4-9-4 Swallow Counters/Dual‐Modulus Counters -- 4-9-5 Look‐Ahead and Delay Compensation -- 4-10 LOOP FILTERS -- 4-10-1 Passive RC Filters -- 4-10-2 Active RC Filters -- 4-10-3 Active Second‐Order Low‐Pass Filters -- 4-10-4 Passive LC Filters -- 4-10-5 Spur‐Suppression Techniques -- 4-11 MICROWAVE OSCILLATOR DESIGN -- 4-11-1 The Compressed Smith Chart -- 4-11-2 Series or Parallel Resonance -- 4-11-3 Two‐Port Oscillator Design -- 4-12 MICROWAVE RESONATORS -- 4-12-1 SAW Oscillators -- 4-12-2 Dielectric Resonators -- 4-12-3 YIG Oscillators -- 4-12-4 Varactor Resonators -- 4-12-5 Ceramic Resonators -- 4-12 REFERENCES -- 4-12 SUGGESTED READINGS -- 4-12-5 Section 4‐3 Documents -- 4-12-5 Section 4‐5 Documents -- 4-12-5 Section 4‐6 Documents -- 4-12-5 Section 4‐7 Documents -- 4-12-5 Section 4‐8 Documents -- 4-12-5 Section 4.9 Documents -- 4-12-5 Section 4.10 Documents -- 4-12-5 Section 4.11 Documents -- 4-12-5 Section 4.12 Documents -- Chapter 5 Digital PLL Synthesizers -- 5-1 Multiloop Synthesizers Using Different Techniques -- 5-1-1 Direct Frequency Synthesis -- 5-1-2 Multiple Loops -- 5-2 System Analysis -- 5-3 Low‐Noise Microwave Synthesizers -- 5-3-1 Building Blocks -- 5-3-2 Output Loop Response -- 5-3-3 Low Phase Noise References: Frequency Standards -- 5-3-4 Critical Stage -- 5-3-5 Time Domain Analysis -- 5-3-6 Summary -- 5-3-7 Two Commercial Synthesizer Examples.
5-4 Microprocessor Applications in Synthesizers -- 5-5 Transceiver Applications -- 5-6 About Bits, Symbols, and Waveforms -- 5-6-1 Representation of a Modulated RF Carrier -- 5-6-2 Generation of the Modulated Carrier -- 5-6-3 Putting It all Together -- 5-6-4 Combination of Techniques -- 5-6 Acknowledgments -- 5-6 References -- 5-6 Bibliography and Suggested Reading -- Chapter 6 A High‐Performance Hybrid Synthesizer -- 6-1 Introduction -- 6-2 Basic Synthesizer Approach -- 6-3 Loop Filter Design -- 6-4 Summary -- Bibliography -- Chapter A Mathematical Review -- A-1 FUNCTIONS OF A COMPLEX VARIABLE -- A-2 COMPLEX PLANES -- A-2-1 Functions in the Complex Frequency Plane -- A-3 BODE DIAGRAM -- A-4 LAPLACE TRANSFORM -- A-4-1 The Step Function -- A-4-2 The Ramp -- A-4-3 Linearity Theorem -- A-4-4 Differentiation and Integration -- A-4-5 Initial Value Theorem -- A-4-6 Final Value Theorem -- A-4-7 The Active Integrator -- A-4-8 Locking Behavior of the PLL -- A-5 LOW‐NOISE OSCILLATOR DESIGN -- A-5-1 Example Implementation -- A-6 OSCILLATOR AMPLITUDE STABILIZATION -- A-7 VERY LOW PHASE NOISE VCO FOR 800 MHZ -- REFERENCES -- Chapter B A General‐Purpose Nonlinear Approach to the Computation of Sideband Phase Noise in Free‐Running Microwave and RF Oscillators -- B-1 Introduction -- B-2 Noise Generation in Oscillators -- B-3 Bias‐Dependent Noise Model -- B-3-1 Bias‐Dependent Model -- B-3-2 Derivation of the Model -- B-4 General Concept of Noisy Circuits -- B-4-1 Noise from Linear Elements -- B-5 Noise Figure of Mixer Circuits -- B-6 Oscillator Noise Analysis -- B-7 Limitations of the Frequency‐Conversion Approach -- B-7-1 Assumptions -- B-7-2 Conversion and Modulation Noise -- B-7-3 Properties of Modulation Noise -- B-7-4 Noise Analysis of Autonomous Circuits -- B-7-5 Conversion Noise Analysis Results -- B-7-6 Modulation Noise Analysis Results.
B-8 Summary of the Phase Noise Spectrum of the Oscillator -- B-9 Verification Examples for the Calculation of Phase Noise in Oscillators Using Nonlinear Techniques -- B-9-1 Example 1: High‐Q Case Microstrip DRO -- B-9-2 Example 2: 10 MHz Crystal Oscillator -- B-9-3 Example 3: The 1‐GHz Ceramic Resonator VCO -- B-9-4 Example 4: Low Phase Noise FET Oscillator -- B-9-5 Example 5: Millimeter‐Wave Applications -- B-9-6 Example 6: Discriminator Stabilized DRO -- B-10 Summary -- B-10 References -- Chapter C EXAMPLE OF WIRELESS SYNTHESIZERS USING COMMERCIAL ICs -- Chapter D MMIC‐BASED SYNTHESIZERS -- D-1 INTRODUCTION -- BIBLIOGRAPHY -- Chapter E ARTICLES ON DESIGN OF DIELECTRIC RESONATOR OSCILLATORS -- E-1 THE DESIGN OF AN ULTRA‐LOW PHASE NOISE DRO -- E-1-1 Basic Considerations and Component Selection -- E-1-2 Component Selection -- E-1-3 DRO Topologies -- E-1-4 Small Signal Design Approach for the Parallel Feedback Type DRO -- E-1-5 Simulated Versus Measured Results -- E-1-6 Physical Embodiment -- E-1-7 Acknowledgments -- E-1-8 Final Remarks -- REFERENCES -- BIBLIOGRAPHY -- E-2 A NOVEL OSCILLATOR DESIGN WITH METAMATERIAL‐MÖBIUS COUPLING TO A DIELECTRIC RESONATOR -- E-2-1 Abstract -- E-2-2 Introduction -- REFERENCES -- Chapter F OPTO‐ELECTRONICALLY STABILIZED RF OSCILLATORS -- F-1 INTRODUCTION -- F-1-1 Oscillator Basics -- F-1-2 Resonator Technologies -- F-1-3 Motivation for OEO -- F-1-4 Operation Principle of the OEO -- F-2 EXPERIMENTAL EVALUATION AND THERMAL STABILITY OF OEO -- F-2-1 Experimental Setup -- F-2-2 Phase Noise Measurements -- F-2-3 Thermal Sensitivity Analysis of Standard Fibers -- F-2-4 Temperature Sensitivity Measurements -- F-2-5 Temperature Sensitivity Improvement with HC‐PCF -- F-2-6 Improve Thermal Stability Versus Phase Noise Degradation -- F-2-7 Passive Temperature Compensation -- F-2-8 Improving Effective Q with Raman Amplification.
F-3 FORCED OSCILLATION TECHNIQUES OF OEO.
Record Nr. UNINA-9910830471603321
Rohde Ulrich L.  
Hoboken, NJ : , : Wiley, , 2021
Materiale a stampa
Lo trovi qui: Univ. Federico II
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Microwave and wireless synthesizers : theory and design / / Ulrich L. Rohde [[electronic resource]]
Microwave and wireless synthesizers : theory and design / / Ulrich L. Rohde [[electronic resource]]
Autore Rohde Ulrich L
Edizione [1st edition]
Pubbl/distr/stampa New York, : Wiley, c1997
Descrizione fisica 1 online resource (xvii, 638 p. ) : ill. ;
Disciplina 621.3815/486
Soggetto topico Frequency synthesizers - Design and construction
Phase-locked loops
Digital electronics
Microwave circuits - Design and construction
Radio frequency
Phase-locked loops - Design and construction
Microwave circuits
Electrical & Computer Engineering
Engineering & Applied Sciences
Electrical Engineering
ISBN 1-280-55642-0
9786610556427
0-470-35835-1
0-471-22431-6
Formato Materiale a stampa
Livello bibliografico Monografia
Lingua di pubblicazione eng
Nota di contenuto Loop fundamentals -- Noise and spurious response of loops -- Special loops -- Loop components -- Digital PLL synthesizers -- High-performance hybrid synthesizer.
Record Nr. UNINA-9910146248503321
Rohde Ulrich L  
New York, : Wiley, c1997
Materiale a stampa
Lo trovi qui: Univ. Federico II
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MOS/LSI design and application / William N. Carr, Jack P. Mize
MOS/LSI design and application / William N. Carr, Jack P. Mize
Autore Carr, William R.
Pubbl/distr/stampa New York : McGraw-Hill Book Co., 1972
Descrizione fisica x, 331 p. ; 26 cm.
Altri autori (Persone) Mize, Jack P.
Collana Texas instruments electronics series
Soggetto topico Digital electronics
ISBN 0070100810
Classificazione 621.3.9.2
621.3.9.4
621.3.9.5
621.381'73
TK7874.C38
Formato Materiale a stampa
Livello bibliografico Monografia
Lingua di pubblicazione eng
Record Nr. UNISALENTO-991001098729707536
Carr, William R.  
New York : McGraw-Hill Book Co., 1972
Materiale a stampa
Lo trovi qui: Univ. del Salento
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The no-nonsense guide to born-digital content / / Heather Ryan and Walker Sampson
The no-nonsense guide to born-digital content / / Heather Ryan and Walker Sampson
Autore Ryan Heather
Pubbl/distr/stampa London : , : Facet, , 2018
Descrizione fisica 1 online resource (240 pages)
Disciplina 021.65
Collana No-nonsense guides
Soggetto topico Electronic records
Digital media
Digital electronics
Soggetto genere / forma Electronic books.
ISBN 1-78330-256-9
Formato Materiale a stampa
Livello bibliografico Monografia
Lingua di pubblicazione eng
Nota di contenuto Digital information basics -- Selection -- Acquisition, accessioning and ingest -- Description -- Digital preservation storage and strategies -- Access -- Designing and implementing workflows -- New and emerging areas in born-digital materials.
Record Nr. UNINA-9910511470903321
Ryan Heather  
London : , : Facet, , 2018
Materiale a stampa
Lo trovi qui: Univ. Federico II
Opac: Controlla la disponibilità qui
The no-nonsense guide to born-digital content / / Heather Ryan, Walker Sampson
The no-nonsense guide to born-digital content / / Heather Ryan, Walker Sampson
Autore Ryan Heather
Pubbl/distr/stampa London : , : Facet, , 2018
Descrizione fisica 1 online resource (xxvii, 207 pages) : digital, PDF file(s)
Disciplina 025.8/4
Collana No-nonsense guides
Soggetto topico Electronic records
Electronic records - Management
Digital media
Digital media - Management
Digital electronics
Digital electronics - Management
ISBN 1-78330-256-9
Formato Materiale a stampa
Livello bibliografico Monografia
Lingua di pubblicazione eng
Nota di contenuto Digital information basics -- Selection -- Acquisition, accessioning and ingest -- Description -- Digital preservation storage and strategies -- Access -- Designing and implementing workflows -- New and emerging areas in born-digital materials.
Record Nr. UNINA-9910795192503321
Ryan Heather  
London : , : Facet, , 2018
Materiale a stampa
Lo trovi qui: Univ. Federico II
Opac: Controlla la disponibilità qui