2007 European Conference on Circuit Theory and Design
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| Titolo: |
2007 European Conference on Circuit Theory and Design
|
| Pubblicazione: | [Place of publication not identified], : I E E E, 2007 |
| Descrizione fisica: | 1 online resource |
| Disciplina: | 621.3192 |
| Soggetto topico: | Electric circuits |
| Electric filters | |
| Electric networks | |
| Note generali: | Bibliographic Level Mode of Issuance: Monograph |
| Sommario/riassunto: | 3D discrete wavelet transform (DWT) is a compute-intensive task that is usually implemented on specific architectures in many real-time medical imaging systems. In this paper, a novel area-efficient high-throughput 3D DWT architecture is proposed based on distributed arithmetic. A tap-merging technique is used to reduce the size of DA lookup tables. The proposed architectures were designed in VHDL and mapped to a Xilinx Virtex-E FPGA. The synthesis results show the proposed architecture has a low area cost and can run up to 85 MHz, which can perform a five-level 3D wavelet analysis for seven 128 times 128 times 128 volume images per second. |
| Titolo autorizzato: | 2007 European Conference on Circuit Theory and Design |
| ISBN: | 1-5090-8649-8 |
| 1-4244-1342-7 | |
| Formato: | Materiale a stampa  |
| Livello bibliografico | Monografia |
| Lingua di pubblicazione: | Inglese |
| Record Nr.: | 9910145114803321 |
| Lo trovi qui: | Univ. Federico II |
| Opac: | Controlla la disponibilità qui |