Edizione | [First edition.] |
Pubbl/distr/stampa |
London, England : , : ISTE Ltd and John Wiley & Sons, Inc., , [2023]
|
Descrizione fisica |
1 online resource (443 pages)
|
Disciplina |
621.381
|
Soggetto topico |
Digital electronics
|
Soggetto non controllato |
Electronic Circuits
Electronics
Technology & Engineering
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ISBN |
1-394-22871-6
1-394-22869-4
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Formato |
Materiale a stampa |
Livello bibliografico |
Monografia |
Lingua di pubblicazione |
eng
|
Nota di contenuto |
Cover -- Title Page -- Copyright Page -- Contents -- Preface -- Chapter 1. Tunnel Field-Effect Transistors Based on III-V Semiconductors -- 1.1. Introduction -- 1.2. Experiments -- 1.3. Simulation of III-V-based TFETs -- 1.3.1. The k.p model in the NEGF formalism -- 1.4. SS degradation mechanisms -- 1.4.1. Electrostatic integrity -- 1.4.2. Trap-assisted tunneling -- 1.4.3. Surface roughness -- 1.5. Strategies to improve the on-state current -- 1.5.1. Strain -- 1.5.2. Broken-gap hetero-structures -- 1.5.3. Molar fraction grading of the source material -- 1.6. Conclusion -- 1.7. References -- Chapter 2. Field-Effect Transistors Based on 2D Materials: A Modeling Perspective -- 2.1. Introduction -- 2.1.1. Future of Moore's law -- 2.1.2. The potential of 2D materials -- 2.2. Modeling approach -- 2.2.1. Requirements and state of the art -- 2.2.2. Maximally localized Wannier functions (MLWFs) -- 2.2.3. Towards ab initio quantum transport simulations -- 2.3. 2D device performance analysis -- 2.3.1. MoS2 and other TMDs -- 2.3.2. Novel 2D materials -- 2.4. Challenges and opportunities -- 2.4.1. Electrical contacts between metals and 2D monolayers -- 2.4.2. 2D mobility limiting factors -- 2.4.3. 2D oxides -- 2.4.4. Advanced logic concepts -- 2.5. Conclusion and outlook -- 2.6. Acknowledgments -- 2.7. References -- Chapter 3. Negative Capacitance Field-Effect Transistors -- 3.1. Introduction -- 3.2. The rise of NC-FETs -- 3.3. Understanding NC-FETs from scratch -- 3.3.1. Electrostatics in a generic NC-FET -- 3.3.2. Formulating switching slope of a generic NC-FET -- 3.4. Fundamental challenges of NC-FET -- 3.4.1. NC does not help good FETs -- 3.4.2. Quantum capacitance may "kill" NC-FETs -- 3.5. Design and optimization of NC-FET -- 3.5.1. Designing NC-FET in the quantum capacitance limit -- 3.5.2. The role of NC nonlinearity.
3.5.3. IMG: borrow parasitic charge for polarization in NC -- 3.5.4. A practical role of NC for FETs: voltage-loss saver -- 3.6. Appendix: A rule for polarization dynamics-based interpretation of the subthermionic SS -- 3.7. References -- Chapter 4. Z2 Field-Effect Transistors -- 4.1. Introduction -- 4.2. Z2FET steady-state operation -- 4.2.1. Z2FET sharp switch evidence -- 4.2.2. Z2FET "S-shape" characteristic -- 4.2.3. Z2FET detailed description -- 4.3. Z2FET steady-state analytical and compact model -- 4.3.1. Z2FET steady-state analytical drain current model -- 4.3.2. Z2FET analytical evaluation of switching voltage -- 4.3.3. Z2FET compact model -- 4.4. Z2FET experimental evidence -- 4.4.1. Z2FET fabrication -- 4.4.3. Z2FET switching characteristic under gate sweep -- 4.4.4. Z2FET switching characteristic under drain sweep -- 4.5. Z2FET as 1T-DRAM -- 4.5.1. Z2FET 1T-DRAM operation description -- 4.5.2. Z2FET 1T-DRAM operation experimental evidence -- 4.6. Z2FET structure optimization -- 4.6.1. Z2FET DGP -- 4.6.2. Z3FET -- 4.7. Z2FET advanced applications -- 4.7.1. Z2FET as ESD -- 4.7.2. Z2FET as logic switch -- 4.7.3. Z2FET as photodetector -- 4.8. Conclusion -- 4.9. References -- Chapter 5. Two-Dimensional Spintronics -- 5.1. Introduction -- 5.2. Spintronics in 2D Rashba gases at oxide surfaces-interfaces -- 5.2.1. Emergent 2D conductivity at oxide interfaces -- 5.2.2. Rashba spin-orbit interactions -- 5.2.3. Spin-to-charge current conversion in oxide 2DEGs -- 5.2.4. Device applications and prospects -- 5.3. Spintronics in lateral spin devices in 2D materials -- 5.3.1. Introduction -- 5.3.2. Spin injection and detection -- 5.3.3. Spin precession -- 5.3.4. Mechanisms of spin relaxation -- 5.3.5. Spin transport in van der Waals heterostructures -- 5.4. 2D materials in magnetic tunnel junctions -- 5.4.1. Introduction.
5.4.2. First steps towards 2D material integration in magnetic tunnel junctions -- 5.4.3. Exfoliated and transferred devices: early results -- 5.4.4. Exfoliated and transferred devices: improvement through in situ definition -- 5.4.5. Direct CVD growth: the rise of large scale and high quality -- 5.4.6. Experimental evidences of 2D-based spin filtering in hybrid 2D-MTJs -- 5.4.7. Conclusion -- 5.5. Topological insulators in spintronics -- 5.5.1. Introduction -- 5.5.2. Spin-momentum locking and spin-charge interconversion -- 5.5.3. Materials, interfaces and fabrication methods -- 5.5.4. Spin-charge interconversion measurements -- 5.5.5. Conclusion and outlook -- 5.6. References -- Chapter 6. Valleytronics in 2D Materials -- 6.1. Introduction -- 6.2. Exciton and valley physics -- 6.2.1. Introduction to valleys and excitons -- 6.2.2. Valley physics -- 6.2.3. Spin orbit coupling and exotic excitons -- 6.3. Valley lifetime, transport and operations -- 6.3.1. Valley lifetime -- 6.3.2. Valley transport -- 6.3.3. Valley operations -- 6.4. Valleytronic devices and materials -- 6.5. Valleytronic computing -- 6.5.1. Classical computing - power and performance -- 6.5.2. Classical computing - architecture -- 6.5.3. Quantum computing -- 6.5.4. Outlook -- 6.6. References -- Chapter 7. Molecular Electronics: Electron, Spin and Thermal Transport through Molecules -- 7.1. Introduction -- 7.2. How to make a molecular junction -- 7.3. Electron transport in molecular devices: back to basics -- 7.4. Electron transport: DC and low frequency -- 7.5. Electron transport at high frequencies -- 7.6. Spin-dependent electron transport in molecular junctions -- 7.7. Molecular electronic plasmonics -- 7.8. Quantum interference and thermal transport -- 7.9. Noise in molecular junctions -- 7.10. Conclusion and further reading -- 7.11. References.
Chapter 8. Superconducting Quantum Electronics -- 8.1. Introduction -- 8.1.1. A little bit of history -- 8.1.2. The Josephson junction -- 8.1.3. Superconducting quantum interference devices (SQUIDs) -- 8.1.4. Emergence of superconductor electronics -- 8.2. Passive superconducting electronics -- 8.2.1. Surface impedance of superconductors -- 8.2.2. Superconductor waveguides and transmission lines -- 8.2.3. Superconducting antennas -- 8.2.4. Superconducting filters -- 8.2.5. Microwave switches -- 8.3. Superconducting detectors -- 8.3.1. Transition edge sensors (TES) -- 8.3.2. Superconductor nanowire single-photon detectors (SNSPDs) -- 8.3.3. Kinetic inductance detectors (KIDs) -- 8.4. Superconducting digital electronics -- 8.4.1. Single flux quantum (SFQ) logic -- 8.4.2. Adiabatic quantum flux parametron (AQFP) logic -- 8.4.3. Towards superconducting computing -- 8.4.4. In-memory and quantum neuromorphic computing -- 8.4.5. Computer-aided design (CAD) tools -- 8.5. Superconducting quantum computing -- 8.5.1. Epistemological approach -- 8.5.2. Superconductor quantum bits (qubits) -- 8.5.3. Source of decoherence in qubits -- 8.5.4. Interface system for Josephson junction qubits -- 8.5.5. The qubit cavity -- 8.6. Cryogenic cooling -- 8.7. References -- Chapter 9. All-Optical Chips -- 9.1. Introduction -- 9.2. Nanophotonic circuits -- 9.2.1. Dielectric waveguides -- 9.2.2. Basic photonic devices -- 9.3. Phase change photonics -- 9.3.1. Switching dynamics of phase change materials -- 9.3.2. Waveguide-coupled phase change materials -- 9.4. Photonic tensor core -- 9.4.1. Optical multiply and accumulate operations -- 9.4.2. Design of the photonic tensor core -- 9.4.3. Parallel computing by wavelength division multiplexing -- 9.4.4. Photonic tensor core prototype -- 9.5. Optical artificial neural network -- 9.5.1. Artificial neural networks.
9.5.2. Nonlinear activation unit -- 9.5.3. Optical neuron prototype -- 9.6. Challenges and outlook -- 9.7. References -- List of Authors -- Index -- EULA.
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Record Nr. | UNINA-9910830743503321 |