Synthesis and Optimization of FPGA-Based Systems / / by Valery Sklyarov, Iouliia Skliarova, Alexander Barkalov, Larysa Titarenko
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| Autore: |
Sklyarov Valery
|
| Titolo: |
Synthesis and Optimization of FPGA-Based Systems / / by Valery Sklyarov, Iouliia Skliarova, Alexander Barkalov, Larysa Titarenko
|
| Pubblicazione: | Cham : , : Springer International Publishing : , : Imprint : Springer, , 2014 |
| Edizione: | 1st ed. 2014. |
| Descrizione fisica: | 1 online resource (443 p.) |
| Disciplina: | 621.395 |
| Soggetto topico: | Electronic circuits |
| Electronics | |
| Microelectronics | |
| Circuits and Systems | |
| Electronics and Microelectronics, Instrumentation | |
| Persona (resp. second.): | SkliarovaIouliia |
| BarkalovAlexander | |
| TitarenkoLarysa | |
| Note generali: | Description based upon print version of record. |
| Nota di bibliografia: | Includes bibliographical references at the end of each chapters and index. |
| Nota di contenuto: | ""Synthesis and Optimization of FPGA-Based Systems ""; ""Preface""; ""Contents""; ""Abbreviations""; ""Conventions""; ""Part I Design of Digital Circuits and Systems on the Basis of FPGA""; ""1 FPGA Architectures, Reconfigurable Fabric, Embedded Blocks and Design Tools""; ""Abstract ""; ""1.1 Introduction to FPGA""; ""1.2 The Basis of FPGA Devices""; ""1.2.1 Configurable Logic Blocks of Xilinx FPGAs""; ""1.2.2 Logic Elements of Altera FPGAs""; ""1.3 Embedded Blocks ""; ""1.3.1 Embedded Memories""; ""1.3.2 Embedded DSP Slices""; ""1.4 Clock Distributions and Resets ""; ""1.5 Design Tools"" |
| ""1.6 Implementation and Prototyping """"1.7 Interaction with FPGA-Based Circuits and Systems""; ""References""; ""2 Synthesizable VHDL for FPGA-Based Devices""; ""Abstract ""; ""2.1 Introduction to VHDL""; ""2.2 Data Types, Objects and Operators""; ""2.3 Combinational and Sequential Processes""; ""2.3.1 Combinational Processes""; ""2.3.2 Sequential Processes""; ""2.4 Functions, Procedures, and Blocks""; ""2.5 Generics and Generates""; ""2.6 Libraries, Packages, and Files""; ""2.7 Behavioral Simulation""; ""2.8 Prototyping""; ""References""; ""3 Design Techniques""; ""Abstract "" | |
| ""3.1 Combinational Circuits""""3.1.1 Encoders""; ""3.1.2 Decoders""; ""3.1.3 Multiplexers""; ""3.1.4 Comparators""; ""3.1.5 Arithmetical Circuits""; ""3.1.6 Barrel Shifters""; ""3.2 Sequential Circuits""; ""3.2.1 Registers""; ""3.2.2 Shift Registers""; ""3.2.3 Counters""; ""3.2.4 Arithmetical Circuits with Accumulators""; ""3.3 Finite State Machines""; ""3.4 Optimization of FPGA-Based Circuits and Systems""; ""3.4.1 Highly Parallel Network-Based Solutions""; ""3.4.2 Hardware Accelerators""; ""3.4.3 Parallel Modular Algorithms Running in Hierarchical FSMs"" | |
| ""3.5 Design Examples for Parallel Sort""""3.6 Design Examples for Parallel Search""; ""3.7 Design Examples for Parallel Counters""; ""3.8 Design Examples for Counting Networks""; ""3.9 Design Examples for LUT-Based Hamming Weight CountersComparators""; ""3.10 Design Examples for Operations Over Vectors""; ""References""; ""4 Embedded Blocks and System-Level Design""; ""Abstract ""; ""4.1 Using IP Cores""; ""4.2 Design with Embedded DSP Slices""; ""4.3 Interaction with FPGA""; ""4.3.1 Digilent Parallel Port Interface""; ""4.3.1.1 Digilent EPP Communication Module"" | |
| ""4.3.1.2 Application Software""""4.3.2 UART Interface""; ""4.3.2.1 UART Communication Module""; ""4.3.2.2 Application Software""; ""4.4 SoftwareHardware Co-design and Co-simulation""; ""4.4.1 Software-Hardware Co-design with Digilent Parallel Port Interface""; ""4.4.2 Software-Hardware Co-design with UART Interface""; ""4.5 Programmable Systems-on-Chip""; ""References""; ""5 Design Technique Based on Hierarchical and Parallel Specifications""; ""Abstract ""; ""5.1 Modular Hierarchical Specifications""; ""5.2 Hierarchical Finite State Machines"" | |
| ""5.2.1 HDL Template for HFSM with Explicit Modules"" | |
| Sommario/riassunto: | The book is composed of two parts. The first part introduces the concepts of the design of digital systems using contemporary field-programmable gate arrays (FPGAs). Various design techniques are discussed and illustrated by examples. The operation and effectiveness of these techniques is demonstrated through experiments that use relatively cheap prototyping boards that are widely available. The book begins with easily understandable introductory sections, continues with commonly used digital circuits, and then gradually extends to more advanced topics. The advanced topics include novel techniques where parallelism is applied extensively. These techniques involve not only core reconfigurable logical elements, but also use embedded blocks such as memories and digital signal processing slices and interactions with general-purpose and application-specific computing systems. Fully synthesizable specifications are provided in a hardware-description language (VHDL) and are ready to be tested and incorporated in engineering designs. A number of practical applications are discussed from areas such as data processing and vector-based computations (e.g. Hamming weight counters/comparators). The second part of the book covers the more theoretical aspects of finite state machine synthesis with the main objective of reducing basic FPGA resources, minimizing delays and achieving greater optimization of circuits and systems. |
| Titolo autorizzato: | Synthesis and Optimization of FPGA-Based Systems |
| ISBN: | 3-319-04708-6 |
| Formato: | Materiale a stampa  |
| Livello bibliografico | Monografia |
| Lingua di pubblicazione: | Inglese |
| Record Nr.: | 9910299485803321 |
| Lo trovi qui: | Univ. Federico II |
| Opac: | Controlla la disponibilità qui |
Serie:
Lecture Notes in Electrical Engineering, . 1876-1100 ; ; 294