LEADER 07011nam 22007455 450 001 9910299485803321 005 20200706032640.0 010 $a3-319-04708-6 024 7 $a10.1007/978-3-319-04708-9 035 $a(CKB)2670000000547850 035 $a(EBL)1697928 035 $a(OCoLC)880449743 035 $a(SSID)ssj0001186951 035 $a(PQKBManifestationID)11651467 035 $a(PQKBTitleCode)TC0001186951 035 $a(PQKBWorkID)11241653 035 $a(PQKB)10898206 035 $a(MiAaPQ)EBC1697928 035 $a(DE-He213)978-3-319-04708-9 035 $a(PPN)17782560X 035 $a(EXLCZ)992670000000547850 100 $a20140314d2014 u| 0 101 0 $aeng 135 $aur|n|---||||| 181 $ctxt 182 $cc 183 $acr 200 10$aSynthesis and Optimization of FPGA-Based Systems /$fby Valery Sklyarov, Iouliia Skliarova, Alexander Barkalov, Larysa Titarenko 205 $a1st ed. 2014. 210 1$aCham :$cSpringer International Publishing :$cImprint: Springer,$d2014. 215 $a1 online resource (443 p.) 225 1 $aLecture Notes in Electrical Engineering,$x1876-1100 ;$v294 300 $aDescription based upon print version of record. 311 $a3-319-04707-8 320 $aIncludes bibliographical references at the end of each chapters and index. 327 $a""Synthesis and Optimization of FPGA-Based Systems ""; ""Preface""; ""Contents""; ""Abbreviations""; ""Conventions""; ""Part I Design of Digital Circuits and Systems on the Basis of FPGA""; ""1 FPGA Architectures, Reconfigurable Fabric, Embedded Blocks and Design Tools""; ""Abstract ""; ""1.1 Introduction to FPGA""; ""1.2 The Basis of FPGA Devices""; ""1.2.1 Configurable Logic Blocks of Xilinx FPGAs""; ""1.2.2 Logic Elements of Altera FPGAs""; ""1.3 Embedded Blocks ""; ""1.3.1 Embedded Memories""; ""1.3.2 Embedded DSP Slices""; ""1.4 Clock Distributions and Resets ""; ""1.5 Design Tools"" 327 $a""1.6 Implementation and Prototyping """"1.7 Interaction with FPGA-Based Circuits and Systems""; ""References""; ""2 Synthesizable VHDL for FPGA-Based Devices""; ""Abstract ""; ""2.1 Introduction to VHDL""; ""2.2 Data Types, Objects and Operators""; ""2.3 Combinational and Sequential Processes""; ""2.3.1 Combinational Processes""; ""2.3.2 Sequential Processes""; ""2.4 Functions, Procedures, and Blocks""; ""2.5 Generics and Generates""; ""2.6 Libraries, Packages, and Files""; ""2.7 Behavioral Simulation""; ""2.8 Prototyping""; ""References""; ""3 Design Techniques""; ""Abstract "" 327 $a""3.1 Combinational Circuits""""3.1.1 Encoders""; ""3.1.2 Decoders""; ""3.1.3 Multiplexers""; ""3.1.4 Comparators""; ""3.1.5 Arithmetical Circuits""; ""3.1.6 Barrel Shifters""; ""3.2 Sequential Circuits""; ""3.2.1 Registers""; ""3.2.2 Shift Registers""; ""3.2.3 Counters""; ""3.2.4 Arithmetical Circuits with Accumulators""; ""3.3 Finite State Machines""; ""3.4 Optimization of FPGA-Based Circuits and Systems""; ""3.4.1 Highly Parallel Network-Based Solutions""; ""3.4.2 Hardware Accelerators""; ""3.4.3 Parallel Modular Algorithms Running in Hierarchical FSMs"" 327 $a""3.5 Design Examples for Parallel Sort""""3.6 Design Examples for Parallel Search""; ""3.7 Design Examples for Parallel Counters""; ""3.8 Design Examples for Counting Networks""; ""3.9 Design Examples for LUT-Based Hamming Weight CountersComparators""; ""3.10 Design Examples for Operations Over Vectors""; ""References""; ""4 Embedded Blocks and System-Level Design""; ""Abstract ""; ""4.1 Using IP Cores""; ""4.2 Design with Embedded DSP Slices""; ""4.3 Interaction with FPGA""; ""4.3.1 Digilent Parallel Port Interface""; ""4.3.1.1 Digilent EPP Communication Module"" 327 $a""4.3.1.2 Application Software""""4.3.2 UART Interface""; ""4.3.2.1 UART Communication Module""; ""4.3.2.2 Application Software""; ""4.4 SoftwareHardware Co-design and Co-simulation""; ""4.4.1 Software-Hardware Co-design with Digilent Parallel Port Interface""; ""4.4.2 Software-Hardware Co-design with UART Interface""; ""4.5 Programmable Systems-on-Chip""; ""References""; ""5 Design Technique Based on Hierarchical and Parallel Specifications""; ""Abstract ""; ""5.1 Modular Hierarchical Specifications""; ""5.2 Hierarchical Finite State Machines"" 327 $a""5.2.1 HDL Template for HFSM with Explicit Modules"" 330 $aThe book is composed of two parts. The first part introduces the concepts of the design of digital systems using contemporary field-programmable gate arrays (FPGAs). Various design techniques are discussed and illustrated by examples. The operation and effectiveness of these techniques is demonstrated through experiments that use relatively cheap prototyping boards that are widely available. The book begins with easily understandable introductory sections, continues with commonly used digital circuits, and then gradually extends to more advanced topics. The advanced topics include novel techniques where parallelism is applied extensively. These techniques involve not only core reconfigurable logical elements, but also use embedded blocks such as memories and digital signal processing slices and interactions with general-purpose and application-specific computing systems. Fully synthesizable specifications are provided in a hardware-description language (VHDL) and are ready to be tested and incorporated in engineering designs. A number of practical applications are discussed from areas such as data processing and vector-based computations (e.g. Hamming weight counters/comparators). The second part of the book covers the more theoretical aspects of finite state machine synthesis with the main objective of reducing basic FPGA resources, minimizing delays and achieving greater optimization of circuits and systems. 410 0$aLecture Notes in Electrical Engineering,$x1876-1100 ;$v294 606 $aElectronic circuits 606 $aElectronics 606 $aMicroelectronics 606 $aCircuits and Systems$3https://scigraph.springernature.com/ontologies/product-market-codes/T24068 606 $aElectronics and Microelectronics, Instrumentation$3https://scigraph.springernature.com/ontologies/product-market-codes/T24027 615 0$aElectronic circuits. 615 0$aElectronics. 615 0$aMicroelectronics. 615 14$aCircuits and Systems. 615 24$aElectronics and Microelectronics, Instrumentation. 676 $a621.395 700 $aSklyarov$b Valery$4aut$4http://id.loc.gov/vocabulary/relators/aut$0871858 702 $aSkliarova$b Iouliia$4aut$4http://id.loc.gov/vocabulary/relators/aut 702 $aBarkalov$b Alexander$4aut$4http://id.loc.gov/vocabulary/relators/aut 702 $aTitarenko$b Larysa$4aut$4http://id.loc.gov/vocabulary/relators/aut 801 0$bMiAaPQ 801 1$bMiAaPQ 801 2$bMiAaPQ 906 $aBOOK 912 $a9910299485803321 996 $aSynthesis and Optimization of FPGA-Based Systems$91946417 997 $aUNINA