05146nam 22007935 450 99646529540331620200702132132.03-540-45537-X10.1007/3-540-45537-X(CKB)1000000000211663(SSID)ssj0000326483(PQKBManifestationID)11268664(PQKBTitleCode)TC0000326483(PQKBWorkID)10296791(PQKB)10337897(DE-He213)978-3-540-45537-0(MiAaPQ)EBC3072171(PPN)155236954(EXLCZ)99100000000021166320121227d2001 u| 0engurnn|008mamaatxtccrSelected Areas in Cryptography[electronic resource] 8th Annual International Workshop, SAC 2001 Toronto, Ontario, Canada, August 16-17, 2001. Revised Papers /edited by Serge Vaudenay, Amr M. Youssef1st ed. 2001.Berlin, Heidelberg :Springer Berlin Heidelberg :Imprint: Springer,2001.1 online resource (XII, 364 p.) Lecture Notes in Computer Science,0302-9743 ;2259Bibliographic Level Mode of Issuance: Monograph3-540-43066-0 Includes bibliographical references at the end of each chapters and index.Cryptanalysis I -- Weaknesses in the Key Scheduling Algorithm of RC4 -- A Practical Cryptanalysis of SSC2 -- Analysis of the E 0 Encryption System -- Boolean Functions -- Boolean Functions with Large Distance to All Bijective Monomials: N Odd Case -- Linear Codes in Constructing Resilient Functions with High Nonlinearity -- New Covering Radius of Reed-Muller Codes for t-Resilient Functions -- Generalized Zig-zag Functions and Oblivious Transfer Reductions -- Rijndael -- A Simple Algebraic Representation of Rijndael -- Improving the Upper Bound on the Maximum Average Linear Hull Probability for Rijndael -- Invited Talk I -- Polynomial Reconstruction Based Cryptography -- Elliptic Curves and Efficient Implementation I -- An Improved Implementation of Elliptic Curves over GF(2 n ) when Using Projective Point Arithmetic -- Fast Generation of Pairs (k, [k]P) for Koblitz Elliptic Curves -- Algorithms for Multi-exponentiation -- Two Topics in Hyperelliptic Cryptography -- Cryptanalysis II -- A Differential Attack on Reduced-Round SC2000 -- On the Complexity of Matsui’s Attack -- Random Walks Revisited: Extensions of Pollard’s Rho Algorithm for Computing Multiple Discrete Logarithms -- Elliptic Curves and Efficient Implementation II -- Fast Normal Basis Multiplication Using General Purpose Processors -- Fast Multiplication of Integers for Public-Key Applications -- Fast Simultaneous Scalar Multiplication on Elliptic Curve with Montgomery Form -- On the Power of Multidoubling in Speeding Up Elliptic Scalar Multiplication -- Public Key Systems -- The GH Public-Key Cryptosystem -- XTR Extended to GF(p 6m ) -- Invited Talk II -- The Two Faces of Lattices in Cryptology -- Protocols and Mac -- New (Two-Track-)MAC Based on the Two Trails of RIPEMD -- Key Revocation with Interval Cover Families -- Timed-Release Cryptography.Lecture Notes in Computer Science,0302-9743 ;2259Data encryption (Computer science)Operating systems (Computers)Computers and civilizationAlgorithmsComputer communication systemsComputer mathematicsCryptologyhttps://scigraph.springernature.com/ontologies/product-market-codes/I28020Operating Systemshttps://scigraph.springernature.com/ontologies/product-market-codes/I14045Computers and Societyhttps://scigraph.springernature.com/ontologies/product-market-codes/I24040Algorithm Analysis and Problem Complexityhttps://scigraph.springernature.com/ontologies/product-market-codes/I16021Computer Communication Networkshttps://scigraph.springernature.com/ontologies/product-market-codes/I13022Computational Science and Engineeringhttps://scigraph.springernature.com/ontologies/product-market-codes/M14026Data encryption (Computer science).Operating systems (Computers).Computers and civilization.Algorithms.Computer communication systems.Computer mathematics.Cryptology.Operating Systems.Computers and Society.Algorithm Analysis and Problem Complexity.Computer Communication Networks.Computational Science and Engineering.005.82Vaudenay Sergeedthttp://id.loc.gov/vocabulary/relators/edtYoussef Amr Medthttp://id.loc.gov/vocabulary/relators/edtMiAaPQMiAaPQMiAaPQBOOK996465295403316Selected Areas in Cryptography772069UNISA06814nam 22007215 450 991029948580332120251202144404.03-319-04708-610.1007/978-3-319-04708-9(CKB)2670000000547850(EBL)1697928(OCoLC)880449743(SSID)ssj0001186951(PQKBManifestationID)11651467(PQKBTitleCode)TC0001186951(PQKBWorkID)11241653(PQKB)10898206(MiAaPQ)EBC1697928(DE-He213)978-3-319-04708-9(PPN)17782560X(EXLCZ)99267000000054785020140314d2014 u| 0engur|n|---|||||txtccrSynthesis and Optimization of FPGA-Based Systems /by Valery Sklyarov, Iouliia Skliarova, Alexander Barkalov, Larysa Titarenko1st ed. 2014.Cham :Springer International Publishing :Imprint: Springer,2014.1 online resource (443 p.)Lecture Notes in Electrical Engineering,1876-1119 ;294Description based upon print version of record.3-319-04707-8 Includes bibliographical references at the end of each chapters and index.""Synthesis and Optimization of FPGA-Based Systems ""; ""Preface""; ""Contents""; ""Abbreviations""; ""Conventions""; ""Part I Design of Digital Circuits and Systems on the Basis of FPGA""; ""1 FPGA Architectures, Reconfigurable Fabric, Embedded Blocks and Design Tools""; ""Abstract ""; ""1.1 Introduction to FPGA""; ""1.2 The Basis of FPGA Devices""; ""1.2.1 Configurable Logic Blocks of Xilinx FPGAs""; ""1.2.2 Logic Elements of Altera FPGAs""; ""1.3 Embedded Blocks ""; ""1.3.1 Embedded Memories""; ""1.3.2 Embedded DSP Slices""; ""1.4 Clock Distributions and Resets ""; ""1.5 Design Tools""""1.6 Implementation and Prototyping """"1.7 Interaction with FPGA-Based Circuits and Systems""; ""References""; ""2 Synthesizable VHDL for FPGA-Based Devices""; ""Abstract ""; ""2.1 Introduction to VHDL""; ""2.2 Data Types, Objects and Operators""; ""2.3 Combinational and Sequential Processes""; ""2.3.1 Combinational Processes""; ""2.3.2 Sequential Processes""; ""2.4 Functions, Procedures, and Blocks""; ""2.5 Generics and Generates""; ""2.6 Libraries, Packages, and Files""; ""2.7 Behavioral Simulation""; ""2.8 Prototyping""; ""References""; ""3 Design Techniques""; ""Abstract """"3.1 Combinational Circuits""""3.1.1 Encoders""; ""3.1.2 Decoders""; ""3.1.3 Multiplexers""; ""3.1.4 Comparators""; ""3.1.5 Arithmetical Circuits""; ""3.1.6 Barrel Shifters""; ""3.2 Sequential Circuits""; ""3.2.1 Registers""; ""3.2.2 Shift Registers""; ""3.2.3 Counters""; ""3.2.4 Arithmetical Circuits with Accumulators""; ""3.3 Finite State Machines""; ""3.4 Optimization of FPGA-Based Circuits and Systems""; ""3.4.1 Highly Parallel Network-Based Solutions""; ""3.4.2 Hardware Accelerators""; ""3.4.3 Parallel Modular Algorithms Running in Hierarchical FSMs""""3.5 Design Examples for Parallel Sort""""3.6 Design Examples for Parallel Search""; ""3.7 Design Examples for Parallel Counters""; ""3.8 Design Examples for Counting Networks""; ""3.9 Design Examples for LUT-Based Hamming Weight CountersComparators""; ""3.10 Design Examples for Operations Over Vectors""; ""References""; ""4 Embedded Blocks and System-Level Design""; ""Abstract ""; ""4.1 Using IP Cores""; ""4.2 Design with Embedded DSP Slices""; ""4.3 Interaction with FPGA""; ""4.3.1 Digilent Parallel Port Interface""; ""4.3.1.1 Digilent EPP Communication Module""""4.3.1.2 Application Software""""4.3.2 UART Interface""; ""4.3.2.1 UART Communication Module""; ""4.3.2.2 Application Software""; ""4.4 SoftwareHardware Co-design and Co-simulation""; ""4.4.1 Software-Hardware Co-design with Digilent Parallel Port Interface""; ""4.4.2 Software-Hardware Co-design with UART Interface""; ""4.5 Programmable Systems-on-Chip""; ""References""; ""5 Design Technique Based on Hierarchical and Parallel Specifications""; ""Abstract ""; ""5.1 Modular Hierarchical Specifications""; ""5.2 Hierarchical Finite State Machines""""5.2.1 HDL Template for HFSM with Explicit Modules""The book is composed of two parts. The first part introduces the concepts of the design of digital systems using contemporary field-programmable gate arrays (FPGAs). Various design techniques are discussed and illustrated by examples. The operation and effectiveness of these techniques is demonstrated through experiments that use relatively cheap prototyping boards that are widely available. The book begins with easily understandable introductory sections, continues with commonly used digital circuits, and then gradually extends to more advanced topics. The advanced topics include novel techniques where parallelism is applied extensively. These techniques involve not only core reconfigurable logical elements, but also use embedded blocks such as memories and digital signal processing slices and interactions with general-purpose and application-specific computing systems. Fully synthesizable specifications are provided in a hardware-description language (VHDL) and are ready to be tested and incorporated in engineering designs. A number of practical applications are discussed from areas such as data processing and vector-based computations (e.g. Hamming weight counters/comparators). The second part of the book covers the more theoretical aspects of finite state machine synthesis with the main objective of reducing basic FPGA resources, minimizing delays and achieving greater optimization of circuits and systems.Lecture Notes in Electrical Engineering,1876-1119 ;294Electronic circuitsElectronicsElectronic Circuits and SystemsElectronics and Microelectronics, InstrumentationElectronic circuits.Electronics.Electronic Circuits and Systems.Electronics and Microelectronics, Instrumentation.621.395Sklyarov Valeryauthttp://id.loc.gov/vocabulary/relators/aut871858Skliarova Iouliiaauthttp://id.loc.gov/vocabulary/relators/autBarkalov Alexanderauthttp://id.loc.gov/vocabulary/relators/autTitarenko Larysaauthttp://id.loc.gov/vocabulary/relators/autMiAaPQMiAaPQMiAaPQBOOK9910299485803321Synthesis and Optimization of FPGA-Based Systems1946417UNINA