Digital design and computer architecture / / David Money Harris, Sarah L. Harris |
Autore | Harris David Money |
Edizione | [1st ed.] |
Pubbl/distr/stampa | Amsterdam ; ; Boston, : Morgan Kaufmann Publishers, c2007 |
Descrizione fisica | 1 online resource (593 p.) |
Disciplina | 621.381 |
Altri autori (Persone) | HarrisSarah L |
Soggetto topico |
Digital electronics
Logic design Computer architecture |
ISBN |
1-281-22726-9
9786611227265 0-08-054706-0 |
Formato | Materiale a stampa ![]() |
Livello bibliografico | Monografia |
Lingua di pubblicazione | eng |
Nota di contenuto |
Front cover; In Praise of Digital Design and Computer Architecture; About the Authors; Title page; Copyright page; Table of contents; Preface; FEATURES; ONLINE SUPPLEMENTS; HOW TO USE THE SOFTWARE TOOLS IN A COURSE; Xilinx ISE WebPACK; Synplify Pro; PCSPIM; LABS; BUGS; ACKNOWLEDGMENTS; Chapter 1 From Zero to One; 1.1 THE GAME PLAN; 1.2 THE ART OF MANAGING COMPLEXITY; 1.2.1 Abstraction; 1.2.2 Discipline; 1.2.3 The Three -Y's; 1.3 THE DIGITAL ABSTRACTION; 1.4 NUMBER SYSTEMS; 1.4.1 Decimal Numbers; 1.4.2 Binary Numbers; 1.4.3 Hexadecimal Numbers; 1.4.4 Bytes, Nibbles, and All That Jazz
1.4.5 Binary Addition1.4.6 Signed Binary Numbers; 1.5 LOGIC GATES; 1.5.1 NOT Gate; 1.5.2 Buffer; 1.5.3 AND Gate; 1.5.4 OR Gate; 1.5.5 Other Two-Input Gates; 1.5.6 Multiple-Input Gates; 1.6 BENEATH THE DIGITAL ABSTRACTION; 1.6.1 Supply Voltage; 1.6.2 Logic Levels; 1.6.3 Noise Margins; 1.6.4 DC Transfer Characteristics; 1.6.5 The Static Discipline; 1.7 CMOS TRANSISTORS; 1.7.1 Semiconductors; 1.7.2 Diodes; 1.7.3 Capacitors; 1.7.4 nMOS and pMOS Transistors; 1.7.5 CMOS NOT Gate; 1.7.6 Other CMOS Logic Gates; 1.7.7 Transmission Gates; 1.7.8 Pseudo-nMOS Logic; 1.8 POWER CONSUMPTION 1.9 SUMMARY AND A LOOK AHEADExercises; Interview Questions; Chapter 2 Combinational Logic Design; 2.1 INTRODUCTION; 2.2 BOOLEAN EQUATIONS; 2.2.1 Terminology; 2.2.2 Sum-of-Products Form; 2.2.3 Product-of-Sums Form; 2.3 BOOLEAN ALGEBRA; 2.3.1 Axioms; 2.3.2 Theorems of One Variable; 2.3.3 Theorems of Several Variables; 2.3.4 The Truth Behind It All; 2.3.5 Simplifying Equations; 2.4 FROM LOGIC TO GATES; 2.5 MULTILEVEL COMBINATIONAL LOGIC; 2.5.1 Hardware Reduction; 2.5.2 Bubble Pushing; 2.6 X'S AND Z'S, OH MY; 2.6.1 Illegal Value: X; 2.6.2 Floating Value: Z; 2.7 KARNAUGH MAPS 2.7.1 Circular Thinking2.7.2 Logic Minimization with K-Maps; 2.7.3 Don't Cares; 2.7.4 The Big Picture; 2.8 COMBINATIONAL BUILDING BLOCKS; 2.8.1 Multiplexers; 2.8.2 Decoders; 2.9 TIMING; 2.9.1 Propagation and Contamination Delay; 2.9.2 Glitches; 2.10 SUMMARY; Exercises; Interview Questions; Chapter 3 Sequential Logic Design; 3.1 INTRODUCTION; 3.2 LATCHES AND FLIP-FLOPS; 3.2.1 SR Latch; 3.2.2 D Latch; 3.2.3 D Flip-Flop; 3.2.4 Register; 3.2.5 Enabled Flip-Flop; 3.2.6 Resettable Flip-Flop; 3.2.7 Transistor-Level Latch and Flip-Flop Designs; 3.2.8 Putting It All Together 3.3 SYNCHRONOUS LOGIC DESIGN3.3.1 Some Problematic Circuits; 3.3.2 Synchronous Sequential Circuits; 3.3.3 Synchronous and Asynchronous Circuits; 3.4 FINITE STATE MACHINES; 3.4.1 FSM Design Example; 3.4.2 State Encodings; 3.4.3 Moore and Mealy Machines; 3.4.4 Factoring State Machines; 3.4.5 FSM Review; 3.5 TIMING OF SEQUENTIAL LOGIC; 3.5.1 The Dynamic Discipline; 3.5.2 System Timing; 3.5.3 Clock Skew; 3.5.4 Metastability; 3.5.5 Synchronizers; 3.5.6 Derivation of Resolution Time; 3.6 PARALLELISM; 3.7 SUMMARY; Exercises; Untitled; Chapter 4 Hardware Description Languages; 4.1 INTRODUCTION 4.1.1 Modules |
Record Nr. | UNINA-9910828815603321 |
Harris David Money
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Amsterdam ; ; Boston, : Morgan Kaufmann Publishers, c2007 | ||
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Lo trovi qui: Univ. Federico II | ||
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Digital electronics : a practical approach with VHDL / / William Kleitz |
Autore | Kleitz William |
Edizione | [Ninth, Pearson new international edition.] |
Pubbl/distr/stampa | Harlow, Essex : , : Pearson, , [2014] |
Descrizione fisica | 1 online resource (934 pages) : illustrations (some color), tables, graphs |
Disciplina | 621.381 |
Collana | Always learning |
Soggetto topico | Digital electronics |
ISBN | 1-292-03804-7 |
Formato | Materiale a stampa ![]() |
Livello bibliografico | Monografia |
Lingua di pubblicazione | eng |
Nota di contenuto | Cover -- Table of Contents -- 1. Number Systems and Codes -- 2. Digital Electronic Signals and Switches -- 3. Basic Logic Gates -- 4. Programmable Logic Devices: CPLDs and FPGAs with VHDL Design -- 5. Boolean Algebra and Reduction Techniques -- 6. Exclusive-OR and Exclusive-NOR Gates -- 7. Arithmetic Operations and Circuits -- 8. Code Converters, Multiplexers, and Demultiplexers -- 9. Logic Families and Their Characteristics -- 10. Flip-Flops and Registers -- 11. Practical Considerations for Digital Design -- 12. Counter Circuits and VHDL State Machines -- 13. Shift Registers -- 14. Multivibrators and the 555 Timer -- 15. Interfacing to the Analog World -- 16. Semiconductor, Magnetic, and Optical Memory -- 17. Microprocessor Fundamentals -- Appendix: WWW Sites -- Appendix: Manufacturers' Data Sheets -- Appendix: Explanation of the IEEE/IEC Standard for Logic Symbols (Dependency Notation) -- Appendix: VHDL Language Reference -- Appendix: Review of Basic Electricity Principles -- Appendix: Schematic Diagrams for Chapter-End Problems -- Appendix: 8051 Instruction Set -- TTL Pin Configurations -- Index -- 1 -- 4 -- 5. |
Record Nr. | UNINA-9910153108603321 |
Kleitz William
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Harlow, Essex : , : Pearson, , [2014] | ||
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Lo trovi qui: Univ. Federico II | ||
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Digital electronics [[electronic resource] ] : principles, devices and applications / / Anil K. Maini |
Autore | Maini Anil Kumar |
Edizione | [1st edition] |
Pubbl/distr/stampa | Chichester, England ; ; Hoboken, NJ, : J. Wiley, c2007 |
Descrizione fisica | 1 online resource (753 p.) |
Disciplina | 621.381 |
Soggetto topico | Digital electronics |
Soggetto genere / forma | Electronic books. |
ISBN |
1-280-97396-X
9786610973965 0-470-51052-8 0-470-51051-X |
Formato | Materiale a stampa ![]() |
Livello bibliografico | Monografia |
Lingua di pubblicazione | eng |
Nota di contenuto |
Digital Electronics; Contents; Preface; 1 Number Systems; 1.1 Analogue Versus Digital; 1.2 Introduction to Number Systems; 1.3 Decimal Number System; 1.4 Binary Number System; 1.4.1 Advantages; 1.5 Octal Number System; 1.6 Hexadecimal Number System; 1.7 Number Systems - Some Common Terms; 1.7.1 Binary Number System; 1.7.2 Decimal Number System; 1.7.3 Octal Number System; 1.7.4 Hexadecimal Number System; 1.8 Number Representation in Binary; 1.8.1 Sign-Bit Magnitude; 1.8.2 1's Complement; 1.8.3 2's Complement; 1.9 Finding the Decimal Equivalent; 1.9.1 Binary-to-Decimal Conversion
1.9.2 Octal-to-Decimal Conversion1.9.3 Hexadecimal-to-Decimal Conversion; 1.10 Decimal-to-Binary Conversion; 1.11 Decimal-to-Octal Conversion; 1.12 Decimal-to-Hexadecimal Conversion; 1.13 Binary-Octal and Octal-Binary Conversions; 1.14 Hex-Binary and Binary-Hex Conversions; 1.15 Hex-Octal and Octal-Hex Conversions; 1.16 The Four Axioms; 1.17 Floating-Point Numbers; 1.17.1 Range of Numbers and Precision; 1.17.2 Floating-Point Number Formats; Review Questions; Problems; Further Reading; 2 Binary Codes; 2.1 Binary Coded Decimal; 2.1.1 BCD-to-Binary Conversion; 2.1.2 Binary-to-BCD Conversion 2.1.3 Higher-Density BCD Encoding2.1.4 Packed and Unpacked BCD Numbers; 2.2 Excess-3 Code; 2.3 Gray Code; 2.3.1 Binary-Gray Code Conversion; 2.3.2 Gray Code-Binary Conversion; 2.3.3 n-ary Gray Code; 2.3.4 Applications; 2.4 Alphanumeric Codes; 2.4.1 ASCII code; 2.4.2 EBCDIC code; 2.4.3 Unicode; 2.5 Seven-segment Display Code; 2.6 Error Detection and Correction Codes; 2.6.1 Parity Code; 2.6.2 Repetition Code; 2.6.3 Cyclic Redundancy Check Code; 2.6.4 Hamming Code; Review Questions; Problems; Further Reading; 3 Digital Arithmetic; 3.1 Basic Rules of Binary Addition and Subtraction 3.2 Addition of Larger-Bit Binary Numbers3.2.1 Addition Using the 2's Complement Method; 3.3 Subtraction of Larger-Bit Binary Numbers; 3.3.1 Subtraction Using 2's Complement Arithmetic; 3.4 BCD Addition and Subtraction in Excess-3 Code; 3.4.1 Addition; 3.4.2 Subtraction; 3.5 Binary Multiplication; 3.5.1 Repeated Left-Shift and Add Algorithm; 3.5.2 Repeated Add and Right-Shift Algorithm; 3.6 Binary Division; 3.6.1 Repeated Right-Shift and Subtract Algorithm; 3.6.2 Repeated Subtract and Left-Shift Algorithm; 3.7 Floating-Point Arithmetic; 3.7.1 Addition and Subtraction 3.7.2 Multiplication and DivisionReview Questions; Problems; Further Reading; 4 Logic Gates and Related Devices; 4.1 Positive and Negative Logic; 4.2 Truth Table; 4.3 Logic Gates; 4.3.1 OR Gate; 4.3.2 AND Gate; 4.3.3 NOT Gate; 4.3.4 EXCLUSIVE-OR Gate; 4.3.5 NAND Gate; 4.3.6 NOR Gate; 4.3.7 EXCLUSIVE-NOR Gate; 4.3.8 INHIBIT Gate; 4.4 Universal Gates; 4.5 Gates with Open Collector/Drain Outputs; 4.6 Tristate Logic Gates; 4.7 AND-OR-INVERT Gates; 4.8 Schmitt Gates; 4.9 Special Output Gates; 4.10 Fan-Out of Logic Gates; 4.11 Buffers and Transceivers; 4.12 IEEE/ANSI Standard Symbols 4.12.1 IEEE/ANSI Standards - Salient Features |
Record Nr. | UNINA-9910143590903321 |
Maini Anil Kumar
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Chichester, England ; ; Hoboken, NJ, : J. Wiley, c2007 | ||
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Lo trovi qui: Univ. Federico II | ||
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Digital electronics [[electronic resource] ] : principles, devices and applications / / Anil K. Maini |
Autore | Maini Anil Kumar |
Edizione | [1st edition] |
Pubbl/distr/stampa | Chichester, England ; ; Hoboken, NJ, : J. Wiley, c2007 |
Descrizione fisica | 1 online resource (753 p.) |
Disciplina | 621.381 |
Soggetto topico | Digital electronics |
ISBN |
1-280-97396-X
9786610973965 0-470-51052-8 0-470-51051-X |
Formato | Materiale a stampa ![]() |
Livello bibliografico | Monografia |
Lingua di pubblicazione | eng |
Nota di contenuto |
Digital Electronics; Contents; Preface; 1 Number Systems; 1.1 Analogue Versus Digital; 1.2 Introduction to Number Systems; 1.3 Decimal Number System; 1.4 Binary Number System; 1.4.1 Advantages; 1.5 Octal Number System; 1.6 Hexadecimal Number System; 1.7 Number Systems - Some Common Terms; 1.7.1 Binary Number System; 1.7.2 Decimal Number System; 1.7.3 Octal Number System; 1.7.4 Hexadecimal Number System; 1.8 Number Representation in Binary; 1.8.1 Sign-Bit Magnitude; 1.8.2 1's Complement; 1.8.3 2's Complement; 1.9 Finding the Decimal Equivalent; 1.9.1 Binary-to-Decimal Conversion
1.9.2 Octal-to-Decimal Conversion1.9.3 Hexadecimal-to-Decimal Conversion; 1.10 Decimal-to-Binary Conversion; 1.11 Decimal-to-Octal Conversion; 1.12 Decimal-to-Hexadecimal Conversion; 1.13 Binary-Octal and Octal-Binary Conversions; 1.14 Hex-Binary and Binary-Hex Conversions; 1.15 Hex-Octal and Octal-Hex Conversions; 1.16 The Four Axioms; 1.17 Floating-Point Numbers; 1.17.1 Range of Numbers and Precision; 1.17.2 Floating-Point Number Formats; Review Questions; Problems; Further Reading; 2 Binary Codes; 2.1 Binary Coded Decimal; 2.1.1 BCD-to-Binary Conversion; 2.1.2 Binary-to-BCD Conversion 2.1.3 Higher-Density BCD Encoding2.1.4 Packed and Unpacked BCD Numbers; 2.2 Excess-3 Code; 2.3 Gray Code; 2.3.1 Binary-Gray Code Conversion; 2.3.2 Gray Code-Binary Conversion; 2.3.3 n-ary Gray Code; 2.3.4 Applications; 2.4 Alphanumeric Codes; 2.4.1 ASCII code; 2.4.2 EBCDIC code; 2.4.3 Unicode; 2.5 Seven-segment Display Code; 2.6 Error Detection and Correction Codes; 2.6.1 Parity Code; 2.6.2 Repetition Code; 2.6.3 Cyclic Redundancy Check Code; 2.6.4 Hamming Code; Review Questions; Problems; Further Reading; 3 Digital Arithmetic; 3.1 Basic Rules of Binary Addition and Subtraction 3.2 Addition of Larger-Bit Binary Numbers3.2.1 Addition Using the 2's Complement Method; 3.3 Subtraction of Larger-Bit Binary Numbers; 3.3.1 Subtraction Using 2's Complement Arithmetic; 3.4 BCD Addition and Subtraction in Excess-3 Code; 3.4.1 Addition; 3.4.2 Subtraction; 3.5 Binary Multiplication; 3.5.1 Repeated Left-Shift and Add Algorithm; 3.5.2 Repeated Add and Right-Shift Algorithm; 3.6 Binary Division; 3.6.1 Repeated Right-Shift and Subtract Algorithm; 3.6.2 Repeated Subtract and Left-Shift Algorithm; 3.7 Floating-Point Arithmetic; 3.7.1 Addition and Subtraction 3.7.2 Multiplication and DivisionReview Questions; Problems; Further Reading; 4 Logic Gates and Related Devices; 4.1 Positive and Negative Logic; 4.2 Truth Table; 4.3 Logic Gates; 4.3.1 OR Gate; 4.3.2 AND Gate; 4.3.3 NOT Gate; 4.3.4 EXCLUSIVE-OR Gate; 4.3.5 NAND Gate; 4.3.6 NOR Gate; 4.3.7 EXCLUSIVE-NOR Gate; 4.3.8 INHIBIT Gate; 4.4 Universal Gates; 4.5 Gates with Open Collector/Drain Outputs; 4.6 Tristate Logic Gates; 4.7 AND-OR-INVERT Gates; 4.8 Schmitt Gates; 4.9 Special Output Gates; 4.10 Fan-Out of Logic Gates; 4.11 Buffers and Transceivers; 4.12 IEEE/ANSI Standard Symbols 4.12.1 IEEE/ANSI Standards - Salient Features |
Record Nr. | UNINA-9910830339503321 |
Maini Anil Kumar
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Chichester, England ; ; Hoboken, NJ, : J. Wiley, c2007 | ||
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Lo trovi qui: Univ. Federico II | ||
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Digital electronics : principles, devices and applications / / Anil K. Maini |
Autore | Maini Anil Kumar |
Edizione | [1st edition] |
Pubbl/distr/stampa | Chichester, England ; ; Hoboken, NJ, : J. Wiley, c2007 |
Descrizione fisica | 1 online resource (753 p.) |
Disciplina | 621.381 |
Soggetto topico | Digital electronics |
ISBN |
1-280-97396-X
9786610973965 0-470-51052-8 0-470-51051-X |
Formato | Materiale a stampa ![]() |
Livello bibliografico | Monografia |
Lingua di pubblicazione | eng |
Nota di contenuto |
Digital Electronics; Contents; Preface; 1 Number Systems; 1.1 Analogue Versus Digital; 1.2 Introduction to Number Systems; 1.3 Decimal Number System; 1.4 Binary Number System; 1.4.1 Advantages; 1.5 Octal Number System; 1.6 Hexadecimal Number System; 1.7 Number Systems - Some Common Terms; 1.7.1 Binary Number System; 1.7.2 Decimal Number System; 1.7.3 Octal Number System; 1.7.4 Hexadecimal Number System; 1.8 Number Representation in Binary; 1.8.1 Sign-Bit Magnitude; 1.8.2 1's Complement; 1.8.3 2's Complement; 1.9 Finding the Decimal Equivalent; 1.9.1 Binary-to-Decimal Conversion
1.9.2 Octal-to-Decimal Conversion1.9.3 Hexadecimal-to-Decimal Conversion; 1.10 Decimal-to-Binary Conversion; 1.11 Decimal-to-Octal Conversion; 1.12 Decimal-to-Hexadecimal Conversion; 1.13 Binary-Octal and Octal-Binary Conversions; 1.14 Hex-Binary and Binary-Hex Conversions; 1.15 Hex-Octal and Octal-Hex Conversions; 1.16 The Four Axioms; 1.17 Floating-Point Numbers; 1.17.1 Range of Numbers and Precision; 1.17.2 Floating-Point Number Formats; Review Questions; Problems; Further Reading; 2 Binary Codes; 2.1 Binary Coded Decimal; 2.1.1 BCD-to-Binary Conversion; 2.1.2 Binary-to-BCD Conversion 2.1.3 Higher-Density BCD Encoding2.1.4 Packed and Unpacked BCD Numbers; 2.2 Excess-3 Code; 2.3 Gray Code; 2.3.1 Binary-Gray Code Conversion; 2.3.2 Gray Code-Binary Conversion; 2.3.3 n-ary Gray Code; 2.3.4 Applications; 2.4 Alphanumeric Codes; 2.4.1 ASCII code; 2.4.2 EBCDIC code; 2.4.3 Unicode; 2.5 Seven-segment Display Code; 2.6 Error Detection and Correction Codes; 2.6.1 Parity Code; 2.6.2 Repetition Code; 2.6.3 Cyclic Redundancy Check Code; 2.6.4 Hamming Code; Review Questions; Problems; Further Reading; 3 Digital Arithmetic; 3.1 Basic Rules of Binary Addition and Subtraction 3.2 Addition of Larger-Bit Binary Numbers3.2.1 Addition Using the 2's Complement Method; 3.3 Subtraction of Larger-Bit Binary Numbers; 3.3.1 Subtraction Using 2's Complement Arithmetic; 3.4 BCD Addition and Subtraction in Excess-3 Code; 3.4.1 Addition; 3.4.2 Subtraction; 3.5 Binary Multiplication; 3.5.1 Repeated Left-Shift and Add Algorithm; 3.5.2 Repeated Add and Right-Shift Algorithm; 3.6 Binary Division; 3.6.1 Repeated Right-Shift and Subtract Algorithm; 3.6.2 Repeated Subtract and Left-Shift Algorithm; 3.7 Floating-Point Arithmetic; 3.7.1 Addition and Subtraction 3.7.2 Multiplication and DivisionReview Questions; Problems; Further Reading; 4 Logic Gates and Related Devices; 4.1 Positive and Negative Logic; 4.2 Truth Table; 4.3 Logic Gates; 4.3.1 OR Gate; 4.3.2 AND Gate; 4.3.3 NOT Gate; 4.3.4 EXCLUSIVE-OR Gate; 4.3.5 NAND Gate; 4.3.6 NOR Gate; 4.3.7 EXCLUSIVE-NOR Gate; 4.3.8 INHIBIT Gate; 4.4 Universal Gates; 4.5 Gates with Open Collector/Drain Outputs; 4.6 Tristate Logic Gates; 4.7 AND-OR-INVERT Gates; 4.8 Schmitt Gates; 4.9 Special Output Gates; 4.10 Fan-Out of Logic Gates; 4.11 Buffers and Transceivers; 4.12 IEEE/ANSI Standard Symbols 4.12.1 IEEE/ANSI Standards - Salient Features |
Record Nr. | UNINA-9910877186403321 |
Maini Anil Kumar
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Chichester, England ; ; Hoboken, NJ, : J. Wiley, c2007 | ||
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Lo trovi qui: Univ. Federico II | ||
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Digital electronics . 3 Finite-state machines / / Tertulien Ndjountche |
Autore | Ndjountche Tertulien |
Pubbl/distr/stampa | London, England ; ; Hoboken, New Jersey : , : iSTE : , : Wiley, , 2016 |
Descrizione fisica | 1 online resource (335 pages) : illustrations |
Disciplina | 621.381 |
Collana | Electronics Engineering Series |
Soggetto topico |
Digital electronics
Sequential machine theory |
ISBN |
1-119-37108-2
1-119-37111-2 |
Formato | Materiale a stampa ![]() |
Livello bibliografico | Monografia |
Lingua di pubblicazione | eng |
Record Nr. | UNINA-9910148573703321 |
Ndjountche Tertulien
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London, England ; ; Hoboken, New Jersey : , : iSTE : , : Wiley, , 2016 | ||
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Lo trovi qui: Univ. Federico II | ||
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Digital electronics . 3 Finite-state machines / / Tertulien Ndjountche |
Autore | Ndjountche Tertulien |
Pubbl/distr/stampa | London, England ; ; Hoboken, New Jersey : , : iSTE : , : Wiley, , 2016 |
Descrizione fisica | 1 online resource (335 pages) : illustrations |
Disciplina | 621.381 |
Collana | Electronics Engineering Series |
Soggetto topico |
Digital electronics
Sequential machine theory |
ISBN |
1-119-37108-2
1-119-37111-2 |
Formato | Materiale a stampa ![]() |
Livello bibliografico | Monografia |
Lingua di pubblicazione | eng |
Record Nr. | UNINA-9910824534703321 |
Ndjountche Tertulien
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London, England ; ; Hoboken, New Jersey : , : iSTE : , : Wiley, , 2016 | ||
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Lo trovi qui: Univ. Federico II | ||
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Digital electronics 2 : sequential and arithmetric logic circuits / / Tertulien Ndjountche |
Autore | Ndjountche Tertulien |
Pubbl/distr/stampa | London, [England] ; ; Hoboken, New Jersey : , : ISTE : , : Wiley, , 2016 |
Descrizione fisica | 1 online resource (333 pages) : illustrations, tables |
Disciplina | 621.381 |
Soggetto topico |
Digital electronics
Logic design Integrated circuits |
ISBN |
1-119-32977-9
1-119-32975-2 1-119-32976-0 |
Formato | Materiale a stampa ![]() |
Livello bibliografico | Monografia |
Lingua di pubblicazione | eng |
Record Nr. | UNINA-9910137075303321 |
Ndjountche Tertulien
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London, [England] ; ; Hoboken, New Jersey : , : ISTE : , : Wiley, , 2016 | ||
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Lo trovi qui: Univ. Federico II | ||
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Digital electronics 2 : sequential and arithmetric logic circuits / / Tertulien Ndjountche |
Autore | Ndjountche Tertulien |
Pubbl/distr/stampa | London, [England] ; ; Hoboken, New Jersey : , : ISTE : , : Wiley, , 2016 |
Descrizione fisica | 1 online resource (333 pages) : illustrations, tables |
Disciplina | 621.381 |
Soggetto topico |
Digital electronics
Logic design Integrated circuits |
ISBN |
1-119-32977-9
1-119-32975-2 1-119-32976-0 |
Formato | Materiale a stampa ![]() |
Livello bibliografico | Monografia |
Lingua di pubblicazione | eng |
Record Nr. | UNINA-9910822787903321 |
Ndjountche Tertulien
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London, [England] ; ; Hoboken, New Jersey : , : ISTE : , : Wiley, , 2016 | ||
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Lo trovi qui: Univ. Federico II | ||
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Digital enterprise design and management 2013 : proceedings of the First International Conference on Digital Enterprise Design and Management DED&M 2013 / / Pierre-Jean Benghozi, Daniel Krob, Frantz Rowe (eds.) |
Autore | Benghozi Pierre-Jean |
Edizione | [1st ed. 2013.] |
Pubbl/distr/stampa | Heidelberg ; ; New York, : Springer, c2013 |
Descrizione fisica | 1 online resource (xvii, 182 pages) : illustrations (chiefly color) |
Disciplina | 006.3 |
Altri autori (Persone) |
KrobDaniel
RoweFrantz |
Collana | Advances in intelligent systems and computing |
Soggetto topico |
Digital electronics
Electronic systems |
ISBN | 3-642-37317-8 |
Formato | Materiale a stampa ![]() |
Livello bibliografico | Monografia |
Lingua di pubblicazione | eng |
Nota di contenuto | From the Contents: Use Case: Business Intelligence "New Generation" for a "Zero Latency" -- Organization (when decisional & operational BI are fully embedded) -- The Enterprise as the Experiential Design Platform -- From a strategic view to an engineering view in a digital enterprise. The case of a multi-country Telco -- GrammAds: Keyword and Ad Creative Generator for Online Advertising Campaigns -- Interoperable Systems and Software Evolution: Issues and Approaches. |
Record Nr. | UNINA-9910438059503321 |
Benghozi Pierre-Jean
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Heidelberg ; ; New York, : Springer, c2013 | ||
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Lo trovi qui: Univ. Federico II | ||
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