IEEE standard for VHDL register transfer level (RTL) synthesis

• Pubblicazione: New York : , : IEEE, , 2004
• Descrizione fisica: 1 online resource (112 pages)
• Disciplina: 621.392
• Soggetto topico: VHDL (Computer hardware description language) - Standards; Computer hardware description languages - Standards
• Sommario/riassunto: This document specifies a standard for use of very high-speed integrated circuit hardwaredescription language (VHDL) to model synthesizable register-transfer level digital logic. Astandard syntax and semantics for VHDL register-transfer level synthesis is defined. The subset ofthe VHDL language, which is synthesizable, is described, and nonsynthesizable VHDL constructsare identified that should be ignored or flagged as errors.
• Titolo autorizzato: IEEE standard for VHDL register transfer level (RTL) synthesis
• Formato: Materiale a stampa
• Livello bibliografico: Monografia
• Lingua di pubblicazione: Inglese
• Record Nr.: 9910147232003321
• Lo trovi qui: Univ. Federico II