01766nam 2200397 450 991014723200332120170929093232.0(CKB)1000000000035411(WaSeSS)IndRDA00078081(NjHacI)991000000000035411(EXLCZ)99100000000003541120170929d2004 || |engur|||||||||||txtrdacontentcrdamediacrrdacarrierIEEE standard for VHDL register transfer level (RTL) synthesisNew York :IEEE,2004.1 online resource (112 pages)0-7381-4065-1 This document specifies a standard for use of very high-speed integrated circuit hardwaredescription language (VHDL) to model synthesizable register-transfer level digital logic. Astandard syntax and semantics for VHDL register-transfer level synthesis is defined. The subset ofthe VHDL language, which is synthesizable, is described, and nonsynthesizable VHDL constructsare identified that should be ignored or flagged as errors.VHDL (Computer hardware description language)StandardsComputer hardware description languagesStandardsVHDL (Computer hardware description language)Standards.Computer hardware description languagesStandards.621.392Institute of Electrical and Electronics Engineers,American National Standards Institute,IEEE-SA Standards Board,WaSeSSWaSeSSDOCUMENT9910147232003321IEEE standard for VHDL register transfer level (RTL) synthesis2576459UNINA