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Trustworthy Hardware Design: Combinational Logic Locking Techniques / / by Muhammad Yasin, Jeyavijayan (JV) Rajendran, Ozgur Sinanoglu



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Autore: Yasin Muhammad Visualizza persona
Titolo: Trustworthy Hardware Design: Combinational Logic Locking Techniques / / by Muhammad Yasin, Jeyavijayan (JV) Rajendran, Ozgur Sinanoglu Visualizza cluster
Pubblicazione: Cham : , : Springer International Publishing : , : Imprint : Springer, , 2020
Edizione: 1st ed. 2020.
Descrizione fisica: 1 online resource (XXI, 142 p. 65 illus., 58 illus. in color.)
Disciplina: 621.3815
621.395
Soggetto topico: Electronic circuits
Logic design
Arithmetic and logic units, Computer
Circuits and Systems
Logic Design
Arithmetic and Logic Structures
Persona (resp. second.): RajendranJeyavijayan (JV)
SinanogluOzgur
Nota di contenuto: The Need for Logic Locking -- A Brief History of Logic Locking -- Pre-SAT Logic Locking -- The SAT Attack -- Post-SAT 1: Point function-based Logic Locking -- Approximate Attacks -- Structural Attacks -- Post-SAT 2: Insertion of SAT-unresolvable Structures -- Post-SAT 3: Stripped-Functionality Logic Locking.
Sommario/riassunto: With the popularity of hardware security research, several edited monograms have been published, which aim at summarizing the research in a particular field. Typically, each book chapter is a recompilation of one or more research papers, and the focus is on summarizing the state-of-the-art research. Different from the edited monograms, the chapters in this book are not re-compilations of research papers. The book follows a pedagogical approach. Each chapter has been planned to emphasize the fundamental principles behind the logic locking algorithms and relate concepts to each other using a systematization of knowledge approach. Furthermore, the authors of this book are in a good position to be able to deliver such a book, as they contributed to this field significantly through numerous fundamental papers.
Titolo autorizzato: Trustworthy Hardware Design: Combinational Logic Locking Techniques  Visualizza cluster
ISBN: 3-030-15334-7
Formato: Materiale a stampa
Livello bibliografico Monografia
Lingua di pubblicazione: Inglese
Record Nr.: 9910366598103321
Lo trovi qui: Univ. Federico II
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Serie: Analog Circuits and Signal Processing, . 1872-082X