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Record Nr. |
UNINA9910366598103321 |
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Autore |
Yasin Muhammad |
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Titolo |
Trustworthy Hardware Design: Combinational Logic Locking Techniques / / by Muhammad Yasin, Jeyavijayan (JV) Rajendran, Ozgur Sinanoglu |
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Pubbl/distr/stampa |
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Cham : , : Springer International Publishing : , : Imprint : Springer, , 2020 |
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ISBN |
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Edizione |
[1st ed. 2020.] |
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Descrizione fisica |
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1 online resource (XXI, 142 p. 65 illus., 58 illus. in color.) |
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Collana |
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Analog Circuits and Signal Processing, , 1872-082X |
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Disciplina |
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Soggetti |
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Electronic circuits |
Logic design |
Arithmetic and logic units, Computer |
Circuits and Systems |
Logic Design |
Arithmetic and Logic Structures |
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Lingua di pubblicazione |
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Formato |
Materiale a stampa |
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Livello bibliografico |
Monografia |
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Nota di contenuto |
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The Need for Logic Locking -- A Brief History of Logic Locking -- Pre-SAT Logic Locking -- The SAT Attack -- Post-SAT 1: Point function-based Logic Locking -- Approximate Attacks -- Structural Attacks -- Post-SAT 2: Insertion of SAT-unresolvable Structures -- Post-SAT 3: Stripped-Functionality Logic Locking. |
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Sommario/riassunto |
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With the popularity of hardware security research, several edited monograms have been published, which aim at summarizing the research in a particular field. Typically, each book chapter is a recompilation of one or more research papers, and the focus is on summarizing the state-of-the-art research. Different from the edited monograms, the chapters in this book are not re-compilations of research papers. The book follows a pedagogical approach. Each chapter has been planned to emphasize the fundamental principles behind the logic locking algorithms and relate concepts to each other using a systematization of knowledge approach. Furthermore, the authors of this book are in a good position to be able to deliver such a |
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book, as they contributed to this field significantly through numerous fundamental papers. |
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