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MARC Lista (tabellare)
Signal integrity and radiated emission of high-speed digital systems [[electronic resource] /] / Spartaco Caniggia, Francescaromana Maradei
Signal integrity and radiated emission of high-speed digital systems [[electronic resource] /] / Spartaco Caniggia, Francescaromana Maradei
Autore Caniggia Spartaco
Edizione [1st edition]
Pubbl/distr/stampa Chichester, U.K., : Wiley, 2008
Descrizione fisica 1 online resource (554 p.)
Disciplina 621.382/24
Altri autori (Persone) MaradeiFrancescaromana
Soggetto topico Electromagnetic interference
Digital electronics
Very high speed integrated circuits
Crosstalk
Signal processing
ISBN 1-282-01071-9
9786612010712
0-470-77287-5
0-470-77288-3
Classificazione 05.42
Formato Materiale a stampa
Livello bibliografico Monografia
Lingua di pubblicazione eng
Nota di contenuto SIGNAL INTEGRITY ANDRADIATED EMISSIONOF HIGH-SPEED DIGITAL SYSTEMS; Contents; List of Examples; Foreword; Preface; 1 Introduction to Signal Integrity and Radiated Emission in a Digital System; 1.1 Power and Signal Integrity; 1.1.1 Power Distribution Network; 1.1.2 Signal Distribution Network; 1.1.3 Noise Limitations and Design for Characteristic Impedance; 1.2 Radiated Emission; 1.2.1 Definition of Radiated Emission Sources; 1.2.2 Radiated Emission Standards; 1.2.3 Radiated Emission from a Real System; 1.3 Signaling and Logic Devices; 1.3.1 Overshoot, Undershoot and Plateau
1.3.2 Noise Immunity1.3.3 Timing Parameters; 1.3.4 Eye Diagram; 1.4 Modeling Digital Systems; 1.4.1 Mathematical Tools; 1.4.2 Spice-Like Circuit Simulators; 1.4.3 Full-Wave Numerical Tools; 1.4.4 Professional Simulators; References; 2 High-Speed Digital Devices; 2.1 Input/Output Static Characteristic; 2.1.1 Current and Voltage Specifications; 2.1.2 Transistor-Transistor Logic (TTL) Devices; 2.1.3 Complementary Metal Oxide Semiconductor (CMOS) Devices; 2.1.4 Emitter-Coupled Logic (ECL) Devices; 2.1.5 Low-Voltage Differential Signal (LVDS) Devices
2.1.6 Logic Devices Powered and the Logic Level2.2 Dynamic Characteristics: Gate Delay and Rise and Fall Times; 2.3 Driver and Receiver Modeling; 2.3.1 Types of Driver Model; 2.3.2 Driver Switching Currents Path; 2.3.3 Driver Non-Linear Behavioral Model; 2.3.4 Receiver Non-Linear Behavioral Modeling; 2.4 I/O Buffer Information Specification (IBIS) Models; 2.4.1 Structure of an IBIS Model; 2.4.2 IBIS Models and Spice; References; 3 Inductance; 3.1 Loop Inductance; 3.1.1 Inductances of Coupled Loops; 3.1.2 Inductances of Thin Filamentary Circuits; 3.1.3 Equivalent Circuit of Two Coupled Loops
3.1.4 L Matrix of Two Coupled Conductors Having a Reference Return Conductor3.1.5 L Calculation of a Three-Conductor Wire-Type Line; 3.1.6 Frequency-Dependent Internal Inductance; 3.2 Partial Inductance; 3.2.1 Partial Inductances of Coupled Loops; 3.2.2 Flux Area of Partial Inductance of Thin Filamentary Segments; 3.2.3 Loop Inductance Decomposed into Partial Inductances; 3.2.4 Self and Mutual Partial Inductance; 3.2.5 Inductance Between Two Parallel Conductors; 3.2.6 Loop Inductance Matrix Calculation by Partial Inductances; 3.2.7 Partial Inductance Associated with a Finite Ground Plane
3.2.8 Solving Inductance Problems in PCBs3.3 Differential Mode and Common Mode Inductance; 3.3.1 Differential Mode Inductance; 3.3.2 Common Mode Inductance; References; 4 Capacitance; 4.1 Capacitance Between Conductors; 4.1.1 Definition of Capacitance; 4.1.2 Partial Capacitance and Capacitance Matrix of Two Coupled Conductors Having a Reference Return Conductor; 4.1.3 Capacitance Matrix of n Coupled Conductors Having a Reference Return Conductor; 4.2 Differential Mode and Common Mode Capacitance; 4.2.1 Differential Mode Capacitance; 4.2.2 Common Mode Capacitance; References
5 Reflection on Signal Lines
Record Nr. UNINA-9910822567603321
Caniggia Spartaco  
Chichester, U.K., : Wiley, 2008
Materiale a stampa
Lo trovi qui: Univ. Federico II
Opac: Controlla la disponibilità qui
Surfen in die digitale Zukunft [[electronic resource] /] / Dieter Lutzke
Surfen in die digitale Zukunft [[electronic resource] /] / Dieter Lutzke
Autore Lutzke Dieter
Edizione [1. Aufl.]
Pubbl/distr/stampa Weinheim, : Wiley-VCH, 2012
Descrizione fisica 1 online resource (206 p.)
Disciplina 302.231
Collana Erlebnis Wissenschaft
Soggetto topico Digital electronics
Soggetto genere / forma Electronic books.
ISBN 3-527-65080-6
3-527-65082-2
3-527-65083-0
1-299-15741-6
Formato Materiale a stampa
Livello bibliografico Monografia
Lingua di pubblicazione ger
Nota di contenuto 5.1 Kabelverbindungen im Heimbereich5.2 Grafik- und Videoschnittstellen in der Unterhaltungselektronik; 5.3 Verbindungen nach draußen; 5.4 Der TV-Kabel-Anschluss; 5.5 Drahtlose digitale Datenübertragung mit Radiowellen; 6 Unser geliebtes Handy - Mobilfunk für die mobile Welt; 7 Unser digitaler Standort; 8 DigitaleNetze; 8.1 Internet - das globale digitale Netz; 9 Unsere digitale Zukunft; 9.1 Zukunft des Internets; 10 Anhang; 10.1 Die Darstellung von großen und kleinen Zahlen; 11 Quellenanmerkung; 12 Index
Record Nr. UNINA-9910138851203321
Lutzke Dieter  
Weinheim, : Wiley-VCH, 2012
Materiale a stampa
Lo trovi qui: Univ. Federico II
Opac: Controlla la disponibilità qui
Surfen in die digitale Zukunft [[electronic resource] /] / Dieter Lutzke
Surfen in die digitale Zukunft [[electronic resource] /] / Dieter Lutzke
Autore Lutzke Dieter
Edizione [1. Aufl.]
Pubbl/distr/stampa Weinheim, : Wiley-VCH, 2012
Descrizione fisica 1 online resource (206 p.)
Disciplina 302.231
Collana Erlebnis Wissenschaft
Soggetto topico Digital electronics
ISBN 3-527-65080-6
3-527-65082-2
3-527-65083-0
1-299-15741-6
Formato Materiale a stampa
Livello bibliografico Monografia
Lingua di pubblicazione ger
Nota di contenuto 5.1 Kabelverbindungen im Heimbereich5.2 Grafik- und Videoschnittstellen in der Unterhaltungselektronik; 5.3 Verbindungen nach draußen; 5.4 Der TV-Kabel-Anschluss; 5.5 Drahtlose digitale Datenübertragung mit Radiowellen; 6 Unser geliebtes Handy - Mobilfunk für die mobile Welt; 7 Unser digitaler Standort; 8 DigitaleNetze; 8.1 Internet - das globale digitale Netz; 9 Unsere digitale Zukunft; 9.1 Zukunft des Internets; 10 Anhang; 10.1 Die Darstellung von großen und kleinen Zahlen; 11 Quellenanmerkung; 12 Index
Record Nr. UNINA-9910830404303321
Lutzke Dieter  
Weinheim, : Wiley-VCH, 2012
Materiale a stampa
Lo trovi qui: Univ. Federico II
Opac: Controlla la disponibilità qui
Surfen in die digitale Zukunft [[electronic resource] /] / Dieter Lutzke
Surfen in die digitale Zukunft [[electronic resource] /] / Dieter Lutzke
Autore Lutzke Dieter
Edizione [1. Aufl.]
Pubbl/distr/stampa Weinheim, : Wiley-VCH, 2012
Descrizione fisica 1 online resource (206 p.)
Disciplina 302.231
Collana Erlebnis Wissenschaft
Soggetto topico Digital electronics
ISBN 3-527-65080-6
3-527-65082-2
3-527-65083-0
1-299-15741-6
Formato Materiale a stampa
Livello bibliografico Monografia
Lingua di pubblicazione ger
Nota di contenuto 5.1 Kabelverbindungen im Heimbereich5.2 Grafik- und Videoschnittstellen in der Unterhaltungselektronik; 5.3 Verbindungen nach draußen; 5.4 Der TV-Kabel-Anschluss; 5.5 Drahtlose digitale Datenübertragung mit Radiowellen; 6 Unser geliebtes Handy - Mobilfunk für die mobile Welt; 7 Unser digitaler Standort; 8 DigitaleNetze; 8.1 Internet - das globale digitale Netz; 9 Unsere digitale Zukunft; 9.1 Zukunft des Internets; 10 Anhang; 10.1 Die Darstellung von großen und kleinen Zahlen; 11 Quellenanmerkung; 12 Index
Record Nr. UNINA-9910840704403321
Lutzke Dieter  
Weinheim, : Wiley-VCH, 2012
Materiale a stampa
Lo trovi qui: Univ. Federico II
Opac: Controlla la disponibilità qui
Synthesis of arithmetic circuits [[electronic resource] ] : FPGA, ASIC and embedded systems / / Jean-Pierre Deschamps, Gery Jean Antoine Bioul, Gustavo D. Sutter
Synthesis of arithmetic circuits [[electronic resource] ] : FPGA, ASIC and embedded systems / / Jean-Pierre Deschamps, Gery Jean Antoine Bioul, Gustavo D. Sutter
Autore Deschamps Jean-Pierre <1945->
Edizione [1st edition]
Pubbl/distr/stampa Hoboken, N.J., : John Wiley, 2005
Descrizione fisica 1 online resource (578 p.)
Disciplina 621.39/5
621.395
Altri autori (Persone) BioulGéry Jean Antoine
SutterGustavo D
Soggetto topico Computer arithmetic and logic units
Digital electronics
Embedded computer systems
Soggetto genere / forma Electronic books.
ISBN 1-280-41141-4
9786610411412
0-470-32398-1
0-471-74142-6
0-471-74141-8
Formato Materiale a stampa
Livello bibliografico Monografia
Lingua di pubblicazione eng
Nota di contenuto SYNTHESIS OF ARITHMETIC CIRCUITS; CONTENTS; Preface; About the Authors; 1 Introduction; 1.1 Number Representation; 1.2 Algorithms; 1.3 Hardware Platforms; 1.4 Hardware-Software Partitioning; 1.5 Software Generation; 1.6 Synthesis; 1.7 A First Example; 1.7.1 Specification; 1.7.2 Number Representation; 1.7.3 Algorithms; 1.7.4 Hardware Platform; 1.7.5 Hardware-Software Partitioning; 1.7.6 Program Generation; 1.7.7 Synthesis; 1.7.8 Prototype; 1.8 Bibliography; 2 Mathematical Background; 2.1 Number Theory; 2.1.1 Basic Definitions; 2.1.2 Euclidean Algorithms; 2.1.3 Congruences; 2.2 Algebra
2.2.1 Groups2.2.2 Rings; 2.2.3 Fields; 2.2.4 Polynomial Rings; 2.2.5 Congruences of Polynomial; 2.3 Function Approximation; 2.4 Bibliography; 3 Number Representation; 3.1 Natural Numbers; 3.1.1 Weighted Systems; 3.1.2 Residue Number System; 3.2 Integers; 3.2.1 Sign-Magnitude Representation; 3.2.2 Excess-E Representation; 3.2.3 B's Complement Representation; 3.2.4 Booth's Encoding; 3.3 Real Numbers; 3.4 Bibliography; 4 Arithmetic Operations: Addition and Subtraction; 4.1 Addition of Natural Numbers; 4.1.1 Basic Algorithm; 4.1.2 Faster Algorithms; 4.1.3 Long-Operand Addition
4.1.4 Multioperand Addition4.1.5 Long-Multioperand Addition; 4.2 Subtraction of Natural Numbers; 4.3 Integers; 4.3.1 B's Complement Addition; 4.3.2 B's Complement Sign Change; 4.3.3 B's Complement Subtraction; 4.3.4 B's Complement Overflow Detection; 4.3.5 Excess-E Addition and Subtraction; 4.3.6 Sign-Magnitude Addition and Subtraction; 4.4 Bibliography; 5 Arithmetic Operations: Multiplication; 5.1 Natural Numbers Multiplication; 5.1.1 Introduction; 5.1.2 Shift and Add Algorithms; 5.1.2.1 Shift and Add 1; 5.1.2.2 Shift and Add 2; 5.1.2.3 Extended Shift and Add Algorithm: XY + C + D
5.1.2.4 Cellular Shift and Add5.1.3 Long-Operand Algorithm; 5.2 Integers; 5.2.1 B's Complement Multiplication; 5.2.1.1 Mod B(n+m) B's Complement Multiplication; 5.2.1.2 Signed Shift and Add; 5.2.1.3 Postcorrection B's Complement Multiplication; 5.2.2 Postcorrection 2's Complement Multiplication; 5.2.3 Booth Multiplication for Binary Numbers; 5.2.3.1 Booth-r Algorithms; 5.2.3.2 Per Gelosia Signed-Digit Algorithm; 5.2.4 Booth Multiplication for Base-B Numbers (Booth-r Algorithm in Base B); 5.3 Squaring; 5.3.1 Base-B Squaring; 5.3.1.1 Cellular Carry-Save Squaring Algorithm; 5.3.2 Base-2 Squaring
5.4 Bibliography6 Arithmetic Operations: Division; 6.1 Natural Numbers; 6.2 Integers; 6.2.1 General Algorithm; 6.2.2 Restoring Division Algorithm; 6.2.3 Base-2 Nonrestoring Division Algorithm; 6.2.4 SRT Radix-2 Division; 6.2.5 SRT Radix-2 Division with Stored-Carry Encoding; 6.2.6 P-D Diagram; 6.2.7 SRT-4 Division; 6.2.8 Base-B Nonrestoring Division Algorithm; 6.3 Convergence (Functional Iteration) Algorithms; 6.3.1 Introduction; 6.3.2 Newton-Raphson Iteration Technique; 6.3.3 MacLaurin Expansion-Goldschmidt's Algorithm; 6.4 Bibliography; 7 Other Arithmetic Operations; 7.1 Base Conversion
7.2 Residue Number System Conversion
Record Nr. UNINA-9910143556503321
Deschamps Jean-Pierre <1945->  
Hoboken, N.J., : John Wiley, 2005
Materiale a stampa
Lo trovi qui: Univ. Federico II
Opac: Controlla la disponibilità qui
Synthesis of arithmetic circuits [[electronic resource] ] : FPGA, ASIC and embedded systems / / Jean-Pierre Deschamps, Gery Jean Antoine Bioul, Gustavo D. Sutter
Synthesis of arithmetic circuits [[electronic resource] ] : FPGA, ASIC and embedded systems / / Jean-Pierre Deschamps, Gery Jean Antoine Bioul, Gustavo D. Sutter
Autore Deschamps Jean-Pierre <1945->
Edizione [1st edition]
Pubbl/distr/stampa Hoboken, N.J., : John Wiley, 2005
Descrizione fisica 1 online resource (578 p.)
Disciplina 621.39/5
621.395
Altri autori (Persone) BioulGéry Jean Antoine
SutterGustavo D
Soggetto topico Computer arithmetic and logic units
Digital electronics
Embedded computer systems
ISBN 1-280-41141-4
9786610411412
0-470-32398-1
0-471-74142-6
0-471-74141-8
Formato Materiale a stampa
Livello bibliografico Monografia
Lingua di pubblicazione eng
Nota di contenuto SYNTHESIS OF ARITHMETIC CIRCUITS; CONTENTS; Preface; About the Authors; 1 Introduction; 1.1 Number Representation; 1.2 Algorithms; 1.3 Hardware Platforms; 1.4 Hardware-Software Partitioning; 1.5 Software Generation; 1.6 Synthesis; 1.7 A First Example; 1.7.1 Specification; 1.7.2 Number Representation; 1.7.3 Algorithms; 1.7.4 Hardware Platform; 1.7.5 Hardware-Software Partitioning; 1.7.6 Program Generation; 1.7.7 Synthesis; 1.7.8 Prototype; 1.8 Bibliography; 2 Mathematical Background; 2.1 Number Theory; 2.1.1 Basic Definitions; 2.1.2 Euclidean Algorithms; 2.1.3 Congruences; 2.2 Algebra
2.2.1 Groups2.2.2 Rings; 2.2.3 Fields; 2.2.4 Polynomial Rings; 2.2.5 Congruences of Polynomial; 2.3 Function Approximation; 2.4 Bibliography; 3 Number Representation; 3.1 Natural Numbers; 3.1.1 Weighted Systems; 3.1.2 Residue Number System; 3.2 Integers; 3.2.1 Sign-Magnitude Representation; 3.2.2 Excess-E Representation; 3.2.3 B's Complement Representation; 3.2.4 Booth's Encoding; 3.3 Real Numbers; 3.4 Bibliography; 4 Arithmetic Operations: Addition and Subtraction; 4.1 Addition of Natural Numbers; 4.1.1 Basic Algorithm; 4.1.2 Faster Algorithms; 4.1.3 Long-Operand Addition
4.1.4 Multioperand Addition4.1.5 Long-Multioperand Addition; 4.2 Subtraction of Natural Numbers; 4.3 Integers; 4.3.1 B's Complement Addition; 4.3.2 B's Complement Sign Change; 4.3.3 B's Complement Subtraction; 4.3.4 B's Complement Overflow Detection; 4.3.5 Excess-E Addition and Subtraction; 4.3.6 Sign-Magnitude Addition and Subtraction; 4.4 Bibliography; 5 Arithmetic Operations: Multiplication; 5.1 Natural Numbers Multiplication; 5.1.1 Introduction; 5.1.2 Shift and Add Algorithms; 5.1.2.1 Shift and Add 1; 5.1.2.2 Shift and Add 2; 5.1.2.3 Extended Shift and Add Algorithm: XY + C + D
5.1.2.4 Cellular Shift and Add5.1.3 Long-Operand Algorithm; 5.2 Integers; 5.2.1 B's Complement Multiplication; 5.2.1.1 Mod B(n+m) B's Complement Multiplication; 5.2.1.2 Signed Shift and Add; 5.2.1.3 Postcorrection B's Complement Multiplication; 5.2.2 Postcorrection 2's Complement Multiplication; 5.2.3 Booth Multiplication for Binary Numbers; 5.2.3.1 Booth-r Algorithms; 5.2.3.2 Per Gelosia Signed-Digit Algorithm; 5.2.4 Booth Multiplication for Base-B Numbers (Booth-r Algorithm in Base B); 5.3 Squaring; 5.3.1 Base-B Squaring; 5.3.1.1 Cellular Carry-Save Squaring Algorithm; 5.3.2 Base-2 Squaring
5.4 Bibliography6 Arithmetic Operations: Division; 6.1 Natural Numbers; 6.2 Integers; 6.2.1 General Algorithm; 6.2.2 Restoring Division Algorithm; 6.2.3 Base-2 Nonrestoring Division Algorithm; 6.2.4 SRT Radix-2 Division; 6.2.5 SRT Radix-2 Division with Stored-Carry Encoding; 6.2.6 P-D Diagram; 6.2.7 SRT-4 Division; 6.2.8 Base-B Nonrestoring Division Algorithm; 6.3 Convergence (Functional Iteration) Algorithms; 6.3.1 Introduction; 6.3.2 Newton-Raphson Iteration Technique; 6.3.3 MacLaurin Expansion-Goldschmidt's Algorithm; 6.4 Bibliography; 7 Other Arithmetic Operations; 7.1 Base Conversion
7.2 Residue Number System Conversion
Record Nr. UNINA-9910830658403321
Deschamps Jean-Pierre <1945->  
Hoboken, N.J., : John Wiley, 2005
Materiale a stampa
Lo trovi qui: Univ. Federico II
Opac: Controlla la disponibilità qui
Synthesis of arithmetic circuits [[electronic resource] ] : FPGA, ASIC and embedded systems / / Jean-Pierre Deschamps, Gery Jean Antoine Bioul, Gustavo D. Sutter
Synthesis of arithmetic circuits [[electronic resource] ] : FPGA, ASIC and embedded systems / / Jean-Pierre Deschamps, Gery Jean Antoine Bioul, Gustavo D. Sutter
Autore Deschamps Jean-Pierre <1945->
Edizione [1st edition]
Pubbl/distr/stampa Hoboken, N.J., : John Wiley, 2005
Descrizione fisica 1 online resource (578 p.)
Disciplina 621.39/5
621.395
Altri autori (Persone) BioulGéry Jean Antoine
SutterGustavo D
Soggetto topico Computer arithmetic and logic units
Digital electronics
Embedded computer systems
ISBN 1-280-41141-4
9786610411412
0-470-32398-1
0-471-74142-6
0-471-74141-8
Formato Materiale a stampa
Livello bibliografico Monografia
Lingua di pubblicazione eng
Nota di contenuto SYNTHESIS OF ARITHMETIC CIRCUITS; CONTENTS; Preface; About the Authors; 1 Introduction; 1.1 Number Representation; 1.2 Algorithms; 1.3 Hardware Platforms; 1.4 Hardware-Software Partitioning; 1.5 Software Generation; 1.6 Synthesis; 1.7 A First Example; 1.7.1 Specification; 1.7.2 Number Representation; 1.7.3 Algorithms; 1.7.4 Hardware Platform; 1.7.5 Hardware-Software Partitioning; 1.7.6 Program Generation; 1.7.7 Synthesis; 1.7.8 Prototype; 1.8 Bibliography; 2 Mathematical Background; 2.1 Number Theory; 2.1.1 Basic Definitions; 2.1.2 Euclidean Algorithms; 2.1.3 Congruences; 2.2 Algebra
2.2.1 Groups2.2.2 Rings; 2.2.3 Fields; 2.2.4 Polynomial Rings; 2.2.5 Congruences of Polynomial; 2.3 Function Approximation; 2.4 Bibliography; 3 Number Representation; 3.1 Natural Numbers; 3.1.1 Weighted Systems; 3.1.2 Residue Number System; 3.2 Integers; 3.2.1 Sign-Magnitude Representation; 3.2.2 Excess-E Representation; 3.2.3 B's Complement Representation; 3.2.4 Booth's Encoding; 3.3 Real Numbers; 3.4 Bibliography; 4 Arithmetic Operations: Addition and Subtraction; 4.1 Addition of Natural Numbers; 4.1.1 Basic Algorithm; 4.1.2 Faster Algorithms; 4.1.3 Long-Operand Addition
4.1.4 Multioperand Addition4.1.5 Long-Multioperand Addition; 4.2 Subtraction of Natural Numbers; 4.3 Integers; 4.3.1 B's Complement Addition; 4.3.2 B's Complement Sign Change; 4.3.3 B's Complement Subtraction; 4.3.4 B's Complement Overflow Detection; 4.3.5 Excess-E Addition and Subtraction; 4.3.6 Sign-Magnitude Addition and Subtraction; 4.4 Bibliography; 5 Arithmetic Operations: Multiplication; 5.1 Natural Numbers Multiplication; 5.1.1 Introduction; 5.1.2 Shift and Add Algorithms; 5.1.2.1 Shift and Add 1; 5.1.2.2 Shift and Add 2; 5.1.2.3 Extended Shift and Add Algorithm: XY + C + D
5.1.2.4 Cellular Shift and Add5.1.3 Long-Operand Algorithm; 5.2 Integers; 5.2.1 B's Complement Multiplication; 5.2.1.1 Mod B(n+m) B's Complement Multiplication; 5.2.1.2 Signed Shift and Add; 5.2.1.3 Postcorrection B's Complement Multiplication; 5.2.2 Postcorrection 2's Complement Multiplication; 5.2.3 Booth Multiplication for Binary Numbers; 5.2.3.1 Booth-r Algorithms; 5.2.3.2 Per Gelosia Signed-Digit Algorithm; 5.2.4 Booth Multiplication for Base-B Numbers (Booth-r Algorithm in Base B); 5.3 Squaring; 5.3.1 Base-B Squaring; 5.3.1.1 Cellular Carry-Save Squaring Algorithm; 5.3.2 Base-2 Squaring
5.4 Bibliography6 Arithmetic Operations: Division; 6.1 Natural Numbers; 6.2 Integers; 6.2.1 General Algorithm; 6.2.2 Restoring Division Algorithm; 6.2.3 Base-2 Nonrestoring Division Algorithm; 6.2.4 SRT Radix-2 Division; 6.2.5 SRT Radix-2 Division with Stored-Carry Encoding; 6.2.6 P-D Diagram; 6.2.7 SRT-4 Division; 6.2.8 Base-B Nonrestoring Division Algorithm; 6.3 Convergence (Functional Iteration) Algorithms; 6.3.1 Introduction; 6.3.2 Newton-Raphson Iteration Technique; 6.3.3 MacLaurin Expansion-Goldschmidt's Algorithm; 6.4 Bibliography; 7 Other Arithmetic Operations; 7.1 Base Conversion
7.2 Residue Number System Conversion
Record Nr. UNINA-9910840965003321
Deschamps Jean-Pierre <1945->  
Hoboken, N.J., : John Wiley, 2005
Materiale a stampa
Lo trovi qui: Univ. Federico II
Opac: Controlla la disponibilità qui
Synthesis of arithmetic circuits : FPGA, ASIC and embedded systems / Jean-Pierre Deschamps, Gery Jean Antoine Bioul, Gustavo D. Sutter
Synthesis of arithmetic circuits : FPGA, ASIC and embedded systems / Jean-Pierre Deschamps, Gery Jean Antoine Bioul, Gustavo D. Sutter
Autore Deschamps, Jean-Pierre, 1945-
Pubbl/distr/stampa Hoboken, N.J. : John Wiley e Sons, c2006
Descrizione fisica xix, 556 p. : ill. ; 24 cm
Disciplina 621.395
Altri autori (Persone) Bioul, Gery Jean Antoineauthor
Sutter, Gustavo D.
Soggetto topico Computer arithmetic and logic units
Digital electronics
Embedded computer systems
ISBN 0471687839
Formato Materiale a stampa
Livello bibliografico Monografia
Lingua di pubblicazione eng
Record Nr. UNISALENTO-991003527199707536
Deschamps, Jean-Pierre, 1945-  
Hoboken, N.J. : John Wiley e Sons, c2006
Materiale a stampa
Lo trovi qui: Univ. del Salento
Opac: Controlla la disponibilità qui
El teletrabajo : entre el mito y la realidad / / Jordi Buira
El teletrabajo : entre el mito y la realidad / / Jordi Buira
Autore Buira Jordi
Pubbl/distr/stampa Barcelona : , : Editorial UOC, , 2012
Descrizione fisica 1 online resource (113 p.)
Disciplina 658.3123
Collana Tic.cerø series
Soggetto topico Telecommuting
Digital electronics
ISBN 84-9029-633-2
Formato Materiale a stampa
Livello bibliografico Monografia
Lingua di pubblicazione spa
Record Nr. UNINA-9910788766203321
Buira Jordi  
Barcelona : , : Editorial UOC, , 2012
Materiale a stampa
Lo trovi qui: Univ. Federico II
Opac: Controlla la disponibilità qui
El teletrabajo : entre el mito y la realidad / / Jordi Buira
El teletrabajo : entre el mito y la realidad / / Jordi Buira
Autore Buira Jordi
Pubbl/distr/stampa Barcelona : , : Editorial UOC, , 2012
Descrizione fisica 1 online resource (113 p.)
Disciplina 658.3123
Collana Tic.cerø series
Soggetto topico Telecommuting
Digital electronics
ISBN 84-9029-633-2
Formato Materiale a stampa
Livello bibliografico Monografia
Lingua di pubblicazione spa
Record Nr. UNINA-9910827432903321
Buira Jordi  
Barcelona : , : Editorial UOC, , 2012
Materiale a stampa
Lo trovi qui: Univ. Federico II
Opac: Controlla la disponibilità qui