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| Titolo: |
IEEE standard for a control and status registers (CSR) architecture for microcomputer buses
|
| Pubblicazione: | New York : , : IEEE, , 2002 |
| Descrizione fisica: | 1 online resource (67 pages) |
| Disciplina: | 004.16 |
| Soggetto topico: | Microcomputers - Buses - Standards |
| Computer architecture - Standards | |
| Sommario/riassunto: | A common bus architecture (which includes functional components - modules, nodes, and units - and their address space, transaction set, CSRs, and configuration information) suitable for both parallel and serial buses is provided in this standard. Bus bridges are enabled by the architecture, but their details are beyond its scope. Configuration information is self-administered by vendors and organizations based upon IEEE Registration Authority company_id. |
| Titolo autorizzato: | IEEE standard for a control and status registers (CSR) architecture for microcomputer buses ![]() |
| Formato: | Materiale a stampa |
| Livello bibliografico | Monografia |
| Lingua di pubblicazione: | Inglese |
| Record Nr.: | 9910147236603321 |
| Lo trovi qui: | Univ. Federico II |
| Opac: | Controlla la disponibilità qui |