01603nam 2200361 450 991014723660332120171005075426.0(CKB)1000000000035597(WaSeSS)IndRDA00078313(NjHacI)991000000000035597(EXLCZ)99100000000003559720171005d2002 || |engur|||||||||||txtrdacontentcrdamediacrrdacarrierIEEE standard for a control and status registers (CSR) architecture for microcomputer busesNew York :IEEE,2002.1 online resource (67 pages)0-7381-3100-8 A common bus architecture (which includes functional components - modules, nodes, and units - and their address space, transaction set, CSRs, and configuration information) suitable for both parallel and serial buses is provided in this standard. Bus bridges are enabled by the architecture, but their details are beyond its scope. Configuration information is self-administered by vendors and organizations based upon IEEE Registration Authority company_id.MicrocomputersBusesStandardsComputer architectureStandardsMicrocomputersBusesStandards.Computer architectureStandards.004.16WaSeSSWaSeSSDOCUMENT9910147236603321IEEE standard for a control and status registers (CSR) architecture for microcomputer buses2576485UNINA