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| Titolo: |
2000 IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems
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| Pubblicazione: | [Place of publication not identified], : IEEE Computer Society Press, 2000 |
| Descrizione fisica: | 1 online resource (438 pages) |
| Disciplina: | 004.2 |
| Soggetto topico: | Fault-tolerant computing |
| Note generali: | Bibliographic Level Mode of Issuance: Monograph |
| Sommario/riassunto: | This volume includes 45 papers presented at the October 2000 symposium, covering yield analysis, modeling, and enhancement; fault tolerance interconnections and systems; reconfiguration and repair; error coding; online testing; testing and BIST techniques; and fault injection techniques and environments. The authors, professionals and academics from 18 different companies, offer papers on specific topics such as quality-effective repair of multichip module systems, evaluations of burst error recovery for VF arithmetic coding, and test cost minimization for Hybrid BIST. A thorough subject index is lacking. Annotation copyrighted by Book News, Inc., Portland, OR. |
| Titolo autorizzato: | 2000 IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems ![]() |
| Formato: | Materiale a stampa |
| Livello bibliografico | Monografia |
| Lingua di pubblicazione: | Inglese |
| Record Nr.: | 9910872769203321 |
| Lo trovi qui: | Univ. Federico II |
| Opac: | Controlla la disponibilità qui |