LEADER 00431nas 2200157z- 450 001 9910895040803321 035 $a(CKB)3790000000133312 035 $a(EXLCZ)993790000000133312 100 $a20170515cuuuuuuuu -u- - 101 0 $aeng 200 00$aIndustrial Engineering 210 $cInstitute of Industrial Engineers (Hong Kong) 906 $aJOURNAL 912 $a9910895040803321 996 $aIndustrial engineering$9792940 997 $aUNINA LEADER 01908oam 2200397zu 450 001 9910872769203321 005 20241212214756.0 035 $a(CKB)111026746701452 035 $a(SSID)ssj0000454810 035 $a(PQKBManifestationID)12192133 035 $a(PQKBTitleCode)TC0000454810 035 $a(PQKBWorkID)10399128 035 $a(PQKB)10966764 035 $a(NjHacI)99111026746701452 035 $a(EXLCZ)99111026746701452 100 $a20160829d2000 uy 101 0 $aeng 135 $aur||||||||||| 181 $ctxt 182 $cc 183 $acr 200 10$a2000 IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems 210 31$a[Place of publication not identified]$cIEEE Computer Society Press$d2000 215 $a1 online resource (438 pages) 300 $aBibliographic Level Mode of Issuance: Monograph 311 08$a9780769507194 311 08$a0769507190 330 $aThis volume includes 45 papers presented at the October 2000 symposium, covering yield analysis, modeling, and enhancement; fault tolerance interconnections and systems; reconfiguration and repair; error coding; online testing; testing and BIST techniques; and fault injection techniques and environments. The authors, professionals and academics from 18 different companies, offer papers on specific topics such as quality-effective repair of multichip module systems, evaluations of burst error recovery for VF arithmetic coding, and test cost minimization for Hybrid BIST. A thorough subject index is lacking. Annotation copyrighted by Book News, Inc., Portland, OR. 606 $aFault-tolerant computing$vCongresses 615 0$aFault-tolerant computing 676 $a004.2 801 0$bPQKB 906 $aPROCEEDING 912 $a9910872769203321 996 $a2000 IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems$92397761 997 $aUNINA