Autore	Vendelin George D (George David), <1938->
Edizione	[2nd ed.]
Pubbl/distr/stampa	Hoboken, NJ, : Wiley, 2005
Descrizione fisica	1 online resource (1080 p.)
Disciplina	621.38132 621.381320285
Altri autori (Persone)	PavioAnthony M RohdeUlrich L
Soggetto topico	Microwave integrated circuits Microwave amplifiers Oscillators, Microwave Electronic circuit design
ISBN	1-280-27664-9 9786610276646 0-470-35664-2 0-471-71583-2 1-60119-378-5 0-471-71582-4
Formato	Materiale a stampa
Livello bibliografico	Monografia
Lingua di pubblicazione	eng
Nota di contenuto	MICROWAVE CIRCUIT DESIGN USING LINEAR AND NONLINEAR TECHNIQUES; CONTENTS; FOREWORD; PREFACE; 1 RF/MICROWAVE SYSTEMS; 1.1 Introduction; 1.2 Maxwell's Equations; 1.3 RF Wireless/Microwave/Millimeter-Wave Applications; 1.4 Frequency Bands, Modes, and Waveforms of Operation; 1.5 Analog and Digital Requirements; 1.6 Elementary Definitions; 1.7 Basic RF Transmitters and Receivers; 1.8 Modern CAD for Nonlinear Circuit Analysis; 1.9 Dynamic Load Line; References; Bibliography; Problems; 2 LUMPED AND DISTRIBUTED ELEMENTS; 2.1 Introduction; 2.2 Transition from RF to Microwave Circuits 2.3 Parasitic Effects on Lumped Elements2.4 Distributed Elements; 2.5 Hybrid Element: Helical Coil; References; Bibliography; Problems; 3 ACTIVE DEVICES; 3.1 Introduction; 3.2 Diodes; 3.2.1 Large-Signal Diode Model; 3.2.2 Mixer and Detector Diodes; 3.2.3 Parameter Trade-Offs; 3.2.4 Mixer Diodes; 3.2.5 pin Diodes; 3.2.6 Tuning Diodes; 3.2.7 Abrupt Junction; 3.2.8 Linearly Graded Junction; 3.2.9 Hyperabrupt Junction; 3.2.10 Silicon Versus Gallium Arsenide; 3.2.11 Q Factor or Diode Loss; 3.2.12 Diode Problems; 3.2.13 Diode-Tuned Resonant Circuits; Tuning Range; 3.3 Microwave Transistors 3.3.1 Transistor Classification3.3.2 Transistor Structure Types; 3.3.3 dc Model of BJT; 3.4 Heterojunction Bipolar Transistor; 3.5 Microwave FET; 3.5.1 MOSFETs; 3.5.2 Gallium Arsenide MESFETs; 3.5.3 HEMT; 3.5.4 Foundry Services; References; Bibliography; Problems; 4 TWO-PORT NETWORKS; 4.1 Introduction; 4.2 Two-Port Parameters; 4.3 S Parameters; 4.4 S Parameters from SPICE Analysis; 4.5 Stability; 4.6 Power Gains, Voltage Gain, and Current Gain; 4.6.1 Power Gain; 4.6.2 Voltage Gain and Current Gain; 4.6.3 Current Gain; 4.7 Three-Ports; 4.8 Derivation of Transducer Power Gain 4.9 Differential S Parameters4.9.1 Measurements; 4.9.2 Example; 4.10 Twisted-Wire Pair Lines; 4.11 Low-Noise and High-Power Amplifier Design; 4.12 Low-Noise Amplifier Design Examples; References; Bibliography; Problems; 5 IMPEDANCE MATCHING; 5.1 Introduction; 5.2 Smith Charts and Matching; 5.3 Impedance Matching Networks; 5.4 Single-Element Matching; 5.5 Two-Element Matching; 5.6 Matching Networks Using Lumped Elements; 5.7 Matching Networks Using Distributed Elements; 5.7.1 Twisted-Wire Pair Transformers; 5.7.2 Transmission Line Transformers; 5.7.3 Tapered Transmission Lines 5.8 Bandwidth Constraints for Matching NetworksReferences; Bibliography; Problems; 6 MICROWAVE FILTERS; 6.1 Introduction; 6.2 Low-Pass Prototype Filter Design; 6.2.1 Butterworth Response; 6.2.2 Chebyshev Response; 6.3 Transformations; 6.3.1 Low-Pass Filters: Frequency and Impedance Scaling; 6.3.2 High-Pass Filters; 6.3.3 Bandpass Filters; 6.3.4 Narrow-Band Bandpass Filters; 6.3.5 Band-Stop Filters; 6.4 Transmission Line Filters; 6.4.1 Semilumped Low-Pass Filters; 6.4.2 Richards Transformation; 6.5 Exact Designs and CAD Tools; 6.6 Real-Life Filters; 6.6.1 Lumped Elements 6.6.2 Transmission Line Elements
Record Nr.	UNINA-9910840901203321

Autore	Schiek Burkhard <1938->
Pubbl/distr/stampa	Hoboken, N.J., : Wiley-Interscience, c2006
Descrizione fisica	1 online resource (424 p.)
Disciplina	621.38224 621.38412
Altri autori (Persone)	RolfesIlona <1973-> SiwerisHeinz Jürgen <1953->
Soggetto topico	Electronic circuits - Noise Electronic circuit design Electromagnetic noise
ISBN	1-280-51728-X 9786610517282 0-470-03894-2 0-470-03893-4
Formato	Materiale a stampa
Livello bibliografico	Monografia
Lingua di pubblicazione	eng
Nota di contenuto	Noise in High-Frequency Circuits and Oscillators; Contents; Preface; 1 Mathematical and System-oriented Fundamentals; 1.1 Introduction; 1.1.1 Technical relevance of noise; 1.1.2 Physical origins of noise; 1.1.3 General characteristics of noise signals; 1.2 Mathematical basics for the description of noise signals; 1.2.1 Stochastic process and probability density; 1.2.2 Compound probability density and conditional probability; 1.2.3 Mean value and moments; 1.2.4 Auto- and cross-correlation function; 1.2.5 Description of noise signals in the frequency domain 1.2.6 Characteristic function and the central limit theorem1.2.7 Interrelationship between moments of different orders; 1.3 Transfer of noise signals by linear networks; 1.3.1 Impulse response and transfer function; 1.3.2 Transformation of the autocorrelation function and the power spectrum; 1.3.3 Correlation between input and output noise signals; 1.3.4 Superposition of partly correlated noise signals; 2 Noise of Linear One- and Two-Ports; 2.1 Noise of one-ports; 2.1.1 Thermal noise of resistors; 2.1.2 Networks of resistors of identical temperature; 2.1.3 The RC-circuit 2.1.4 Thermal noise of complex impedances2.1.5 Available noise power and equivalent noise temperature; 2.1.6 Networks with inhomogeneous temperature distribution; 2.1.7 Dissipation theorem; 2.2 Noise of two-ports; 2.2.1 Description of the internal noise by current and voltage sources; 2.2.2 Noise equivalent sources for two-ports at homogeneous temperature; 2.2.3 Noise description by waves; 2.2.4 Noise of circulators and isolators; 2.2.5 Noise waves for thermally noisy two-ports at a homogeneous temperature; 2.2.6 Equivalent noise waves for linear amplifiers 2.3 Noise figure of linear two-ports2.3.1 Definition of the noise figure; 2.3.2 Calculation of the noise figure based on equivalent circuits; 2.3.3 Noise figure of two-ports with thermal noise; 2.3.4 Noise figure of cascaded two-ports; 2.3.5 Noise matching; 3 Measurement of Noise Parameters; 3.1 Measurement of noise power; 3.1.1 Power measurement on the basis of a thermocouple; 3.1.2 Thermistor bridge; 3.1.3 Power measurements with Schottky-diodes; 3.1.4 Power measurements with field effect transistors; 3.1.5 Power measurements with analog multipliers 3.1.6 Power measurements with a digital detector3.1.7 Power measurements with a spectrum analyzer; 3.1.8 Errors in noise power measurements; 3.2 Measurement of the correlation function and the cross-spectrum; 3.3 Illustrative interpretation of the correlation; 3.4 Measurement of the equivalent noise temperature of a one-port; 3.5 Special radiometer circuits; 3.5.1 Dicke-Radiometer; 3.5.2 Problems with mismatched devices under test; 3.5.3 Compensation radiometers; 3.5.4 Correlation radiometer; 3.5.5 Fundamental errors of noise power or noise temperature measurements 3.5.6 Principle errors of a correlation radiometer or correlator
Record Nr.	UNINA-9910143566103321

Pubbl/distr/stampa	Cambridge : , : Cambridge University Press, , 2012
Descrizione fisica	1 online resource (xiv, 352 pages) : digital, PDF file(s)
Disciplina	621.3815/28
Collana	The Cambridge RF and microwave engineering series
Soggetto topico	Transistors - Mathematical models Electronic circuit design
ISBN	1-107-22467-5 1-283-34235-9 1-139-16026-5 9786613342355 1-139-15465-6 1-139-16126-1 1-139-15569-5 1-139-15744-2 1-139-15921-6 1-139-01496-X
Formato	Materiale a stampa
Livello bibliografico	Monografia
Lingua di pubblicazione	eng
Nota di contenuto	Cover; Nonlinear Transistor Model Parameter Extraction Techniques; The Cambridge RF and Microwave Engineering Series; Title; Copyright; Contents; List of contributors; Preface; 1 Introduction; 1.1 Model extraction challenges; 1.1.1 Accuracy; 1.1.1.1 Circuit application; 1.1.1.2 Measurement uncertainty; 1.1.1.3 Process variations; 1.1.2 Numerical convergence; 1.1.2.1 Breakdown; 1.1.2.2 Self-heating; 1.1.3 Choice of the modeling transistor; 1.2 Model extraction workflow; References; 2 DC and thermal modeling: III--V FETs and HBTs; 2.1 Introduction; 2.2 Basic DC characteristics 2.3 FET DC parameters and modeling2.4 HBT DC parameters and modeling; 2.5 Process control monitoring; 2.6 Thermal modeling overview; 2.7 Physics-based thermal scaling model for HBTs; 2.8 Measurement-based thermal model for FETs; 2.9 Transistor reliability evaluation; Acknowledgments; References; 3 Extrinsic parameter and parasitic elements in III--V HBT and HEMT modeling; 3.1 Introduction; 3.2 Test structures with calibration and de-embedding; 3.3 Methods for extrinsic parameter extraction used in HBTs; 3.3.1 Equivalent circuit topology 3.3.2 Physical description of contact resistances and overlap capacitances3.3.3 Extrinsic resistance and inductance extraction; 3.4 Methods for extrinsic parameter extraction used in HEMTs; 3.4.1 Cold FET technique; 3.4.2 Unbiased technique; 3.4.3 GaN HEMTs exceptions; 3.5 Scaling for multicell arrays; References; 4 Uncertainties in small-signal equivalent circuit modeling; 4.1 Introduction; 4.1.1 Sources of uncertainty in modeling; 4.1.2 Measurement uncertainty; 4.2 Uncertainties in direct extraction methods; 4.2.1 Simple direct extraction example; 4.2.1.1 Example circuit and measurements 4.2.1.2 Uncertainty analysis4.2.1.3 Parameter estimation; 4.2.1.4 Parameter correlations; 4.2.2 Results using transistor measurements; 4.2.2.1 Uncertainty contributions; 4.2.2.2 Intrinsic model parameter sensitivities; 4.2.2.3 Intrinsic model parameter uncertainties; 4.2.2.4 Multibias extraction results; 4.3 Optimizer-based estimation techniques; 4.3.1 Maximum likelihood estimation; 4.3.1.1 Simple example; 4.3.1.2 MLE uncertainty; 4.3.2 MLE of small-signal transistor model parameters; 4.3.2.1 Parasitic parameter estimation; 4.3.2.2 Application to parasitic FET model extraction 4.3.2.3 MLE of intrinsic model parameters4.3.2.4 Application to intrinsic FET model extraction; 4.3.3 Comparison between MLE and the direct extraction method; 4.3.4 Application of MLE in RF-CMOS de-embedding; 4.3.4.1 Method description; 4.3.4.2 Example using 130 nm RF-CMOS measurements; 4.3.4.3 Comparison between different de-embedding methods; 4.3.5 Discussion; 4.4 Complexity versus uncertainty in equivalent circuit modeling; 4.4.1 Finding an optimum model topology; 4.4.2 An illustrative example; 4.4.2.1 MSE estimation procedure; 4.4.2.2 Results; 4.5 Summary and discussion; References 5 The large-signal model: theoretical foundations, practical considerations, and recent trends
Record Nr.	UNINA-9910457508703321

Pubbl/distr/stampa	[Place of publication not identified], : IEEE Computer Society Press, 2000
Descrizione fisica	1 online resource (x, 220 pages) : illustrations
Disciplina	621.3815
Soggetto topico	Electronic circuit design Error-correcting codes (Information theory)
Formato	Materiale a stampa
Livello bibliografico	Monografia
Lingua di pubblicazione	eng
Nota di contenuto	Message from the Conference Chairs -- Organizing Committee -- Program Committee -- Keynote -- Dependability Issues in the WWW -- Jacob Abraham -- Session 1: Fault Tolerance -- T.M. Mak -- Micro-Checkpointing: Checkpointing for Multithreaded Applications -- Evaluating the Effectiveness of a Software Fault-Tolerance Technique on RISC- and CISC-Based Architectures -- Session 2: Fault Tolerance and On-Line Testing for Reconfigurable Systems -- Relation between Fault Tolerance and Reconfiguration in Cellular Systems -- Improving On-Line BIST-Based Diagnosis for Roving STARs -- Self-Testing of FPGA Delay Faults in the System Environment -- Session 3: Reliability Issues in Nanometer Technologies and Radiation Effects -- Cecilia Metra -- A Crosstalk Sensor Implementation for Measuring Interferences in Digital CMOS VLSI Circuits -- An Overview of the Applications of a Pulsed Laser System for SEU Testing -- Session 4: Fault Injection -- Regis Leveugle -- New Techniques for Accelerating Fault Injection in VHDL Descriptions -- Estimating Circuit Fault-Tolerance by Means of Transient-Fault Injection in VHDL -- A Study of the Effects of Transient Fault Injection into the VHDL Model of a Fault-Tolerant Microcomputer System -- Transient Bitflip Injection in Microprocessor Embedded Applications -- Session 5: On-Line Current Monitoring -- Andre Ivanov -- On-Line Current Testing for a Microprocessor Based Application with an Off-Chip Sensor -- I-V Fast IDDQ Current Sensor for On-Line Mixed-Signal/Analog Test -- A Compact Built-In Current Sensor for IDDQ Testing -- Th. Haniotakis -- An Improved CMOS BICS for On-Line Testing -- Session 6: Concurrent Checking -- Bernd Straube -- Fraunhofer IIS/EAS Dresden -- Concurrent Scan Monitoring and Multi-Pattern Search -- Analytical Redundancy Based Approach for Concurrent Fault Detection in Linear Digital Systems -- Decomposition Approach to Designing FPGA-Based Self-Checking Control Units -- Session 7: Built-In Self Testing -- Christian Dufaza -- Comparison between Random and Pseudo-Random Generation for BIST of Delay, Stuck-At and Bridging Faults -- On Using Deterministic Test Sets in BIST -- Power Reduction in Test-Per-Scan BIST -- Panel Session: Defect Driven Testing: IDDX and What Else? Co-organized with IEEE D&T of Computers -- Joan Figueras -- Yervant Zorian -- LogicVision -- Eberhard Boehl -- Robert Bosch GmbH -- Hans Manhaeve -- Michael Nicolaidis -- Jaume Segura -- Chuck Hawkins -- Session 8: Self Checking Circuits and Analog Approaches -- Parag K. Lala -- U. Arkansas -- New Self-Checking Circuits by Use of Berger-Codes -- A New Method for Concurrent Checking by Use of a 1-out-of-4 Code -- Self-Checking FSM Design with Observing Only FSM Outputs -- Faster Time-to-Market, Lower Cost of Development and Test for Standard Analog IC -- Session 9: Coding Theory and Applications -- Stanislaw Piestrak -- Theoretical Performance Bounds of a Probability of Bit Error Estimator Used in Digital Links Employing Binary Block Codes -- A Stamping Technique to Increase the Error Correction Capacity of the (127,k,d) RS Code -- Low Cost Concurrent Error Detection Based on Modulo Weight-Based Codes -- Session 10: Fault Tolerance and On-Line Testing in Railway and Industrial Control -- A Very Flexible DSP-Based Controller for On-Line Test and Control of Industrial Processes -- On Realization of Fault-Tolerant Fuzzy Controllers -- ISIS: A Fail-Safe Interface Realized in Smart Power Technology -- Session 11: On-Line Testing and Self Repair -- High-Level Synthesis Methodology for On-Line Testability Optimization -- Improving Fault Coverage in System Tests -- A Family of Self-Repair SRAM Cores -- Author Index.
Record Nr.	UNISA-996218749703316

Autore	Ivanov V. V (Vadim Vasilʹevich)
Edizione	[1st ed. 2004.]
Pubbl/distr/stampa	Boston, : Kluwer Academic, c2004
Descrizione fisica	1 online resource (XIV, 194 p.)
Disciplina	621.39/5
Altri autori (Persone)	FilanovskyIgor M
Collana	Kluwer international series in engineering and computer science. Analog circuits and signal processing
Soggetto topico	Operational amplifiers - Design and construction Linear integrated circuits - Design and construction Electronic circuit design
Soggetto genere / forma	Electronic books.
Formato	Materiale a stampa
Livello bibliografico	Monografia
Lingua di pubblicazione	eng
Nota di contenuto	Structural Design Methodology -- Biasing -- OpAmp Gain Structure, Frequency Compensation and Stability -- Input Stage -- Intermediate Amplification Stages -- Class AB Output Stage -- Special Functions -- From Structure to Circuit.
Record Nr.	UNINA-9910449768003321