Vai al contenuto principale della pagina

FPGA-BASED Hardware Accelerators / / by Iouliia Skliarova, Valery Sklyarov



(Visualizza in formato marc)    (Visualizza in BIBFRAME)

Autore: Skliarova Iouliia Visualizza persona
Titolo: FPGA-BASED Hardware Accelerators / / by Iouliia Skliarova, Valery Sklyarov Visualizza cluster
Pubblicazione: Cham : , : Springer International Publishing : , : Imprint : Springer, , 2019
Edizione: 1st ed. 2019.
Descrizione fisica: 1 online resource (257 pages) : illustrations
Disciplina: 621.395
Soggetto topico: Electronic circuits
Computational intelligence
Circuits and Systems
Computational Intelligence
Persona (resp. second.): SklyarovValery
Nota di contenuto: Reconfigurable devices and design tools -- Architectures of FPGA-based hardware accelerators and design techniques -- Hardware accelerators for data search -- Hardware accelerators for data sort -- FPGA-based hardware accelerators for selected computational problems -- Hardware/software co-design.
Sommario/riassunto: This book suggests and describes a number of fast parallel circuits for data/vector processing using FPGA-based hardware accelerators. Three primary areas are covered: searching, sorting, and counting in combinational and iterative networks. These include the application of traditional structures that rely on comparators/swappers as well as alternative networks with a variety of core elements such as adders, logical gates, and look-up tables. The iterative technique discussed in the book enables the sequential reuse of relatively large combinational blocks that execute many parallel operations with small propagation delays. For each type of network discussed, the main focus is on the step-by-step development of the architectures proposed from initial concepts to synthesizable hardware description language specifications. Each type of network is taken through several stages, including modeling the desired functionality in software, the retrieval and automatic conversion of key functions, leading to specifications for optimized hardware modules. The resulting specifications are then synthesized, implemented, and tested in FPGAs using commercial design environments and prototyping boards. The methods proposed can be used in a range of data processing applications, including traditional sorting, the extraction of maximum and minimum subsets from large data sets, communication-time data processing, finding frequently occurring items in a set, and Hamming weight/distance counters/comparators. The book is intended to be a valuable support material for university and industrial engineering courses that involve FPGA-based circuit and system design.
Titolo autorizzato: FPGA-BASED Hardware Accelerators  Visualizza cluster
ISBN: 3-030-20721-8
Formato: Materiale a stampa
Livello bibliografico Monografia
Lingua di pubblicazione: Inglese
Record Nr.: 9910337625503321
Lo trovi qui: Univ. Federico II
Opac: Controlla la disponibilità qui
Serie: Lecture Notes in Electrical Engineering, . 1876-1100 ; ; 566