Fundamentals of tunnel field-effect transistors / / Sneh Saurabh, Indraprastha Institute of Information Technology, Delhi, India, Mamidala Jagadesh Kumar, Indian Institute of Technology, Delhi, India |
Autore | Saurabh Sneh |
Pubbl/distr/stampa | Boca Raton, Fla. : , : CRC Press, Taylor & Francis Group, , [2017] |
Descrizione fisica | 1 online resource (306 pages) : illustrations |
Disciplina | 621.3815284 |
Soggetto topico |
Tunnel field-effect transistors
Integrated circuits - Design and construction Nanostructured materials Low voltage integrated circuits |
ISBN |
1-315-36735-1
1-315-35026-2 1-4987-6716-8 |
Formato | Materiale a stampa |
Livello bibliografico | Monografia |
Lingua di pubblicazione | eng |
Nota di contenuto | 1. CMOS scaling -- 2. Quantum tunneling -- 3. Basics of tunnel field-effect transistor -- 4. Boosting ON-current in tunnel field-effect transistor -- 5. III-V tunnel field effect transistor -- 6. Carbon-based tunnel field-effect transistor -- 7. Nanowire tunnel field-effect transistor -- 8. Models for tunnel field-effect transistor -- 9. Applications of tunnel field-effect transistor -- 10. Future perspective. |
Record Nr. | UNINA-9910148742103321 |
Saurabh Sneh | ||
Boca Raton, Fla. : , : CRC Press, Taylor & Francis Group, , [2017] | ||
Materiale a stampa | ||
Lo trovi qui: Univ. Federico II | ||
|
Tunnel field-effect transistors (TFET) : modelling and simulations / / Jagadesh Kumar Mamidala, Rajat Vishnoi, Pratyush Pandey |
Autore | Kumar Mamidala Jagadesh |
Edizione | [1] |
Pubbl/distr/stampa | Hoboken : , : Wiley, , 2017 |
Descrizione fisica | 1 online resource (208 p.) |
Disciplina | 621.3815/284 |
Soggetto topico |
Tunnel field-effect transistors
Integrated circuits - Design and construction Nanostructured materials Low voltage integrated circuits |
ISBN |
1-119-24630-X
1-119-24628-8 1-119-24631-8 |
Classificazione | TEC008090 |
Formato | Materiale a stampa |
Livello bibliografico | Monografia |
Lingua di pubblicazione | eng |
Nota di contenuto |
Title Page ; Copyright; Contents; Preface; Chapter 1 Quantum mechanics ; 1.1 Introduction to quantum mechanics; 1.1.1 The double slit experiment; 1.1.2 Basic concepts of quantum mechanics; 1.1.3 Schrodingerś equation; 1.2 Basic quantum physics problems; 1.2.1 Free particle; 1.2.2 Particle in a one-dimensional box; Reference; Chapter 2 Basics of tunnelling ; 2.1 Understanding tunnelling; 2.1.1 Qualitative description; 2.1.2 Rectangular barrier; 2.2 WKB approximation; 2.3 Landauerś tunnelling formula; 2.4 Advanced tunnelling models; 2.4.1 Non-local tunnelling models
2.4.2 Local tunnelling modelsReferences; Chapter 3 The tunnel FET ; 3.1 Device structure; 3.1.1 The need for tunnel FETs; 3.1.2 Basic TFET structure; 3.2 Qualitative behaviour; 3.2.1 Band diagram; 3.2.2 Device characteristics; 3.2.3 Performance dependence on device parameters; 3.3 Types of TFETs; 3.3.1 Planar TFETs; 3.3.2 Three-dimensional TFETs; 3.3.3 Carbon nanotube and graphene TFETs; 3.3.4 Point versus line tunnelling in TFETs; 3.4 Other steep subthreshold transistors; References; Chapter 4 Drain current modelling of tunnel FET: the task and its challenges ; 4.1 Introduction 4.2 TFETmodelling approach4.2.1 Finding the value of ψC; 4.2.2 Modelling the surface potential in the source-channel junction; 4.2.3 Finding the tunnelling current; 4.3 MOSFETmodelling approach; References; Chapter 5 Modelling the surface potential in TFETs ; 5.1 The pseudo-2D method; 5.1.1 Parabolic approximation of potential distribution; 5.1.2 Solving the 2D Poisson equation using parabolic approximation; 5.1.3 Solution for the surface potential; 5.2 The variational approach; 5.2.1 The variational form of Poissonś equation 5.2.2 Solution of the variational form of Poissonś equation in a TFET5.3 The infinite series solution; 5.3.1 Solving the 2D Poisson equation using separation of variables; 5.3.2 Solution of the homogeneous boundary value problem; 5.3.3 The solution to the 2D Poisson equation in a TFET; 5.3.4 The infinite series solution to Poissonś equation in a TFET; 5.4 Extension of surface potential models to differentTFETstructures; 5.4.1 DG TFET; 5.4.2 GAA TFET; 5.4.3 Dual material gate TFET; 5.5 The effect of localised charges on the surface potential; 5.6 Surface potential in the depletion regions 5.7 Use of smoothing functions in the surface potential modelsReferences; Chapter 6 Modelling the drain current ; 6.1 Non-local methods; 6.1.1 Landauerś tunnelling formula in TFETs; 6.1.2 WKB approximation in TFETs; 6.1.3 Obtaining the drain current; 6.2 Local methods; 6.2.1 Numerical integration; 6.2.2 Shortest tunnelling length; 6.2.3 Constant polynomial term assumption; 6.2.4 Tangent line approximation; 6.3 Threshold voltage models; 6.3.1 Constant current method; 6.3.2 Constant tunnelling length; 6.3.3 Transconductance change (TC) method; References Chapter 7 Device simulation using ATLAS |
Record Nr. | UNINA-9910135029103321 |
Kumar Mamidala Jagadesh | ||
Hoboken : , : Wiley, , 2017 | ||
Materiale a stampa | ||
Lo trovi qui: Univ. Federico II | ||
|
Tunnel field-effect transistors (TFET) : modelling and simulations / / Jagadesh Kumar Mamidala, Rajat Vishnoi, Pratyush Pandey |
Autore | Kumar Mamidala Jagadesh |
Edizione | [1] |
Pubbl/distr/stampa | Hoboken : , : Wiley, , 2017 |
Descrizione fisica | 1 online resource (208 p.) |
Disciplina | 621.3815/284 |
Soggetto topico |
Tunnel field-effect transistors
Integrated circuits - Design and construction Nanostructured materials Low voltage integrated circuits |
ISBN |
1-119-24630-X
1-119-24628-8 1-119-24631-8 |
Classificazione | TEC008090 |
Formato | Materiale a stampa |
Livello bibliografico | Monografia |
Lingua di pubblicazione | eng |
Nota di contenuto |
Title Page ; Copyright; Contents; Preface; Chapter 1 Quantum mechanics ; 1.1 Introduction to quantum mechanics; 1.1.1 The double slit experiment; 1.1.2 Basic concepts of quantum mechanics; 1.1.3 Schrodingerś equation; 1.2 Basic quantum physics problems; 1.2.1 Free particle; 1.2.2 Particle in a one-dimensional box; Reference; Chapter 2 Basics of tunnelling ; 2.1 Understanding tunnelling; 2.1.1 Qualitative description; 2.1.2 Rectangular barrier; 2.2 WKB approximation; 2.3 Landauerś tunnelling formula; 2.4 Advanced tunnelling models; 2.4.1 Non-local tunnelling models
2.4.2 Local tunnelling modelsReferences; Chapter 3 The tunnel FET ; 3.1 Device structure; 3.1.1 The need for tunnel FETs; 3.1.2 Basic TFET structure; 3.2 Qualitative behaviour; 3.2.1 Band diagram; 3.2.2 Device characteristics; 3.2.3 Performance dependence on device parameters; 3.3 Types of TFETs; 3.3.1 Planar TFETs; 3.3.2 Three-dimensional TFETs; 3.3.3 Carbon nanotube and graphene TFETs; 3.3.4 Point versus line tunnelling in TFETs; 3.4 Other steep subthreshold transistors; References; Chapter 4 Drain current modelling of tunnel FET: the task and its challenges ; 4.1 Introduction 4.2 TFETmodelling approach4.2.1 Finding the value of ψC; 4.2.2 Modelling the surface potential in the source-channel junction; 4.2.3 Finding the tunnelling current; 4.3 MOSFETmodelling approach; References; Chapter 5 Modelling the surface potential in TFETs ; 5.1 The pseudo-2D method; 5.1.1 Parabolic approximation of potential distribution; 5.1.2 Solving the 2D Poisson equation using parabolic approximation; 5.1.3 Solution for the surface potential; 5.2 The variational approach; 5.2.1 The variational form of Poissonś equation 5.2.2 Solution of the variational form of Poissonś equation in a TFET5.3 The infinite series solution; 5.3.1 Solving the 2D Poisson equation using separation of variables; 5.3.2 Solution of the homogeneous boundary value problem; 5.3.3 The solution to the 2D Poisson equation in a TFET; 5.3.4 The infinite series solution to Poissonś equation in a TFET; 5.4 Extension of surface potential models to differentTFETstructures; 5.4.1 DG TFET; 5.4.2 GAA TFET; 5.4.3 Dual material gate TFET; 5.5 The effect of localised charges on the surface potential; 5.6 Surface potential in the depletion regions 5.7 Use of smoothing functions in the surface potential modelsReferences; Chapter 6 Modelling the drain current ; 6.1 Non-local methods; 6.1.1 Landauerś tunnelling formula in TFETs; 6.1.2 WKB approximation in TFETs; 6.1.3 Obtaining the drain current; 6.2 Local methods; 6.2.1 Numerical integration; 6.2.2 Shortest tunnelling length; 6.2.3 Constant polynomial term assumption; 6.2.4 Tangent line approximation; 6.3 Threshold voltage models; 6.3.1 Constant current method; 6.3.2 Constant tunnelling length; 6.3.3 Transconductance change (TC) method; References Chapter 7 Device simulation using ATLAS |
Record Nr. | UNINA-9910817038703321 |
Kumar Mamidala Jagadesh | ||
Hoboken : , : Wiley, , 2017 | ||
Materiale a stampa | ||
Lo trovi qui: Univ. Federico II | ||
|