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A conformal-mapping treatment of the effect of a semi-infinite gate on a two-dimensional electron gas [[electronic resource] /] / Frank J. Crowne
| A conformal-mapping treatment of the effect of a semi-infinite gate on a two-dimensional electron gas [[electronic resource] /] / Frank J. Crowne |
| Autore | Crowne Frank |
| Pubbl/distr/stampa | Adelphi, MD : , : Army Research Laboratory, , [2000] |
| Descrizione fisica | 1 online resource (iii, 15 pages) : illustrations (some color) |
| Collana | ARL-TR |
| Soggetto topico |
Electron mobility
Transistors - Mathematical models |
| Formato | Materiale a stampa  |
| Livello bibliografico | Monografia |
| Lingua di pubblicazione | eng |
| Record Nr. | UNINA-9910699643603321 |
Crowne Frank
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| Adelphi, MD : , : Army Research Laboratory, , [2000] | ||
| Materiale a stampa | ||
| Lo trovi qui: Univ. Federico II | ||
| ||
Nonlinear transistor model parameter extraction techniques / / edited by Matthias Rudolph, Christian Fager, David E. Root [[electronic resource]]
| Nonlinear transistor model parameter extraction techniques / / edited by Matthias Rudolph, Christian Fager, David E. Root [[electronic resource]] |
| Pubbl/distr/stampa | Cambridge : , : Cambridge University Press, , 2012 |
| Descrizione fisica | 1 online resource (xiv, 352 pages) : digital, PDF file(s) |
| Disciplina | 621.3815/28 |
| Collana | The Cambridge RF and microwave engineering series |
| Soggetto topico |
Transistors - Mathematical models
Electronic circuit design |
| ISBN |
1-107-22467-5
1-283-34235-9 1-139-16026-5 9786613342355 1-139-15465-6 1-139-16126-1 1-139-15569-5 1-139-15744-2 1-139-15921-6 1-139-01496-X |
| Formato | Materiale a stampa |
| Livello bibliografico | Monografia |
| Lingua di pubblicazione | eng |
| Nota di contenuto |
Cover; Nonlinear Transistor Model Parameter Extraction Techniques; The Cambridge RF and Microwave Engineering Series; Title; Copyright; Contents; List of contributors; Preface; 1 Introduction; 1.1 Model extraction challenges; 1.1.1 Accuracy; 1.1.1.1 Circuit application; 1.1.1.2 Measurement uncertainty; 1.1.1.3 Process variations; 1.1.2 Numerical convergence; 1.1.2.1 Breakdown; 1.1.2.2 Self-heating; 1.1.3 Choice of the modeling transistor; 1.2 Model extraction workflow; References; 2 DC and thermal modeling: III--V FETs and HBTs; 2.1 Introduction; 2.2 Basic DC characteristics
2.3 FET DC parameters and modeling2.4 HBT DC parameters and modeling; 2.5 Process control monitoring; 2.6 Thermal modeling overview; 2.7 Physics-based thermal scaling model for HBTs; 2.8 Measurement-based thermal model for FETs; 2.9 Transistor reliability evaluation; Acknowledgments; References; 3 Extrinsic parameter and parasitic elements in III--V HBT and HEMT modeling; 3.1 Introduction; 3.2 Test structures with calibration and de-embedding; 3.3 Methods for extrinsic parameter extraction used in HBTs; 3.3.1 Equivalent circuit topology 3.3.2 Physical description of contact resistances and overlap capacitances3.3.3 Extrinsic resistance and inductance extraction; 3.4 Methods for extrinsic parameter extraction used in HEMTs; 3.4.1 Cold FET technique; 3.4.2 Unbiased technique; 3.4.3 GaN HEMTs exceptions; 3.5 Scaling for multicell arrays; References; 4 Uncertainties in small-signal equivalent circuit modeling; 4.1 Introduction; 4.1.1 Sources of uncertainty in modeling; 4.1.2 Measurement uncertainty; 4.2 Uncertainties in direct extraction methods; 4.2.1 Simple direct extraction example; 4.2.1.1 Example circuit and measurements 4.2.1.2 Uncertainty analysis4.2.1.3 Parameter estimation; 4.2.1.4 Parameter correlations; 4.2.2 Results using transistor measurements; 4.2.2.1 Uncertainty contributions; 4.2.2.2 Intrinsic model parameter sensitivities; 4.2.2.3 Intrinsic model parameter uncertainties; 4.2.2.4 Multibias extraction results; 4.3 Optimizer-based estimation techniques; 4.3.1 Maximum likelihood estimation; 4.3.1.1 Simple example; 4.3.1.2 MLE uncertainty; 4.3.2 MLE of small-signal transistor model parameters; 4.3.2.1 Parasitic parameter estimation; 4.3.2.2 Application to parasitic FET model extraction 4.3.2.3 MLE of intrinsic model parameters4.3.2.4 Application to intrinsic FET model extraction; 4.3.3 Comparison between MLE and the direct extraction method; 4.3.4 Application of MLE in RF-CMOS de-embedding; 4.3.4.1 Method description; 4.3.4.2 Example using 130 nm RF-CMOS measurements; 4.3.4.3 Comparison between different de-embedding methods; 4.3.5 Discussion; 4.4 Complexity versus uncertainty in equivalent circuit modeling; 4.4.1 Finding an optimum model topology; 4.4.2 An illustrative example; 4.4.2.1 MSE estimation procedure; 4.4.2.2 Results; 4.5 Summary and discussion; References 5 The large-signal model: theoretical foundations, practical considerations, and recent trends |
| Record Nr. | UNINA-9910457508703321 |
| Cambridge : , : Cambridge University Press, , 2012 | ||
| Materiale a stampa | ||
| Lo trovi qui: Univ. Federico II | ||
| ||
Nonlinear transistor model parameter extraction techniques / / edited by Matthias Rudolph, Christian Fager, David E. Root [[electronic resource]]
| Nonlinear transistor model parameter extraction techniques / / edited by Matthias Rudolph, Christian Fager, David E. Root [[electronic resource]] |
| Pubbl/distr/stampa | Cambridge : , : Cambridge University Press, , 2012 |
| Descrizione fisica | 1 online resource (xiv, 352 pages) : digital, PDF file(s) |
| Disciplina | 621.3815/28 |
| Collana | The Cambridge RF and microwave engineering series |
| Soggetto topico |
Transistors - Mathematical models
Electronic circuit design |
| ISBN |
1-107-22467-5
1-283-34235-9 1-139-16026-5 9786613342355 1-139-15465-6 1-139-16126-1 1-139-15569-5 1-139-15744-2 1-139-15921-6 1-139-01496-X |
| Formato | Materiale a stampa |
| Livello bibliografico | Monografia |
| Lingua di pubblicazione | eng |
| Nota di contenuto |
Cover; Nonlinear Transistor Model Parameter Extraction Techniques; The Cambridge RF and Microwave Engineering Series; Title; Copyright; Contents; List of contributors; Preface; 1 Introduction; 1.1 Model extraction challenges; 1.1.1 Accuracy; 1.1.1.1 Circuit application; 1.1.1.2 Measurement uncertainty; 1.1.1.3 Process variations; 1.1.2 Numerical convergence; 1.1.2.1 Breakdown; 1.1.2.2 Self-heating; 1.1.3 Choice of the modeling transistor; 1.2 Model extraction workflow; References; 2 DC and thermal modeling: III--V FETs and HBTs; 2.1 Introduction; 2.2 Basic DC characteristics
2.3 FET DC parameters and modeling2.4 HBT DC parameters and modeling; 2.5 Process control monitoring; 2.6 Thermal modeling overview; 2.7 Physics-based thermal scaling model for HBTs; 2.8 Measurement-based thermal model for FETs; 2.9 Transistor reliability evaluation; Acknowledgments; References; 3 Extrinsic parameter and parasitic elements in III--V HBT and HEMT modeling; 3.1 Introduction; 3.2 Test structures with calibration and de-embedding; 3.3 Methods for extrinsic parameter extraction used in HBTs; 3.3.1 Equivalent circuit topology 3.3.2 Physical description of contact resistances and overlap capacitances3.3.3 Extrinsic resistance and inductance extraction; 3.4 Methods for extrinsic parameter extraction used in HEMTs; 3.4.1 Cold FET technique; 3.4.2 Unbiased technique; 3.4.3 GaN HEMTs exceptions; 3.5 Scaling for multicell arrays; References; 4 Uncertainties in small-signal equivalent circuit modeling; 4.1 Introduction; 4.1.1 Sources of uncertainty in modeling; 4.1.2 Measurement uncertainty; 4.2 Uncertainties in direct extraction methods; 4.2.1 Simple direct extraction example; 4.2.1.1 Example circuit and measurements 4.2.1.2 Uncertainty analysis4.2.1.3 Parameter estimation; 4.2.1.4 Parameter correlations; 4.2.2 Results using transistor measurements; 4.2.2.1 Uncertainty contributions; 4.2.2.2 Intrinsic model parameter sensitivities; 4.2.2.3 Intrinsic model parameter uncertainties; 4.2.2.4 Multibias extraction results; 4.3 Optimizer-based estimation techniques; 4.3.1 Maximum likelihood estimation; 4.3.1.1 Simple example; 4.3.1.2 MLE uncertainty; 4.3.2 MLE of small-signal transistor model parameters; 4.3.2.1 Parasitic parameter estimation; 4.3.2.2 Application to parasitic FET model extraction 4.3.2.3 MLE of intrinsic model parameters4.3.2.4 Application to intrinsic FET model extraction; 4.3.3 Comparison between MLE and the direct extraction method; 4.3.4 Application of MLE in RF-CMOS de-embedding; 4.3.4.1 Method description; 4.3.4.2 Example using 130 nm RF-CMOS measurements; 4.3.4.3 Comparison between different de-embedding methods; 4.3.5 Discussion; 4.4 Complexity versus uncertainty in equivalent circuit modeling; 4.4.1 Finding an optimum model topology; 4.4.2 An illustrative example; 4.4.2.1 MSE estimation procedure; 4.4.2.2 Results; 4.5 Summary and discussion; References 5 The large-signal model: theoretical foundations, practical considerations, and recent trends |
| Record Nr. | UNINA-9910781864603321 |
| Cambridge : , : Cambridge University Press, , 2012 | ||
| Materiale a stampa | ||
| Lo trovi qui: Univ. Federico II | ||
| ||
Nonlinear transistor model parameter extraction techniques / / edited by Matthias Rudolph, Christian Fager, David E. Root [[electronic resource]]
| Nonlinear transistor model parameter extraction techniques / / edited by Matthias Rudolph, Christian Fager, David E. Root [[electronic resource]] |
| Pubbl/distr/stampa | Cambridge : , : Cambridge University Press, , 2012 |
| Descrizione fisica | 1 online resource (xiv, 352 pages) : digital, PDF file(s) |
| Disciplina | 621.3815/28 |
| Collana | The Cambridge RF and microwave engineering series |
| Soggetto topico |
Transistors - Mathematical models
Electronic circuit design |
| ISBN |
1-107-22467-5
1-283-34235-9 1-139-16026-5 9786613342355 1-139-15465-6 1-139-16126-1 1-139-15569-5 1-139-15744-2 1-139-15921-6 1-139-01496-X |
| Formato | Materiale a stampa |
| Livello bibliografico | Monografia |
| Lingua di pubblicazione | eng |
| Nota di contenuto |
Cover; Nonlinear Transistor Model Parameter Extraction Techniques; The Cambridge RF and Microwave Engineering Series; Title; Copyright; Contents; List of contributors; Preface; 1 Introduction; 1.1 Model extraction challenges; 1.1.1 Accuracy; 1.1.1.1 Circuit application; 1.1.1.2 Measurement uncertainty; 1.1.1.3 Process variations; 1.1.2 Numerical convergence; 1.1.2.1 Breakdown; 1.1.2.2 Self-heating; 1.1.3 Choice of the modeling transistor; 1.2 Model extraction workflow; References; 2 DC and thermal modeling: III--V FETs and HBTs; 2.1 Introduction; 2.2 Basic DC characteristics
2.3 FET DC parameters and modeling2.4 HBT DC parameters and modeling; 2.5 Process control monitoring; 2.6 Thermal modeling overview; 2.7 Physics-based thermal scaling model for HBTs; 2.8 Measurement-based thermal model for FETs; 2.9 Transistor reliability evaluation; Acknowledgments; References; 3 Extrinsic parameter and parasitic elements in III--V HBT and HEMT modeling; 3.1 Introduction; 3.2 Test structures with calibration and de-embedding; 3.3 Methods for extrinsic parameter extraction used in HBTs; 3.3.1 Equivalent circuit topology 3.3.2 Physical description of contact resistances and overlap capacitances3.3.3 Extrinsic resistance and inductance extraction; 3.4 Methods for extrinsic parameter extraction used in HEMTs; 3.4.1 Cold FET technique; 3.4.2 Unbiased technique; 3.4.3 GaN HEMTs exceptions; 3.5 Scaling for multicell arrays; References; 4 Uncertainties in small-signal equivalent circuit modeling; 4.1 Introduction; 4.1.1 Sources of uncertainty in modeling; 4.1.2 Measurement uncertainty; 4.2 Uncertainties in direct extraction methods; 4.2.1 Simple direct extraction example; 4.2.1.1 Example circuit and measurements 4.2.1.2 Uncertainty analysis4.2.1.3 Parameter estimation; 4.2.1.4 Parameter correlations; 4.2.2 Results using transistor measurements; 4.2.2.1 Uncertainty contributions; 4.2.2.2 Intrinsic model parameter sensitivities; 4.2.2.3 Intrinsic model parameter uncertainties; 4.2.2.4 Multibias extraction results; 4.3 Optimizer-based estimation techniques; 4.3.1 Maximum likelihood estimation; 4.3.1.1 Simple example; 4.3.1.2 MLE uncertainty; 4.3.2 MLE of small-signal transistor model parameters; 4.3.2.1 Parasitic parameter estimation; 4.3.2.2 Application to parasitic FET model extraction 4.3.2.3 MLE of intrinsic model parameters4.3.2.4 Application to intrinsic FET model extraction; 4.3.3 Comparison between MLE and the direct extraction method; 4.3.4 Application of MLE in RF-CMOS de-embedding; 4.3.4.1 Method description; 4.3.4.2 Example using 130 nm RF-CMOS measurements; 4.3.4.3 Comparison between different de-embedding methods; 4.3.5 Discussion; 4.4 Complexity versus uncertainty in equivalent circuit modeling; 4.4.1 Finding an optimum model topology; 4.4.2 An illustrative example; 4.4.2.1 MSE estimation procedure; 4.4.2.2 Results; 4.5 Summary and discussion; References 5 The large-signal model: theoretical foundations, practical considerations, and recent trends |
| Record Nr. | UNINA-9910827953503321 |
| Cambridge : , : Cambridge University Press, , 2012 | ||
| Materiale a stampa | ||
| Lo trovi qui: Univ. Federico II | ||
| ||
