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Memory Technology, Design and Testing, 1997: IEEE International Workshop on (MTDT '97)
| Memory Technology, Design and Testing, 1997: IEEE International Workshop on (MTDT '97) |
| Pubbl/distr/stampa | [Place of publication not identified], : IEEE Computer Society Press, 1997 |
| Disciplina | 621.39/732 |
| Soggetto topico |
Semiconductor storage devices - Congresses - Testing
Random access memory - Congresses Electrical & Computer Engineering Engineering & Applied Sciences Electrical Engineering |
| Formato | Materiale a stampa  |
| Livello bibliografico | Monografia |
| Lingua di pubblicazione | eng |
| Nota di contenuto | Matching memory to the power of personal computers / R. Foss -- A low-cost, high performance three-dimensional memory module technology / A. Glaser ... [et al.] -- High speed circuit techniques in a 150MHz 64M SDRAM / V. Lines ... [et al.] -- An analysis of (linked) addressed decoder faults / A. van de Goor, G. Gaydadjiev -- SRAM yield estimation in the early stage of the design cycle / V. Kim, T. Chen -- False write through and un-restored write electrical level fault models for SRAMs / R. Adams, E. Cooley -- A defect-tolerant DRAM employing a hierarchical redundancy scheme, built-in self-test and self-reconfiguration / D. Niggemeyer, J. Otterstedt, M. Redeker -- Formal verification of memory arrays using symbolic trajectory evaluation / M. Pandey, R. Bryant -- A product development flow with metrics for memory designs / S. Hegde, I. Pal, K. Rao -- A low-power high storage capacity structure for GaAs MESFET ROM / R. Kanan ... [et al.] -- Use of selective precharge for low-power on the match lines of content-addressable memories / C. Zukowski, S. Wang -- An open notation for memory tests / A. Offerman, A. van de Goor -- Testing memory modules in SRAM-based configurable FPGAs / W. Huang ... [et al.] -- Memory array testing through a scannable configuration / S. Yano, N. Ishiura -- A high-speed parallel sensing scheme for multi-level non-volatile memories / C. Calligaro ... [et al.]. |
| Record Nr. | UNISA-996204515603316 |
| [Place of publication not identified], : IEEE Computer Society Press, 1997 | ||
| Materiale a stampa | ||
| Lo trovi qui: Univ. di Salerno | ||
| ||
Memory Technology, Design and Testing, 1997: IEEE International Workshop on (MTDT '97)
| Memory Technology, Design and Testing, 1997: IEEE International Workshop on (MTDT '97) |
| Pubbl/distr/stampa | [Place of publication not identified], : IEEE Computer Society Press, 1997 |
| Disciplina | 621.39/732 |
| Soggetto topico |
Semiconductor storage devices - Congresses - Testing
Random access memory - Congresses Electrical & Computer Engineering Engineering & Applied Sciences Electrical Engineering |
| Formato | Materiale a stampa |
| Livello bibliografico | Monografia |
| Lingua di pubblicazione | eng |
| Nota di contenuto | Matching memory to the power of personal computers / R. Foss -- A low-cost, high performance three-dimensional memory module technology / A. Glaser ... [et al.] -- High speed circuit techniques in a 150MHz 64M SDRAM / V. Lines ... [et al.] -- An analysis of (linked) addressed decoder faults / A. van de Goor, G. Gaydadjiev -- SRAM yield estimation in the early stage of the design cycle / V. Kim, T. Chen -- False write through and un-restored write electrical level fault models for SRAMs / R. Adams, E. Cooley -- A defect-tolerant DRAM employing a hierarchical redundancy scheme, built-in self-test and self-reconfiguration / D. Niggemeyer, J. Otterstedt, M. Redeker -- Formal verification of memory arrays using symbolic trajectory evaluation / M. Pandey, R. Bryant -- A product development flow with metrics for memory designs / S. Hegde, I. Pal, K. Rao -- A low-power high storage capacity structure for GaAs MESFET ROM / R. Kanan ... [et al.] -- Use of selective precharge for low-power on the match lines of content-addressable memories / C. Zukowski, S. Wang -- An open notation for memory tests / A. Offerman, A. van de Goor -- Testing memory modules in SRAM-based configurable FPGAs / W. Huang ... [et al.] -- Memory array testing through a scannable configuration / S. Yano, N. Ishiura -- A high-speed parallel sensing scheme for multi-level non-volatile memories / C. Calligaro ... [et al.]. |
| Record Nr. | UNINA-9910872636003321 |
| [Place of publication not identified], : IEEE Computer Society Press, 1997 | ||
| Materiale a stampa | ||
| Lo trovi qui: Univ. Federico II | ||
| ||
Records of the 1993 IEEE International Workshop on Memory Testing, August 9-10, 1993, San Jose, California
| Records of the 1993 IEEE International Workshop on Memory Testing, August 9-10, 1993, San Jose, California |
| Pubbl/distr/stampa | [Place of publication not identified], : IEEE Computer Society Press, 1993 |
| Disciplina | 621.39/732/0287 |
| Soggetto topico |
Semiconductor storage devices - Testing - Congresses
Random access memory - Congresses Electrical & Computer Engineering Engineering & Applied Sciences Electrical Engineering |
| Formato | Materiale a stampa |
| Livello bibliografico | Monografia |
| Lingua di pubblicazione | eng |
| Record Nr. | UNISA-996206161503316 |
| [Place of publication not identified], : IEEE Computer Society Press, 1993 | ||
| Materiale a stampa | ||
| Lo trovi qui: Univ. di Salerno | ||
| ||
Records of the 1993 IEEE International Workshop on Memory Testing, August 9-10, 1993, San Jose, California
| Records of the 1993 IEEE International Workshop on Memory Testing, August 9-10, 1993, San Jose, California |
| Pubbl/distr/stampa | [Place of publication not identified], : IEEE Computer Society Press, 1993 |
| Disciplina | 621.39/732/0287 |
| Soggetto topico |
Semiconductor storage devices - Testing - Congresses
Random access memory - Congresses Electrical & Computer Engineering Engineering & Applied Sciences Electrical Engineering |
| Formato | Materiale a stampa |
| Livello bibliografico | Monografia |
| Lingua di pubblicazione | eng |
| Record Nr. | UNINA-9910872723303321 |
| [Place of publication not identified], : IEEE Computer Society Press, 1993 | ||
| Materiale a stampa | ||
| Lo trovi qui: Univ. Federico II | ||
| ||
Records of the 1995 IEEE International Workshop on Memory Technology, Design, and Testing, August 7-8, 1995, San Jose, California
| Records of the 1995 IEEE International Workshop on Memory Technology, Design, and Testing, August 7-8, 1995, San Jose, California |
| Pubbl/distr/stampa | [Place of publication not identified], : IEEE Computer Society Press, 1995 |
| Disciplina | 621.39/732 |
| Soggetto topico |
Semiconductor storage devices - Testing - Congresses
Random access memory - Congresses Electrical & Computer Engineering Engineering & Applied Sciences Electrical Engineering |
| Formato | Materiale a stampa |
| Livello bibliografico | Monografia |
| Lingua di pubblicazione | eng |
| Record Nr. | UNISA-996210263303316 |
| [Place of publication not identified], : IEEE Computer Society Press, 1995 | ||
| Materiale a stampa | ||
| Lo trovi qui: Univ. di Salerno | ||
| ||
Records of the 1995 IEEE International Workshop on Memory Technology, Design, and Testing, August 7-8, 1995, San Jose, California
| Records of the 1995 IEEE International Workshop on Memory Technology, Design, and Testing, August 7-8, 1995, San Jose, California |
| Pubbl/distr/stampa | [Place of publication not identified], : IEEE Computer Society Press, 1995 |
| Disciplina | 621.39/732 |
| Soggetto topico |
Semiconductor storage devices - Testing - Congresses
Random access memory - Congresses Electrical & Computer Engineering Engineering & Applied Sciences Electrical Engineering |
| Formato | Materiale a stampa |
| Livello bibliografico | Monografia |
| Lingua di pubblicazione | eng |
| Record Nr. | UNINA-9910872733003321 |
| [Place of publication not identified], : IEEE Computer Society Press, 1995 | ||
| Materiale a stampa | ||
| Lo trovi qui: Univ. Federico II | ||
| ||
Records of the IEEE International Workshop on Memory Technology, Design, and Testing, August 8-9, 1994, San Jose, California
| Records of the IEEE International Workshop on Memory Technology, Design, and Testing, August 8-9, 1994, San Jose, California |
| Pubbl/distr/stampa | [Place of publication not identified], : IEEE Computer Society Press, 1994 |
| Disciplina | 621.39/732 |
| Soggetto topico |
Semiconductor storage devices - Congresses - Testing
Random access memory - Congresses Electrical & Computer Engineering Engineering & Applied Sciences Electrical Engineering |
| Formato | Materiale a stampa |
| Livello bibliografico | Monografia |
| Lingua di pubblicazione | eng |
| Record Nr. | UNISA-996198230303316 |
| [Place of publication not identified], : IEEE Computer Society Press, 1994 | ||
| Materiale a stampa | ||
| Lo trovi qui: Univ. di Salerno | ||
| ||
Records of the IEEE International Workshop on Memory Technology, Design, and Testing, August 8-9, 1994, San Jose, California
| Records of the IEEE International Workshop on Memory Technology, Design, and Testing, August 8-9, 1994, San Jose, California |
| Pubbl/distr/stampa | [Place of publication not identified], : IEEE Computer Society Press, 1994 |
| Disciplina | 621.39/732 |
| Soggetto topico |
Semiconductor storage devices - Congresses - Testing
Random access memory - Congresses Electrical & Computer Engineering Engineering & Applied Sciences Electrical Engineering |
| Formato | Materiale a stampa |
| Livello bibliografico | Monografia |
| Lingua di pubblicazione | eng |
| Record Nr. | UNINA-9910872746003321 |
| [Place of publication not identified], : IEEE Computer Society Press, 1994 | ||
| Materiale a stampa | ||
| Lo trovi qui: Univ. Federico II | ||
| ||
