Info
- Utilizzare la checkbox di selezione a fianco di ciascun documento per attivare le funzionalità di stampa, invio email, download nei formati disponibili del (i) record.
Device modeling for analog and RF CMOS circuit design / / Trond Ytterdal, Yuhua Cheng, Tor A. Fjeldly
| Device modeling for analog and RF CMOS circuit design / / Trond Ytterdal, Yuhua Cheng, Tor A. Fjeldly |
| Autore | Ytterdal Trond |
| Pubbl/distr/stampa | Hoboken, NJ, : Wiley, c2003 |
| Descrizione fisica | 1 online resource (308 p.) |
| Disciplina | 621.39/5 |
| Altri autori (Persone) |
ChengYuhua <1958->
FjeldlyTor A |
| Soggetto topico | Metal oxide semiconductors, Complementary - Computer-aided design |
| ISBN |
9786610271870
9781280271878 1280271876 9780470353257 0470353252 9780470864340 0470864346 9780470863800 0470863803 |
| Formato | Materiale a stampa  |
| Livello bibliografico | Monografia |
| Lingua di pubblicazione | eng |
| Nota di contenuto |
Device Modeling for Analog and RF CMOS Circuit Design; Contents; Preface; 1 MOSFET Device Physics and Operation; 1.1 Introduction; 1.2 The MOS Capacitor; 1.2.1 Interface Charge; 1.2.2 Threshold Voltage; 1.2.3 MOS Capacitance; 1.2.4 MOS Charge Control Model; 1.3 Basic MOSFET Operation; 1.4 Basic MOSFET Modeling; 1.4.1 Simple Charge Control Model; 1.4.2 The Meyer Model; 1.4.3 Velocity Saturation Model; 1.4.4 Capacitance Models; 1.4.5 Comparison of Basic MOSFET Models; 1.4.6 Basic Small-signal Model; 1.5 Advanced MOSFET Modeling; 1.5.1 Modeling Approach; 1.5.2 Nonideal Effects
1.5.3 Unified MOSFET C-V ModelReferences; 2 MOSFET Fabrication; 2.1 Introduction; 2.2 Typical Planar Digital CMOS Process Flow; 2.3 RF CMOS Technology; References; 3 RF Modeling; 3.1 Introduction; 3.2 Equivalent Circuit Representation of MOS Transistors; 3.3 High-frequency Behavior of MOS Transistors and AC Small-signal Modeling; 3.3.1 Requirements for MOSFET Modeling for RF Applications; 3.3.2 Modeling of the Intrinsic Components; 3.3.3 HF Behavior and Modeling of the Extrinsic Components; 3.3.4 Non-quasi-static Behavior; 3.4 Model Parameter Extraction 3.4.1 RF Measurement and De-embedding Techniques3.4.2 Parameter Extraction; 3.5 NQS Model for RF Applications; References; 4 Noise Modeling; 4.1 Noise Sources in a MOSFET; 4.2 Flicker Noise Modeling; 4.2.1 The Physical Mechanisms of Flicker Noise; 4.2.2 Flicker Noise Models; 4.2.3 Future Work in Flicker Noise Modeling; 4.3 Thermal Noise Modeling; 4.3.1 Existing Thermal Noise Models; 4.3.2 HF Noise Parameters; 4.3.3 Analytical Calculation of the Noise Parameters; 4.3.4 Simulation and Discussions; 4.3.5 Induced Gate Noise Issue; References; 5 Proper Modeling for Accurate Distortion Analysis 5.1 Introduction5.2 Basic Terminology; 5.3 Nonlinearities in CMOS Devices and Their Modeling; 5.4 Calculation of Distortion in Analog CMOS Circuits; References; 6 The BSIM4 MOSFET Model; 6.1 An Introduction to BSIM4; 6.2 Gate Dielectric Model; 6.3 Enhanced Models for Effective DC and AC Channel Length and Width; 6.4 Threshold Voltage Model; 6.4.1 Enhanced Model for Nonuniform Lateral Doping due to Pocket (Halo) Implant; 6.4.2 Improved Models for Short-channel Effects; 6.4.3 Model for Narrow Width Effects; 6.4.4 Complete Threshold Voltage Model in BSIM4; 6.5 Channel Charge Model 6.6 Mobility Model6.7 Source/Drain Resistance Model; 6.8 I-V Model; 6.8.1 I-V Model When rdsMod = 0 (R(DS)(V) 0); 6.8.2 I-V Model When rdsMod = 1 (R(DS)(V) = 0); 6.9 Gate Tunneling Current Model; 6.9.1 Gate-to-substrate Tunneling Current I(GB); 6.9.2 Gate-to-channel and Gate-to-S/D Currents; 6.10 Substrate Current Models; 6.10.1 Model for Substrate Current due to Impact Ionization of Channel Current; 6.10.2 Models for Gate-induced Drain Leakage (GIDL) and Gate-induced Source Leakage (GISL) Currents; 6.11 Capacitance Models; 6.11.1 Intrinsic Capacitance Models 6.11.2 Fringing/Overlap Capacitance Models |
| Record Nr. | UNINA-9911019209203321 |
Ytterdal Trond
|
||
| Hoboken, NJ, : Wiley, c2003 | ||
| Materiale a stampa | ||
| Lo trovi qui: Univ. Federico II | ||
| ||
Systematic design of analog CMOS circuits using pre-computed lookup tables / Paul G. A. Jespers, Boris Murmann
| Systematic design of analog CMOS circuits using pre-computed lookup tables / Paul G. A. Jespers, Boris Murmann |
| Autore | Jespers, Paul G. |
| Descrizione fisica | xiv, 324 pages : ill. ; 26 cm |
| Disciplina | 621.3815 |
| Altri autori (Persone) | Murmann, Borisauthor |
| Soggetto topico |
Metal oxide semiconductors, Complementary - Computer-aided design
Integrated circuits - Computer-aided design |
| ISBN | 9781107192256 |
| Formato | Materiale a stampa |
| Livello bibliografico | Monografia |
| Lingua di pubblicazione | eng |
| Record Nr. | UNISALENTO-991004045669707536 |
|
Jespers, Paul G.
|
||
| Materiale a stampa | ||
| Lo trovi qui: Univ. del Salento | ||
| ||
