2020 IEEE/ACM Workshop on Memory Centric High Performance Computing (MCHPC) / / Institute of Electrical and Electronics Engineers
| 2020 IEEE/ACM Workshop on Memory Centric High Performance Computing (MCHPC) / / Institute of Electrical and Electronics Engineers |
| Pubbl/distr/stampa | [Place of publication not identified] : , : IEEE, , 2020 |
| Descrizione fisica | 1 online resource : illustrations |
| Disciplina | 004.3 |
| Soggetto topico |
Memory management (Computer science)
High performance computing |
| ISBN | 1-66542-278-5 |
| Formato | Materiale a stampa |
| Livello bibliografico | Monografia |
| Lingua di pubblicazione | eng |
| Altri titoli varianti | 2020 IEEE/ACM Workshop on Memory Centric High Performance Computing |
| Record Nr. | UNINA-9910469133603321 |
| [Place of publication not identified] : , : IEEE, , 2020 | ||
| Lo trovi qui: Univ. Federico II | ||
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2020 IEEE/ACM Workshop on Memory Centric High Performance Computing (MCHPC) / / Institute of Electrical and Electronics Engineers
| 2020 IEEE/ACM Workshop on Memory Centric High Performance Computing (MCHPC) / / Institute of Electrical and Electronics Engineers |
| Pubbl/distr/stampa | [Place of publication not identified] : , : IEEE, , 2020 |
| Descrizione fisica | 1 online resource : illustrations |
| Disciplina | 004.3 |
| Soggetto topico |
Memory management (Computer science)
High performance computing |
| ISBN | 1-66542-278-5 |
| Formato | Materiale a stampa |
| Livello bibliografico | Monografia |
| Lingua di pubblicazione | eng |
| Altri titoli varianti | 2020 IEEE/ACM Workshop on Memory Centric High Performance Computing |
| Record Nr. | UNISA-996574649203316 |
| [Place of publication not identified] : , : IEEE, , 2020 | ||
| Lo trovi qui: Univ. di Salerno | ||
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Big Memory Systems / / by Yu Hua
| Big Memory Systems / / by Yu Hua |
| Autore | Yu Hua |
| Edizione | [1st ed. 2026.] |
| Pubbl/distr/stampa | Singapore : , : Springer Nature Singapore : , : Imprint : Springer, , 2026 |
| Descrizione fisica | 1 online resource (297 pages) |
| Disciplina | 004.53 |
| Collana | Computer Science Series |
| Soggetto topico |
Computer storage devices
Memory management (Computer science) Information storage and retrieval systems Computer systems Computer Memory Structure Information Storage and Retrieval Computer System Implementation |
| ISBN | 981-9528-85-2 |
| Formato | Materiale a stampa |
| Livello bibliografico | Monografia |
| Lingua di pubblicazione | eng |
| Nota di contenuto | "1.Write Optimized and High Performance Persistence in Big Memory" -- "2.Lock free Concurrent Level Design for Persistent Memory" -- "3.GPU enabled Byte Granularity Persistence for Big Memory" -- "4.Scalable Learned Key Value Store for Disaggregated Memory" -- "5.Fast One sided RDMA based Transactions for Disaggregated Memory" -- "6.Multi Versioning Design for Distributed Transactions on Big Memory" -- "7.Fast and Cost Efficient Hashing Index Schemes for Cloud Systems" -- "8.Mitigating Asymmetric Read and Write Costs in Cuckoo based Designs". |
| Record Nr. | UNINA-9911049220303321 |
Yu Hua
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| Singapore : , : Springer Nature Singapore : , : Imprint : Springer, , 2026 | ||
| Lo trovi qui: Univ. Federico II | ||
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Computer Engineering and Technology : 18th CCF Conference, NCCET 2014, Guiyang, China, July 29 -- August 1, 2014. Revised Selected Papers / / edited by Weixia Xu, Liquan Xiao, Jinwen Li, Chengyi Zhang, Zhenzhen Zhu
| Computer Engineering and Technology : 18th CCF Conference, NCCET 2014, Guiyang, China, July 29 -- August 1, 2014. Revised Selected Papers / / edited by Weixia Xu, Liquan Xiao, Jinwen Li, Chengyi Zhang, Zhenzhen Zhu |
| Edizione | [1st ed. 2015.] |
| Pubbl/distr/stampa | Berlin, Heidelberg : , : Springer Berlin Heidelberg : , : Imprint : Springer, , 2015 |
| Descrizione fisica | 1 online resource (XII, 188 p. 110 illus.) |
| Disciplina | 004.16 |
| Collana | Communications in Computer and Information Science |
| Soggetto topico |
Microprocessors
Computer architecture Computer arithmetic and logic units Computer storage devices Memory management (Computer science) Logic design Computers Processor Architectures Arithmetic and Logic Structures Computer Memory Structure Logic Design Hardware Performance and Reliability |
| ISBN | 3-662-45815-2 |
| Formato | Materiale a stampa |
| Livello bibliografico | Monografia |
| Lingua di pubblicazione | eng |
| Nota di contenuto | Processor architecture -- Computer application and software optimization -- Technology on the horizon. |
| Record Nr. | UNINA-9910299252803321 |
| Berlin, Heidelberg : , : Springer Berlin Heidelberg : , : Imprint : Springer, , 2015 | ||
| Lo trovi qui: Univ. Federico II | ||
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Computer Engineering and Technology : 16th National Conference, NCCET 2012, Shanghai, China, August 17-19, 2012, Revised Selected Papers / / edited by Weixia Xu, Liquan Xiao, Pingjing Lu, Jinwen Li, Chengyi Zhang
| Computer Engineering and Technology : 16th National Conference, NCCET 2012, Shanghai, China, August 17-19, 2012, Revised Selected Papers / / edited by Weixia Xu, Liquan Xiao, Pingjing Lu, Jinwen Li, Chengyi Zhang |
| Edizione | [1st ed. 2013.] |
| Pubbl/distr/stampa | Berlin, Heidelberg : , : Springer Berlin Heidelberg : , : Imprint : Springer, , 2013 |
| Descrizione fisica | 1 online resource (XIV, 263 p. 164 illus.) |
| Disciplina | 004.1 |
| Collana | Communications in Computer and Information Science |
| Soggetto topico |
Microprocessors
Computer architecture Computer arithmetic and logic units Computer storage devices Memory management (Computer science) Logic design Computers Processor Architectures Arithmetic and Logic Structures Computer Memory Structure Logic Design Hardware Performance and Reliability |
| ISBN | 3-642-35898-5 |
| Formato | Materiale a stampa |
| Livello bibliografico | Monografia |
| Lingua di pubblicazione | eng |
| Nota di contenuto | Session 1: Microprocessor and Implementation -- A Method of Balancing the Global Multi-mode Clock Network in Ultra-large Scale CPU -- Hardware Architecture for the Parallel Generation of Long-Period Random Numbers Using MT Method -- MGTE: A Multi-level Hybrid Verification Platform for a 16-Core Processer -- An Efficient Parallel SURF Algorithm for Multi-core Processor -- A Study of Cache Design in Stream Processor -- Design and Implementation of Dynamically Reconfigurable Token Coherence Protocol for Many-Core Processor -- Dynamic and Online Task Scheduling Algorithm Based on Virtual Compute Group in Many-Core Architecture -- ADL and High Performance Processor Design -- Session 2: Design of Integration Circuit -- The Design of the ROHC Header Compression Accelerator -- A Hardware Implementation of Nussinov RNA Folding Algorithm -- A Configurable Architecture for 1-D Discrete Wavelet Transform -- A Comparison of Folded Architectures for the Discrete Wavelet Transform -- A High Performance DSP System with Fault Tolerant for Space Missions -- The Design and Realization of Campus Information Release Platform Based on Android Framework -- A Word-Length Optimized Hardware Gaussian Random Number Generator Based on the Box-Muller Method -- Session 3: I/O Interconnect -- DAMQ Sharing Scheme for Two Physical Channels in High Performance Router -- Design and Implementation of Dynamic Reliable Virtual Channel for Network-on-Chip -- HCCM: A Hierarchical Cross-Connected Mesh for Network on Chip -- Efficient Broadcast Scheme Based on Sub-network Partition for Many-Core CMPs on Gem5 Simulator -- A Quick Method for Mapping Cores Onto 2D-Mesh Based Networks on Chip -- Session 4: Measurement, Verification, and Others -- A Combined Hardware/Software Measurement for ARM Program Execution Time -- A Low-Complexity Parallel Two-Sided Jacobi Complex SVD Algorithm and Architecture for MIMO Beamforming Systems -- A Thermal-Aware Task Mapping Algorithm for Coarse Grain Reconfigurable Computing System -- DC Offset Mismatch Calibration for Time-Interleaved ADCs in High-Speed OFDM Receivers -- An Novel Graph Model for Loop Mapping on Coarse-Grained Reconfigurable Architectures -- Memristor Working Condition Analysis Based on SPICE Model -- On Stepsize of Fast Subspace Tracking Methods. |
| Record Nr. | UNINA-9910437590403321 |
| Berlin, Heidelberg : , : Springer Berlin Heidelberg : , : Imprint : Springer, , 2013 | ||
| Lo trovi qui: Univ. Federico II | ||
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Computer Engineering and Technology : 17th National Conference, NCCET 2013, Xining, China, July 20-22, 2013. Revised Selected Papers / / edited by Weixia Xu, Liquan Xiao, Chengyi Zhang, Jinwen Li, Liyan Yu
| Computer Engineering and Technology : 17th National Conference, NCCET 2013, Xining, China, July 20-22, 2013. Revised Selected Papers / / edited by Weixia Xu, Liquan Xiao, Chengyi Zhang, Jinwen Li, Liyan Yu |
| Edizione | [1st ed. 2013.] |
| Pubbl/distr/stampa | Berlin, Heidelberg : , : Springer Berlin Heidelberg : , : Imprint : Springer, , 2013 |
| Descrizione fisica | 1 online resource (XIV, 252 p. 151 illus.) |
| Disciplina | 004.1 |
| Collana | Communications in Computer and Information Science |
| Soggetto topico |
Microprocessors
Computer architecture Computer arithmetic and logic units Computer storage devices Memory management (Computer science) Logic design Computers Processor Architectures Arithmetic and Logic Structures Computer Memory Structure Logic Design Hardware Performance and Reliability |
| ISBN | 3-642-41635-7 |
| Formato | Materiale a stampa |
| Livello bibliografico | Monografia |
| Lingua di pubblicazione | eng |
| Nota di contenuto | Application Specific Processors -- Communication Architecture -- Computer Application and Software Optimization -- IC Design and Test -- Processor Architecture -- Technology on the Horizon. |
| Record Nr. | UNINA-9910437578703321 |
| Berlin, Heidelberg : , : Springer Berlin Heidelberg : , : Imprint : Springer, , 2013 | ||
| Lo trovi qui: Univ. Federico II | ||
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Converting to DFSMSrmm from ASG-ZARA or AutoMedia [[electronic resource] /] / [Norbert Schlumberger, Mary Lovelace]
| Converting to DFSMSrmm from ASG-ZARA or AutoMedia [[electronic resource] /] / [Norbert Schlumberger, Mary Lovelace] |
| Autore | Schlumberger Norbert |
| Edizione | [3rd ed.] |
| Pubbl/distr/stampa | San Jose, CA, : IBM, International Technical Support Organization, 2003 |
| Descrizione fisica | 1 online resource (788 p.) |
| Disciplina | 005.4/35 |
| Altri autori (Persone) | LovelaceMary |
| Collana | IBM redbooks |
| Soggetto topico |
Memory management (Computer science)
Computer storage devices Data tapes |
| Soggetto genere / forma | Electronic books. |
| Formato | Materiale a stampa |
| Livello bibliografico | Monografia |
| Lingua di pubblicazione | eng |
| Record Nr. | UNINA-9910450129403321 |
Schlumberger Norbert
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| San Jose, CA, : IBM, International Technical Support Organization, 2003 | ||
| Lo trovi qui: Univ. Federico II | ||
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Converting to DFSMSrmm from ASG-ZARA or AutoMedia [[electronic resource] /] / [Norbert Schlumberger, Mary Lovelace]
| Converting to DFSMSrmm from ASG-ZARA or AutoMedia [[electronic resource] /] / [Norbert Schlumberger, Mary Lovelace] |
| Autore | Schlumberger Norbert |
| Edizione | [3rd ed.] |
| Pubbl/distr/stampa | San Jose, CA, : IBM, International Technical Support Organization, 2003 |
| Descrizione fisica | 1 online resource (788 p.) |
| Disciplina | 005.4/35 |
| Altri autori (Persone) | LovelaceMary |
| Collana | IBM redbooks |
| Soggetto topico |
Memory management (Computer science)
Computer storage devices Data tapes |
| Formato | Materiale a stampa |
| Livello bibliografico | Monografia |
| Lingua di pubblicazione | eng |
| Record Nr. | UNINA-9910783525803321 |
Schlumberger Norbert
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| San Jose, CA, : IBM, International Technical Support Organization, 2003 | ||
| Lo trovi qui: Univ. Federico II | ||
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Converting to DFSMSrmm from CA-1 [[electronic resource] /] / [Mary Lovelace, Norbert Schlumberger, Sue Hamner]
| Converting to DFSMSrmm from CA-1 [[electronic resource] /] / [Mary Lovelace, Norbert Schlumberger, Sue Hamner] |
| Autore | Lovelace Mary |
| Edizione | [2nd ed.] |
| Pubbl/distr/stampa | [S.l.], : IBM, International Technical Support Organization, c2003 |
| Descrizione fisica | 1 online resource (828 p.) |
| Disciplina | 005.4/35 |
| Altri autori (Persone) |
SchlumbergerNorbert
HamnerSue |
| Collana | IBM redbooks |
| Soggetto topico |
Memory management (Computer science)
Computer storage devices Data tapes |
| Soggetto genere / forma | Electronic books. |
| Formato | Materiale a stampa |
| Livello bibliografico | Monografia |
| Lingua di pubblicazione | eng |
| Record Nr. | UNINA-9910450130203321 |
Lovelace Mary
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| [S.l.], : IBM, International Technical Support Organization, c2003 | ||
| Lo trovi qui: Univ. Federico II | ||
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Converting to DFSMSrmm from CA-1 [[electronic resource] /] / [Mary Lovelace, Norbert Schlumberger, Sue Hamner]
| Converting to DFSMSrmm from CA-1 [[electronic resource] /] / [Mary Lovelace, Norbert Schlumberger, Sue Hamner] |
| Autore | Lovelace Mary |
| Edizione | [2nd ed.] |
| Pubbl/distr/stampa | [S.l.], : IBM, International Technical Support Organization, c2003 |
| Descrizione fisica | 1 online resource (828 p.) |
| Disciplina | 005.4/35 |
| Altri autori (Persone) |
SchlumbergerNorbert
HamnerSue |
| Collana | IBM redbooks |
| Soggetto topico |
Memory management (Computer science)
Computer storage devices Data tapes |
| Formato | Materiale a stampa |
| Livello bibliografico | Monografia |
| Lingua di pubblicazione | eng |
| Record Nr. | UNINA-9910783525303321 |
Lovelace Mary
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| [S.l.], : IBM, International Technical Support Organization, c2003 | ||
| Lo trovi qui: Univ. Federico II | ||
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