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2009 27th IEEE VLSI Test Symposium : proceedings : 3-7 May 2009 Santa Cruz, CA, USA ; VTS 2009
| 2009 27th IEEE VLSI Test Symposium : proceedings : 3-7 May 2009 Santa Cruz, CA, USA ; VTS 2009 |
| Pubbl/distr/stampa | [Place of publication not identified], : IEEE Computer Society, 2009 |
| Disciplina | 621.39/5 |
| Soggetto topico |
Integrated circuits - Very large scale integration - Testing
Electrical Engineering Electrical & Computer Engineering Engineering & Applied Sciences |
| ISBN | 1-5090-7567-4 |
| Formato | Materiale a stampa  |
| Livello bibliografico | Monografia |
| Lingua di pubblicazione | eng |
| Record Nr. | UNISA-996218375903316 |
| [Place of publication not identified], : IEEE Computer Society, 2009 | ||
| Materiale a stampa | ||
| Lo trovi qui: Univ. di Salerno | ||
| ||
2009 27th IEEE VLSI Test Symposium : proceedings : 3-7 May 2009 Santa Cruz, CA, USA ; VTS 2009
| 2009 27th IEEE VLSI Test Symposium : proceedings : 3-7 May 2009 Santa Cruz, CA, USA ; VTS 2009 |
| Pubbl/distr/stampa | [Place of publication not identified], : IEEE Computer Society, 2009 |
| Disciplina | 621.39/5 |
| Soggetto topico |
Integrated circuits - Very large scale integration - Testing
Electrical Engineering Electrical & Computer Engineering Engineering & Applied Sciences |
| ISBN |
9781509075676
1509075674 |
| Formato | Materiale a stampa |
| Livello bibliografico | Monografia |
| Lingua di pubblicazione | eng |
| Record Nr. | UNINA-9910140015403321 |
| [Place of publication not identified], : IEEE Computer Society, 2009 | ||
| Materiale a stampa | ||
| Lo trovi qui: Univ. Federico II | ||
| ||
2010 28th VLSI Test Symposium
| 2010 28th VLSI Test Symposium |
| Pubbl/distr/stampa | [Place of publication not identified], : IEEE, 2010 |
| Descrizione fisica | 1 online resource |
| Disciplina | 621 |
| Soggetto topico | Integrated circuits - Very large scale integration - Testing |
| ISBN |
9781424466504
1424466504 |
| Formato | Materiale a stampa |
| Livello bibliografico | Monografia |
| Lingua di pubblicazione | eng |
| Record Nr. | UNINA-9910139090603321 |
| [Place of publication not identified], : IEEE, 2010 | ||
| Materiale a stampa | ||
| Lo trovi qui: Univ. Federico II | ||
| ||
2011 IEEE 29th VLSI Test Symposium
| 2011 IEEE 29th VLSI Test Symposium |
| Pubbl/distr/stampa | [Place of publication not identified], : IEEE, 2011 |
| Descrizione fisica | 1 online resource (328 pages) : illustrations |
| Disciplina | 621 |
| Soggetto topico | Integrated circuits - Very large scale integration - Testing |
| ISBN | 1-61284-656-4 |
| Formato | Materiale a stampa |
| Livello bibliografico | Monografia |
| Lingua di pubblicazione | eng |
| Nota di contenuto | Foreword -- Organizing Committee -- Program Committee -- Steering Committee -- Reviewers -- Acknowledgements -- Test Technology Technical Council (TTTC) -- Test Technology Educational Program (TTEP) Tutorials -- Awards -- Session 1 Session 1A: Post-Silicon Debug & Customer returns -- Session 1B: 3D ICS -- IP Session 1C: Test and Characterization of High-Speed Circuits -- Session 2 Session 2A: Power Issues in Test -- Session 2B: Analog, Mixed-Signal & RF Test/Diagnosis -- IP Session 2C: On Chip Parametric Sensors -- Session 3 Session 3A: Delay & Performance Test 1 -- Special Session 3B: Hot Topic: Multifaceted Approaches for Field Reliability -- IP Session 3C: Advanced Methods for Leveraging New Test Standards -- Session 4 Special Session 4A: New Topics -- Session 4B: Panel: Security -- IP Session 4C: The Buck Stops With Wafer Test: Dream Or Reality? -- Session 5 Special Session 5A: Apprentice, Season 4 -- Special Session 5B: Panel: How Much Toggle Activity Should We Be Testing With? -- Session 6 Session 6A: Delay & Performance Test 2 -- Session 6B: Memory Test and Repair -- IP Session 6C: The Bang For The Buck With Resiliency: Yield Or Field? -- Session 7 Session 7A: Low-Power IC Test -- Session 7B: On-line & System Testing -- Session 8 Session 8A: Aging, Transients & Soft Errors -- Special Session 8B: New Topic: Solar Cells -- Sessions 9 Special Session 9C: Panel: Coverage Closure in SoC Verification: Are We Chasing a Mirage? -- Session 10 Session 10A: Design for Testability 1 -- Session 10B: Error & Fault Tolerance 1 -- Session 11 Session 11A: Design for Testability 2 -- Session 11B: Error & Fault Tolerance 2 -- Session 12 Session 12A: ATPG & Compression -- Session 12B: Reducing Test & Diagnosis Costs -- Session 13 Special Session 13A: Practical Signal Processing at Mixed Signal Test Venues - Trend Removal, Noise Reduction, Wideband Signal Capturing -- Session 13B: Hot Topic: Smart Silicon -- Session 13C: Hot Topic: Design and Test of 3D and Emerging Memories. |
| Record Nr. | UNISA-996206420303316 |
| [Place of publication not identified], : IEEE, 2011 | ||
| Materiale a stampa | ||
| Lo trovi qui: Univ. di Salerno | ||
| ||
2011 IEEE 29th VLSI Test Symposium
| 2011 IEEE 29th VLSI Test Symposium |
| Pubbl/distr/stampa | [Place of publication not identified], : IEEE, 2011 |
| Descrizione fisica | 1 online resource (328 pages) : illustrations |
| Disciplina | 621 |
| Soggetto topico | Integrated circuits - Very large scale integration - Testing |
| ISBN |
9781612846569
1612846564 |
| Formato | Materiale a stampa |
| Livello bibliografico | Monografia |
| Lingua di pubblicazione | eng |
| Nota di contenuto | Foreword -- Organizing Committee -- Program Committee -- Steering Committee -- Reviewers -- Acknowledgements -- Test Technology Technical Council (TTTC) -- Test Technology Educational Program (TTEP) Tutorials -- Awards -- Session 1 Session 1A: Post-Silicon Debug & Customer returns -- Session 1B: 3D ICS -- IP Session 1C: Test and Characterization of High-Speed Circuits -- Session 2 Session 2A: Power Issues in Test -- Session 2B: Analog, Mixed-Signal & RF Test/Diagnosis -- IP Session 2C: On Chip Parametric Sensors -- Session 3 Session 3A: Delay & Performance Test 1 -- Special Session 3B: Hot Topic: Multifaceted Approaches for Field Reliability -- IP Session 3C: Advanced Methods for Leveraging New Test Standards -- Session 4 Special Session 4A: New Topics -- Session 4B: Panel: Security -- IP Session 4C: The Buck Stops With Wafer Test: Dream Or Reality? -- Session 5 Special Session 5A: Apprentice, Season 4 -- Special Session 5B: Panel: How Much Toggle Activity Should We Be Testing With? -- Session 6 Session 6A: Delay & Performance Test 2 -- Session 6B: Memory Test and Repair -- IP Session 6C: The Bang For The Buck With Resiliency: Yield Or Field? -- Session 7 Session 7A: Low-Power IC Test -- Session 7B: On-line & System Testing -- Session 8 Session 8A: Aging, Transients & Soft Errors -- Special Session 8B: New Topic: Solar Cells -- Sessions 9 Special Session 9C: Panel: Coverage Closure in SoC Verification: Are We Chasing a Mirage? -- Session 10 Session 10A: Design for Testability 1 -- Session 10B: Error & Fault Tolerance 1 -- Session 11 Session 11A: Design for Testability 2 -- Session 11B: Error & Fault Tolerance 2 -- Session 12 Session 12A: ATPG & Compression -- Session 12B: Reducing Test & Diagnosis Costs -- Session 13 Special Session 13A: Practical Signal Processing at Mixed Signal Test Venues - Trend Removal, Noise Reduction, Wideband Signal Capturing -- Session 13B: Hot Topic: Smart Silicon -- Session 13C: Hot Topic: Design and Test of 3D and Emerging Memories. |
| Record Nr. | UNINA-9910140952703321 |
| [Place of publication not identified], : IEEE, 2011 | ||
| Materiale a stampa | ||
| Lo trovi qui: Univ. Federico II | ||
| ||
2020 IEEE 38th VLSI Test Symposium (VTS) / / Institute of Electrical and Electronics Engineers (IEEE)
| 2020 IEEE 38th VLSI Test Symposium (VTS) / / Institute of Electrical and Electronics Engineers (IEEE) |
| Pubbl/distr/stampa | Piscataway, New Jersey : , : Institute of Electrical and Electronics Engineers (IEEE), , 2020 |
| Descrizione fisica | 1 online resource (various pagings) : illustrations |
| Disciplina | 621 |
| Soggetto topico | Integrated circuits - Very large scale integration - Testing |
| ISBN | 1-7281-5359-X |
| Formato | Materiale a stampa |
| Livello bibliografico | Monografia |
| Lingua di pubblicazione | eng |
| Altri titoli varianti | 2020 IEEE 38th VLSI Test Symposium |
| Record Nr. | UNINA-9910437351203321 |
| Piscataway, New Jersey : , : Institute of Electrical and Electronics Engineers (IEEE), , 2020 | ||
| Materiale a stampa | ||
| Lo trovi qui: Univ. Federico II | ||
| ||
2020 IEEE 38th VLSI Test Symposium (VTS) / / Institute of Electrical and Electronics Engineers (IEEE)
| 2020 IEEE 38th VLSI Test Symposium (VTS) / / Institute of Electrical and Electronics Engineers (IEEE) |
| Pubbl/distr/stampa | Piscataway, New Jersey : , : Institute of Electrical and Electronics Engineers (IEEE), , 2020 |
| Descrizione fisica | 1 online resource (various pagings) : illustrations |
| Disciplina | 621 |
| Soggetto topico | Integrated circuits - Very large scale integration - Testing |
| ISBN | 1-7281-5359-X |
| Formato | Materiale a stampa |
| Livello bibliografico | Monografia |
| Lingua di pubblicazione | eng |
| Altri titoli varianti | 2020 IEEE 38th VLSI Test Symposium |
| Record Nr. | UNISA-996575535103316 |
| Piscataway, New Jersey : , : Institute of Electrical and Electronics Engineers (IEEE), , 2020 | ||
| Materiale a stampa | ||
| Lo trovi qui: Univ. di Salerno | ||
| ||
24th IEEE VLSI Test Symposium (VTS 2006): 30 April - 04 May 2006/Berkeley, California
| 24th IEEE VLSI Test Symposium (VTS 2006): 30 April - 04 May 2006/Berkeley, California |
| Pubbl/distr/stampa | [Place of publication not identified], : IEEE Computer Society Press, 2006 |
| Descrizione fisica | 1 online resource |
| Disciplina | 621.395 |
| Soggetto topico | Integrated circuits - Very large scale integration - Testing |
| ISBN |
9781509098286
1509098283 |
| Formato | Materiale a stampa |
| Livello bibliografico | Monografia |
| Lingua di pubblicazione | eng |
| Nota di contenuto | Proceedings. 24th IEEE VLSI Test Symposium -- 24th IEEE VLSI Test Symposium - Title -- 24th IEEE VLSI Test Symposium - Copyright -- 24th IEEE Symposium on Reliable Distributed Systems - Table of contents -- Forward -- Organizing Committee -- Program Committee -- Reviewers -- Acknowledgments -- Test Technology Technical Council (TTTC) -- Awards -- Test Technology Educational Progam (TTEP) Tutorials -- The impacts of untestable defects on transition fault testing -- Low-cost scan-based delay testing of latch-based circuits with time borrowing -- Path delay fault simulation on large industrial designs -- A scheme for on-chip timing characterization -- BIST for network-on-chip interconnect infrastructures. |
| Record Nr. | UNINA-9910145453503321 |
| [Place of publication not identified], : IEEE Computer Society Press, 2006 | ||
| Materiale a stampa | ||
| Lo trovi qui: Univ. Federico II | ||
| ||
IEEE Std 1005-1991 : IEEE Standard Definitions and Characterization of Floating Gate Semiconductor Arrays / / Institute of Electrical and Electronics Engineers
| IEEE Std 1005-1991 : IEEE Standard Definitions and Characterization of Floating Gate Semiconductor Arrays / / Institute of Electrical and Electronics Engineers |
| Pubbl/distr/stampa | New York, NY, USA : , : IEEE, , 1991 |
| Descrizione fisica | 1 online resource (41 pages) |
| Disciplina | 621.3973 |
| Soggetto topico |
Integrated circuits - Very large scale integration - Testing
Semiconductor storage devices |
| ISBN | 1-55937-136-6 |
| Formato | Materiale a stampa |
| Livello bibliografico | Monografia |
| Lingua di pubblicazione | eng |
| Altri titoli varianti | IEEE Std 1005-1991 |
| Record Nr. | UNINA-9910135904403321 |
| New York, NY, USA : , : IEEE, , 1991 | ||
| Materiale a stampa | ||
| Lo trovi qui: Univ. Federico II | ||
| ||
IEEE Std 1005-1991 : IEEE Standard Definitions and Characterization of Floating Gate Semiconductor Arrays / / Institute of Electrical and Electronics Engineers
| IEEE Std 1005-1991 : IEEE Standard Definitions and Characterization of Floating Gate Semiconductor Arrays / / Institute of Electrical and Electronics Engineers |
| Pubbl/distr/stampa | New York, NY, USA : , : IEEE, , 1991 |
| Descrizione fisica | 1 online resource (41 pages) |
| Disciplina | 621.3973 |
| Soggetto topico |
Integrated circuits - Very large scale integration - Testing
Semiconductor storage devices |
| ISBN | 1-55937-136-6 |
| Formato | Materiale a stampa |
| Livello bibliografico | Monografia |
| Lingua di pubblicazione | eng |
| Altri titoli varianti | IEEE Std 1005-1991 |
| Record Nr. | UNISA-996280849703316 |
| New York, NY, USA : , : IEEE, , 1991 | ||
| Materiale a stampa | ||
| Lo trovi qui: Univ. di Salerno | ||
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