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2009 27th IEEE VLSI Test Symposium : proceedings : 3-7 May 2009 Santa Cruz, CA, USA ; VTS 2009
2009 27th IEEE VLSI Test Symposium : proceedings : 3-7 May 2009 Santa Cruz, CA, USA ; VTS 2009
Pubbl/distr/stampa [Place of publication not identified], : IEEE Computer Society, 2009
Disciplina 621.39/5
Soggetto topico Integrated circuits - Very large scale integration - Testing
Electrical Engineering
Electrical & Computer Engineering
Engineering & Applied Sciences
ISBN 1-5090-7567-4
Formato Materiale a stampa
Livello bibliografico Monografia
Lingua di pubblicazione eng
Record Nr. UNISA-996218375903316
[Place of publication not identified], : IEEE Computer Society, 2009
Materiale a stampa
Lo trovi qui: Univ. di Salerno
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2009 27th IEEE VLSI Test Symposium : proceedings : 3-7 May 2009 Santa Cruz, CA, USA ; VTS 2009
2009 27th IEEE VLSI Test Symposium : proceedings : 3-7 May 2009 Santa Cruz, CA, USA ; VTS 2009
Pubbl/distr/stampa [Place of publication not identified], : IEEE Computer Society, 2009
Disciplina 621.39/5
Soggetto topico Integrated circuits - Very large scale integration - Testing
Electrical Engineering
Electrical & Computer Engineering
Engineering & Applied Sciences
ISBN 1-5090-7567-4
Formato Materiale a stampa
Livello bibliografico Monografia
Lingua di pubblicazione eng
Record Nr. UNINA-9910140015403321
[Place of publication not identified], : IEEE Computer Society, 2009
Materiale a stampa
Lo trovi qui: Univ. Federico II
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2011 IEEE 29th VLSI Test Symposium
2011 IEEE 29th VLSI Test Symposium
Pubbl/distr/stampa [Place of publication not identified], : IEEE, 2011
Descrizione fisica 1 online resource (328 pages) : illustrations
Disciplina 621
Soggetto topico Integrated circuits - Very large scale integration - Testing
ISBN 1-61284-656-4
Formato Materiale a stampa
Livello bibliografico Monografia
Lingua di pubblicazione eng
Nota di contenuto Foreword -- Organizing Committee -- Program Committee -- Steering Committee -- Reviewers -- Acknowledgements -- Test Technology Technical Council (TTTC) -- Test Technology Educational Program (TTEP) Tutorials -- Awards -- Session 1 Session 1A: Post-Silicon Debug & Customer returns -- Session 1B: 3D ICS -- IP Session 1C: Test and Characterization of High-Speed Circuits -- Session 2 Session 2A: Power Issues in Test -- Session 2B: Analog, Mixed-Signal & RF Test/Diagnosis -- IP Session 2C: On Chip Parametric Sensors -- Session 3 Session 3A: Delay & Performance Test 1 -- Special Session 3B: Hot Topic: Multifaceted Approaches for Field Reliability -- IP Session 3C: Advanced Methods for Leveraging New Test Standards -- Session 4 Special Session 4A: New Topics -- Session 4B: Panel: Security -- IP Session 4C: The Buck Stops With Wafer Test: Dream Or Reality? -- Session 5 Special Session 5A: Apprentice, Season 4 -- Special Session 5B: Panel: How Much Toggle Activity Should We Be Testing With? -- Session 6 Session 6A: Delay & Performance Test 2 -- Session 6B: Memory Test and Repair -- IP Session 6C: The Bang For The Buck With Resiliency: Yield Or Field? -- Session 7 Session 7A: Low-Power IC Test -- Session 7B: On-line & System Testing -- Session 8 Session 8A: Aging, Transients & Soft Errors -- Special Session 8B: New Topic: Solar Cells -- Sessions 9 Special Session 9C: Panel: Coverage Closure in SoC Verification: Are We Chasing a Mirage? -- Session 10 Session 10A: Design for Testability 1 -- Session 10B: Error & Fault Tolerance 1 -- Session 11 Session 11A: Design for Testability 2 -- Session 11B: Error & Fault Tolerance 2 -- Session 12 Session 12A: ATPG & Compression -- Session 12B: Reducing Test & Diagnosis Costs -- Session 13 Special Session 13A: Practical Signal Processing at Mixed Signal Test Venues - Trend Removal, Noise Reduction, Wideband Signal Capturing -- Session 13B: Hot Topic: Smart Silicon -- Session 13C: Hot Topic: Design and Test of 3D and Emerging Memories.
Record Nr. UNISA-996206420303316
[Place of publication not identified], : IEEE, 2011
Materiale a stampa
Lo trovi qui: Univ. di Salerno
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2011 IEEE 29th VLSI Test Symposium
2011 IEEE 29th VLSI Test Symposium
Pubbl/distr/stampa [Place of publication not identified], : IEEE, 2011
Descrizione fisica 1 online resource (328 pages) : illustrations
Disciplina 621
Soggetto topico Integrated circuits - Very large scale integration - Testing
ISBN 1-61284-656-4
Formato Materiale a stampa
Livello bibliografico Monografia
Lingua di pubblicazione eng
Nota di contenuto Foreword -- Organizing Committee -- Program Committee -- Steering Committee -- Reviewers -- Acknowledgements -- Test Technology Technical Council (TTTC) -- Test Technology Educational Program (TTEP) Tutorials -- Awards -- Session 1 Session 1A: Post-Silicon Debug & Customer returns -- Session 1B: 3D ICS -- IP Session 1C: Test and Characterization of High-Speed Circuits -- Session 2 Session 2A: Power Issues in Test -- Session 2B: Analog, Mixed-Signal & RF Test/Diagnosis -- IP Session 2C: On Chip Parametric Sensors -- Session 3 Session 3A: Delay & Performance Test 1 -- Special Session 3B: Hot Topic: Multifaceted Approaches for Field Reliability -- IP Session 3C: Advanced Methods for Leveraging New Test Standards -- Session 4 Special Session 4A: New Topics -- Session 4B: Panel: Security -- IP Session 4C: The Buck Stops With Wafer Test: Dream Or Reality? -- Session 5 Special Session 5A: Apprentice, Season 4 -- Special Session 5B: Panel: How Much Toggle Activity Should We Be Testing With? -- Session 6 Session 6A: Delay & Performance Test 2 -- Session 6B: Memory Test and Repair -- IP Session 6C: The Bang For The Buck With Resiliency: Yield Or Field? -- Session 7 Session 7A: Low-Power IC Test -- Session 7B: On-line & System Testing -- Session 8 Session 8A: Aging, Transients & Soft Errors -- Special Session 8B: New Topic: Solar Cells -- Sessions 9 Special Session 9C: Panel: Coverage Closure in SoC Verification: Are We Chasing a Mirage? -- Session 10 Session 10A: Design for Testability 1 -- Session 10B: Error & Fault Tolerance 1 -- Session 11 Session 11A: Design for Testability 2 -- Session 11B: Error & Fault Tolerance 2 -- Session 12 Session 12A: ATPG & Compression -- Session 12B: Reducing Test & Diagnosis Costs -- Session 13 Special Session 13A: Practical Signal Processing at Mixed Signal Test Venues - Trend Removal, Noise Reduction, Wideband Signal Capturing -- Session 13B: Hot Topic: Smart Silicon -- Session 13C: Hot Topic: Design and Test of 3D and Emerging Memories.
Record Nr. UNINA-9910140952703321
[Place of publication not identified], : IEEE, 2011
Materiale a stampa
Lo trovi qui: Univ. Federico II
Opac: Controlla la disponibilità qui
2020 IEEE 38th VLSI Test Symposium (VTS) / / Institute of Electrical and Electronics Engineers (IEEE)
2020 IEEE 38th VLSI Test Symposium (VTS) / / Institute of Electrical and Electronics Engineers (IEEE)
Pubbl/distr/stampa Piscataway, New Jersey : , : Institute of Electrical and Electronics Engineers (IEEE), , 2020
Descrizione fisica 1 online resource (various pagings) : illustrations
Disciplina 621
Soggetto topico Integrated circuits - Very large scale integration - Testing
ISBN 1-7281-5359-X
Formato Materiale a stampa
Livello bibliografico Monografia
Lingua di pubblicazione eng
Altri titoli varianti 2020 IEEE 38th VLSI Test Symposium
Record Nr. UNINA-9910437351203321
Piscataway, New Jersey : , : Institute of Electrical and Electronics Engineers (IEEE), , 2020
Materiale a stampa
Lo trovi qui: Univ. Federico II
Opac: Controlla la disponibilità qui
2020 IEEE 38th VLSI Test Symposium (VTS) / / Institute of Electrical and Electronics Engineers (IEEE)
2020 IEEE 38th VLSI Test Symposium (VTS) / / Institute of Electrical and Electronics Engineers (IEEE)
Pubbl/distr/stampa Piscataway, New Jersey : , : Institute of Electrical and Electronics Engineers (IEEE), , 2020
Descrizione fisica 1 online resource (various pagings) : illustrations
Disciplina 621
Soggetto topico Integrated circuits - Very large scale integration - Testing
ISBN 1-7281-5359-X
Formato Materiale a stampa
Livello bibliografico Monografia
Lingua di pubblicazione eng
Altri titoli varianti 2020 IEEE 38th VLSI Test Symposium
Record Nr. UNISA-996575535103316
Piscataway, New Jersey : , : Institute of Electrical and Electronics Engineers (IEEE), , 2020
Materiale a stampa
Lo trovi qui: Univ. di Salerno
Opac: Controlla la disponibilità qui
IEEE Std 1005-1991 : IEEE Standard Definitions and Characterization of Floating Gate Semiconductor Arrays / / Institute of Electrical and Electronics Engineers
IEEE Std 1005-1991 : IEEE Standard Definitions and Characterization of Floating Gate Semiconductor Arrays / / Institute of Electrical and Electronics Engineers
Pubbl/distr/stampa New York, NY, USA : , : IEEE, , 1991
Descrizione fisica 1 online resource (41 pages)
Disciplina 621.3973
Soggetto topico Integrated circuits - Very large scale integration - Testing
Semiconductor storage devices
ISBN 1-55937-136-6
Formato Materiale a stampa
Livello bibliografico Monografia
Lingua di pubblicazione eng
Altri titoli varianti IEEE Std 1005-1991
Record Nr. UNINA-9910135904403321
New York, NY, USA : , : IEEE, , 1991
Materiale a stampa
Lo trovi qui: Univ. Federico II
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IEEE Std 1005-1991 : IEEE Standard Definitions and Characterization of Floating Gate Semiconductor Arrays / / Institute of Electrical and Electronics Engineers
IEEE Std 1005-1991 : IEEE Standard Definitions and Characterization of Floating Gate Semiconductor Arrays / / Institute of Electrical and Electronics Engineers
Pubbl/distr/stampa New York, NY, USA : , : IEEE, , 1991
Descrizione fisica 1 online resource (41 pages)
Disciplina 621.3973
Soggetto topico Integrated circuits - Very large scale integration - Testing
Semiconductor storage devices
ISBN 1-55937-136-6
Formato Materiale a stampa
Livello bibliografico Monografia
Lingua di pubblicazione eng
Altri titoli varianti IEEE Std 1005-1991
Record Nr. UNISA-996280849703316
New York, NY, USA : , : IEEE, , 1991
Materiale a stampa
Lo trovi qui: Univ. di Salerno
Opac: Controlla la disponibilità qui
Proceedings
Proceedings
Pubbl/distr/stampa Piscataway, NJ, : IEEE
Disciplina 621.39
Soggetto topico Integrated circuits - Very large scale integration - Design and construction
Integrated circuits - Very large scale integration - Testing
Integrated circuits - Fault tolerance
Soggetto genere / forma Conference papers and proceedings.
ISSN 2162-061X
Formato Materiale a stampa
Livello bibliografico Periodico
Lingua di pubblicazione eng
Altri titoli varianti International Design and Test Workshop
IDT
IEEE International Design and Test Workshop
Record Nr. UNISA-996280903303316
Piscataway, NJ, : IEEE
Materiale a stampa
Lo trovi qui: Univ. di Salerno
Opac: Controlla la disponibilità qui
Proceedings
Proceedings
Pubbl/distr/stampa Piscataway, NJ, : IEEE
Disciplina 621.39
Soggetto topico Integrated circuits - Very large scale integration - Design and construction
Integrated circuits - Very large scale integration - Testing
Integrated circuits - Fault tolerance
Soggetto genere / forma Conference papers and proceedings.
ISSN 2162-061X
Formato Materiale a stampa
Livello bibliografico Periodico
Lingua di pubblicazione eng
Altri titoli varianti International Design and Test Workshop
IDT
IEEE International Design and Test Workshop
Record Nr. UNINA-9910626010103321
Piscataway, NJ, : IEEE
Materiale a stampa
Lo trovi qui: Univ. Federico II
Opac: Controlla la disponibilità qui