5th International Symposium on Quality Electronic Design : proceedings : 22-24 March, 2004, San Jose, California |
Pubbl/distr/stampa | [Place of publication not identified], : IEEE Computer Society, 2004 |
Soggetto topico |
Integrated circuits - Very large scale integration - Reliability
Integrated circuits - Very large scale integration - Design and construction Integrated circuits - Computer-aided design - Very large scale integration Integrated circuits - Quality control - Very large scale integration - Testing Electrical & Computer Engineering Engineering & Applied Sciences Electrical Engineering |
Formato | Materiale a stampa |
Livello bibliografico | Monografia |
Lingua di pubblicazione | eng |
Record Nr. | UNISA-996214938303316 |
[Place of publication not identified], : IEEE Computer Society, 2004 | ||
Materiale a stampa | ||
Lo trovi qui: Univ. di Salerno | ||
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5th International Symposium on Quality Electronic Design : proceedings : 22-24 March, 2004, San Jose, California |
Pubbl/distr/stampa | [Place of publication not identified], : IEEE Computer Society, 2004 |
Soggetto topico |
Integrated circuits - Very large scale integration - Reliability
Integrated circuits - Very large scale integration - Design and construction Integrated circuits - Computer-aided design - Very large scale integration Integrated circuits - Quality control - Very large scale integration - Testing Electrical & Computer Engineering Engineering & Applied Sciences Electrical Engineering |
Formato | Materiale a stampa |
Livello bibliografico | Monografia |
Lingua di pubblicazione | eng |
Record Nr. | UNINA-9910872691203321 |
[Place of publication not identified], : IEEE Computer Society, 2004 | ||
Materiale a stampa | ||
Lo trovi qui: Univ. Federico II | ||
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Fourth International Symposium on Quality Electronic Design : proceedings : 24-26 March, 2003, San Jose, California |
Pubbl/distr/stampa | [Place of publication not identified], : IEEE Computer Society, 2003 |
Disciplina | 621.39/5 |
Soggetto topico |
Integrated circuits - Very large scale integration - Reliability
Integrated circuits - Very large scale integration - Design and construction Integrated circuits - Computer-aided design - Very large scale integration Integrated circuits - Very large scale integration - Quality control - Testing Electrical & Computer Engineering Engineering & Applied Sciences Electrical Engineering |
Formato | Materiale a stampa |
Livello bibliografico | Monografia |
Lingua di pubblicazione | eng |
Record Nr. | UNISA-996217941903316 |
[Place of publication not identified], : IEEE Computer Society, 2003 | ||
Materiale a stampa | ||
Lo trovi qui: Univ. di Salerno | ||
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Fourth International Symposium on Quality Electronic Design : proceedings : 24-26 March, 2003, San Jose, California |
Pubbl/distr/stampa | [Place of publication not identified], : IEEE Computer Society, 2003 |
Disciplina | 621.39/5 |
Soggetto topico |
Integrated circuits - Very large scale integration - Reliability
Integrated circuits - Very large scale integration - Design and construction Integrated circuits - Computer-aided design - Very large scale integration Integrated circuits - Very large scale integration - Quality control - Testing Electrical & Computer Engineering Engineering & Applied Sciences Electrical Engineering |
Formato | Materiale a stampa |
Livello bibliografico | Monografia |
Lingua di pubblicazione | eng |
Record Nr. | UNINA-9910872441303321 |
[Place of publication not identified], : IEEE Computer Society, 2003 | ||
Materiale a stampa | ||
Lo trovi qui: Univ. Federico II | ||
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Soft error reliability of VLSI circuits : analysis and mitigation techniques / / Behnam Ghavami, Mohsen Raji |
Autore | Ghavami Behnam |
Edizione | [1st ed. 2021.] |
Pubbl/distr/stampa | Cham, Switzerland : , : Springer, , [2021] |
Descrizione fisica | 1 online resource (XIII, 114 p. 39 illus., 9 illus. in color.) |
Disciplina | 621.3815 |
Soggetto topico |
Integrated circuits - Very large scale integration - Reliability
Electronic circuits |
ISBN | 3-030-51610-5 |
Formato | Materiale a stampa |
Livello bibliografico | Monografia |
Lingua di pubblicazione | eng |
Nota di contenuto | Introduction: Soft Error Modeling -- Soft Error Rate Estimation of VLSI circuits -- Process Variation Aware Soft Error Rate Estimation Method for Integrated Circuits -- GPU-Accelerated Soft Error Rate Analysis of Large-scale Integrated Circuits -- FPGA Hardware Acceleration of Soft Error Rate Estimation of Digital Circuits -- Soft Error Tolerant Circuit Design using Partitioning-based Gate Sizing -- Resynthesize Technique for Soft Error Tolerant Design of Combinational Circuits. |
Record Nr. | UNINA-9910483991603321 |
Ghavami Behnam | ||
Cham, Switzerland : , : Springer, , [2021] | ||
Materiale a stampa | ||
Lo trovi qui: Univ. Federico II | ||
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