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Compact models for integrated circuit design : conventional transistors and beyond / / Samar K. Saha
| Compact models for integrated circuit design : conventional transistors and beyond / / Samar K. Saha |
| Autore | Saha Samar K. |
| Edizione | [1st edition] |
| Pubbl/distr/stampa | Boca Raton : , : CRC Press, , [2016] |
| Descrizione fisica | 1 online resource (537 p.) |
| Disciplina | 621.3/815 |
| Soggetto topico |
Integrated circuits - Mathematical models
Integrated circuits - Computer-aided design |
| Soggetto genere / forma | Electronic books. |
| ISBN |
1-351-83107-0
1-315-21518-7 1-4822-4067-X |
| Formato | Materiale a stampa  |
| Livello bibliografico | Monografia |
| Lingua di pubblicazione | eng |
| Nota di contenuto | 1. Introduction to compact models -- 2. Review of basic device physics -- 3. Metal-oxide-semiconductor system -- 4. Large geometry MOSFET compact models -- 5. Compact models for small geometry MOSFETs -- 6. MOSFET capacitance models -- 7. Compact MOSFET models for RF applications -- 8. Modeling process variability in scaled MOSFETs -- 9. Compact models for ultrathin body FETs -- 10. Beyond-CMOS transistor models : tunnel FETs -- 11. Bipolar junction transistor compact models -- 12. Compact model library for circuit simulation. |
| Record Nr. | UNINA-9910311932903321 |
Saha Samar K.
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| Boca Raton : , : CRC Press, , [2016] | ||
| Materiale a stampa | ||
| Lo trovi qui: Univ. Federico II | ||
| ||
Compact models for integrated circuit design : conventional transistors and beyond / / Samar K. Saha
| Compact models for integrated circuit design : conventional transistors and beyond / / Samar K. Saha |
| Autore | Saha Samar K. |
| Edizione | [1st edition] |
| Pubbl/distr/stampa | Boca Raton, Florida : , : CRC Press, Taylor & Francis Group, , [2016] |
| Descrizione fisica | 1 online resource (537 p.) |
| Disciplina | 621.3815 |
| Soggetto topico |
Integrated circuits - Mathematical models
Integrated circuits - Computer-aided design |
| ISBN |
1-351-83107-0
1-315-21518-7 1-4822-4067-X |
| Formato | Materiale a stampa |
| Livello bibliografico | Monografia |
| Lingua di pubblicazione | eng |
| Nota di contenuto | 1. Introduction to compact models -- 2. Review of basic device physics -- 3. Metal-oxide-semiconductor system -- 4. Large geometry MOSFET compact models -- 5. Compact models for small geometry MOSFETs -- 6. MOSFET capacitance models -- 7. Compact MOSFET models for RF applications -- 8. Modeling process variability in scaled MOSFETs -- 9. Compact models for ultrathin body FETs -- 10. Beyond-CMOS transistor models : tunnel FETs -- 11. Bipolar junction transistor compact models -- 12. Compact model library for circuit simulation. |
| Record Nr. | UNINA-9910633952003321 |
|
Saha Samar K.
|
||
| Boca Raton, Florida : , : CRC Press, Taylor & Francis Group, , [2016] | ||
| Materiale a stampa | ||
| Lo trovi qui: Univ. Federico II | ||
| ||
Constraint solving over multi-valued logics [[electronic resource] ] : application to digital circuits / / Francisco Azevedo
| Constraint solving over multi-valued logics [[electronic resource] ] : application to digital circuits / / Francisco Azevedo |
| Autore | Azevedo Francisco |
| Pubbl/distr/stampa | Amsterdam ; ; Oxford, : IOS Press, c2003 |
| Descrizione fisica | 1 online resource (223 p.) |
| Disciplina | 621.395 |
| Collana | Frontiers in artificial intelligence and applications,Dissertations in artificial intelligence |
| Soggetto topico |
Integrated circuits - Mathematical models
Digital electronics |
| Soggetto genere / forma | Electronic books. |
| ISBN |
1-280-50577-X
1-60129-412-3 600-00-0377-3 9786610505777 |
| Formato | Materiale a stampa |
| Livello bibliografico | Monografia |
| Lingua di pubblicazione | eng |
| Record Nr. | UNINA-9910455984003321 |
|
Azevedo Francisco
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||
| Amsterdam ; ; Oxford, : IOS Press, c2003 | ||
| Materiale a stampa | ||
| Lo trovi qui: Univ. Federico II | ||
| ||
Constraint solving over multi-valued logics [[electronic resource] ] : application to digital circuits / / Francisco Azevedo
| Constraint solving over multi-valued logics [[electronic resource] ] : application to digital circuits / / Francisco Azevedo |
| Autore | Azevedo Francisco |
| Pubbl/distr/stampa | Amsterdam ; ; Oxford, : IOS Press, c2003 |
| Descrizione fisica | 1 online resource (223 p.) |
| Disciplina | 621.395 |
| Collana | Frontiers in artificial intelligence and applications,Dissertations in artificial intelligence |
| Soggetto topico |
Integrated circuits - Mathematical models
Digital electronics |
| ISBN |
1-280-50577-X
1-60129-412-3 600-00-0377-3 9786610505777 |
| Formato | Materiale a stampa |
| Livello bibliografico | Monografia |
| Lingua di pubblicazione | eng |
| Record Nr. | UNINA-9910780287803321 |
|
Azevedo Francisco
|
||
| Amsterdam ; ; Oxford, : IOS Press, c2003 | ||
| Materiale a stampa | ||
| Lo trovi qui: Univ. Federico II | ||
| ||
Constraint solving over multi-valued logics [[electronic resource] ] : application to digital circuits / / Francisco Azevedo
| Constraint solving over multi-valued logics [[electronic resource] ] : application to digital circuits / / Francisco Azevedo |
| Autore | Azevedo Francisco |
| Edizione | [1st ed.] |
| Pubbl/distr/stampa | Amsterdam ; ; Oxford, : IOS Press, c2003 |
| Descrizione fisica | 1 online resource (223 p.) |
| Disciplina | 621.395 |
| Collana | Frontiers in artificial intelligence and applications,Dissertations in artificial intelligence |
| Soggetto topico |
Integrated circuits - Mathematical models
Digital electronics |
| ISBN |
1-280-50577-X
1-60129-412-3 600-00-0377-3 9786610505777 |
| Formato | Materiale a stampa |
| Livello bibliografico | Monografia |
| Lingua di pubblicazione | eng |
| Nota di contenuto |
Cover -- Title page -- Table of Contents -- Chapter 1. Introduction -- 1.1 Scope -- 1.2 Truth Maintenance Systems -- 1.3 Constraint Reasoning -- 1.3.1 Consistency Techniques -- 1.3.2 Maintaining Consistency -- 1.3.3 Advanced Techniques -- 1.4 Contributions and Limitations -- 1.4.1 Limitations -- 1.5 Overview -- Chapter 2. Circuit Modelling -- 2.1 Introduction -- 2.2 Logic Simulation -- 2.3 Fault Modelling -- 2.4 Benchmarks -- 2.5 Our Modelling Approach -- 2.6 Summary -- Chapter 3. Test Patterns -- 3.1 What are Test Patterns? -- 3.2 Test Generation -- 3.3 TG Modelling Approaches and Algorithms -- 3.3.1 Algebraic Models / Algorithms -- 3.3.2 Topological Methods -- 3.3.3 Multi-valued Logics -- 3.3.4 TG Specialised Algorithms -- 3.4 Constraint Reasoning -- 3.4.1 CLP(B) -- 3.4.2 CLP(FD) -- 3.5 Heuristics -- 3.5.1 Discussion and Potential Improvements -- 3.6 Iterative Time-Bounded Search -- 3.6.1 Conclusion -- 3.7 Summary -- Chapter 4. Differential Diagnosis -- 4.1 Introduction -- 4.2 Diagnosis Approaches -- 4.3 Differential Diagnosis and Test Patterns -- 4.4 The 8-valued Logic -- 4.4.1 Boolean operations -- 4.4.2 Modelling Alternative Diagnostic Theories in Digital Circuits -- 4.5 A 4-valued Logic for Differentiation -- 4.6 A Constraint Solver for the 8-Valued Logic -- 4.6.1 Domain Representation -- 4.6.2 Not-Gates -- 4.6.3 Xor-Gates -- 4.6.4 Normal And-Gates -- 4.6.5 S-Buffers -- 4.6.6 Heuristics to Find Differential Patterns_ -- 4.7 Benchmarks -- 4.7.1 Generating a Benchmark -- 4.7.2 Set of Benchmarks Used -- 4.8 Differentiating Multiple Diagnoses -- 4.9 Experimental Results -- 4.9.1 Choosing the Heuristic -- 4.9.2 Discussion -- 4.9.3 Complete Results -- 4.9.4 Comparison of Results and Approaches -- 4.10 Conclusions -- Chapter 5. Problems with Multiple Diagnoses -- 5.1 Satisfaction Problems -- 5.1.1 Fault Simulation -- 5.1.2 Test Generation.
5.1.3 Fault Covering -- 5.1.4 Covered Diagnoses -- 5.1.5 Diagnosis -- 5.1.6 Fault Location -- 5.2 Optimisation Problems -- 5.2.1 Minimal Set of Test Patterns -- 5.2.2 Maximal Test Patterns -- 5.2.3 Minimal Diagnosis -- 5.2.4 Maximal Fault Resolution -- 5.3 Logic over Booleans and Sets -- 5.3.1 Signal Representation -- 5.3.2 Normal Gates -- 5.3.3 S-Buffers -- 5.4 Modelling and Solving -- 5.4.1 Diagnosis -- 5.4.2 Differentiation -- 5.4.3 Optimisation Problems -- 5.5 Reduction to Set Algebra -- 5.5.1 Motivation -- 5.5.2 Transformation -- 5.5.3 Modelling -- 5.6 Summary -- Chapter 6. A New Set Constraint Solver: Cardinal -- 6.1 Set Constraint Solving and Cardinality Inferences -- 6.2 Intervals and Lattices -- 6.3 Operational Semantics -- 6.3.1 Set Variable -- 6.3.2 Membership Constraints -- 6.3.3 Set Complement -- 6.3.4 Set Equality -- 6.3.5 Set Inequality -- 6.3.6 Disjointness -- 6.3.7 Set Inclusion -- 6.3.8 Set Intersection -- 6.3.9 Set Union -- 6.3.10 Set Difference -- 6.4 Implementation -- 6.4.1 Set Labelling -- 6.5 Results -- 6.6 Other Applications -- 6.6.1 Steiner Triples -- 6.6.2 Golfers -- 6.6.3 Warehouse -- 6.6.4 Differential Diagnosis -- 6.7 Cardinal Extensions -- 6.7.1 Sets Union -- 6.7.2 Generalisation to Sets Functions -- 6.7.3 Set Covering -- 6.7.4 Results -- 6.7.5 Future Research -- 6.8 Conclusions -- Chapter 7. Test Pattern Optimisation -- 7.1 Description -- 7.2 SAT Approach -- 7.3 5-valued Logic -- 7.4 Completeness -- 7.5 Naming Unspecified Values for an Extended Logic -- 7.5.1 Fault Detection Conditions -- 7.6 Local Search -- 7.6.1 A Multiple Extended Logic for Local Search -- 7.6.2 Operational Semantics -- 7.6.3 Improving Local Search -- 7.6.4 Multiple unspecification -- 7.7 Solution Spaces -- 7.8 Combining Logics -- 7.9 Results -- 7.10 Conclusions -- Chapter 8. Generalisation, Discussion and Conclusion -- 8.1 Generalisation. 8.2 Conclusion and Research Directions -- References -- Appendix A: ISCAS Circuits -- Appendix B: Logics. |
| Record Nr. | UNINA-9910817922403321 |
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Azevedo Francisco
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||
| Amsterdam ; ; Oxford, : IOS Press, c2003 | ||
| Materiale a stampa | ||
| Lo trovi qui: Univ. Federico II | ||
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Wavelets in electromagnetics and device modeling / / George W. Pan
| Wavelets in electromagnetics and device modeling / / George W. Pan |
| Autore | Pan George W. <1944-> |
| Pubbl/distr/stampa | Hoboken, New Jersey : , : Wiley-Interscience, , 2003 |
| Descrizione fisica | 1 online resource (554 p.) |
| Disciplina |
621.3015152433
621.3815 |
| Collana | Wiley series in microwave and optical engineering |
| Soggetto topico |
Integrated circuits - Mathematical models
Wavelets (Mathematics) Electromagnetism - Mathematical models Electromagnetic theory |
| ISBN |
1-280-36654-0
9786610366545 0-470-35504-2 0-471-46094-X 0-471-43391-8 |
| Formato | Materiale a stampa |
| Livello bibliografico | Monografia |
| Lingua di pubblicazione | eng |
| Nota di contenuto | Preface. -- Notations and Mathematical Preliminaries. -- Intuitive Introduction to Wavelets. -- Basic Orthogonal Wavelet Theory. -- Wavelets in Boundary Integral Equations. -- Sampling Biorthogonal Time Domain Method (SBTD). -- Canonical Multiwavelets. -- Wavelets in Scattering and Radiation. -- Wavelets in Rough Surface Scattering. -- Wavelets in Packaging, Interconnects, and EMC. -- Wavelets in Nonlinear Semiconductor Devices. -- Index. |
| Altri titoli varianti | Wavelets in electromagnetics and device modelling |
| Record Nr. | UNINA-9910142499103321 |
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Pan George W. <1944->
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| Hoboken, New Jersey : , : Wiley-Interscience, , 2003 | ||
| Materiale a stampa | ||
| Lo trovi qui: Univ. Federico II | ||
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