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Accelerator Programming Using Directives [[electronic resource] ] : 6th International Workshop, WACCPD 2019, Denver, CO, USA, November 18, 2019, Revised Selected Papers / / edited by Sandra Wienke, Sridutt Bhalachandra
| Accelerator Programming Using Directives [[electronic resource] ] : 6th International Workshop, WACCPD 2019, Denver, CO, USA, November 18, 2019, Revised Selected Papers / / edited by Sandra Wienke, Sridutt Bhalachandra |
| Edizione | [1st ed. 2020.] |
| Pubbl/distr/stampa | Cham : , : Springer International Publishing : , : Imprint : Springer, , 2020 |
| Descrizione fisica | 1 online resource (170 pages) |
| Disciplina | 005.1 |
| Collana | Programming and Software Engineering |
| Soggetto topico |
Programming languages (Electronic computers)
Computer organization Microprogramming Input-output equipment (Computers) Logic design Programming Languages, Compilers, Interpreters Computer Systems Organization and Communication Networks Control Structures and Microprogramming Input/Output and Data Communications Logic Design |
| ISBN | 3-030-49943-X |
| Formato | Materiale a stampa  |
| Livello bibliografico | Monografia |
| Lingua di pubblicazione | eng |
| Record Nr. | UNISA-996418304403316 |
| Cham : , : Springer International Publishing : , : Imprint : Springer, , 2020 | ||
| Materiale a stampa | ||
| Lo trovi qui: Univ. di Salerno | ||
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Accelerator Programming Using Directives [[electronic resource] ] : 5th International Workshop, WACCPD 2018, Dallas, TX, USA, November 11-17, 2018, Proceedings / / edited by Sunita Chandrasekaran, Guido Juckeland, Sandra Wienke
| Accelerator Programming Using Directives [[electronic resource] ] : 5th International Workshop, WACCPD 2018, Dallas, TX, USA, November 11-17, 2018, Proceedings / / edited by Sunita Chandrasekaran, Guido Juckeland, Sandra Wienke |
| Edizione | [1st ed. 2019.] |
| Pubbl/distr/stampa | Cham : , : Springer International Publishing : , : Imprint : Springer, , 2019 |
| Descrizione fisica | 1 online resource (IX, 137 p. 61 illus., 43 illus. in color.) |
| Disciplina | 001.642 |
| Collana | Programming and Software Engineering |
| Soggetto topico |
Programming languages (Electronic computers)
Logic design Input-output equipment (Computers) Microprogramming Computer organization Programming Languages, Compilers, Interpreters Logic Design Input/Output and Data Communications Control Structures and Microprogramming Computer Systems Organization and Communication Networks |
| ISBN | 3-030-12274-3 |
| Formato | Materiale a stampa |
| Livello bibliografico | Monografia |
| Lingua di pubblicazione | eng |
| Record Nr. | UNISA-996466464703316 |
| Cham : , : Springer International Publishing : , : Imprint : Springer, , 2019 | ||
| Materiale a stampa | ||
| Lo trovi qui: Univ. di Salerno | ||
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Advances in Computer Systems Architecture [[electronic resource] ] : 9th Asia-Pacific Conference, ACSAC 2004, Beijing, China, September 7-9, 2004, Proceedings / / edited by Pen-Chung Yew, Jingling Xue
| Advances in Computer Systems Architecture [[electronic resource] ] : 9th Asia-Pacific Conference, ACSAC 2004, Beijing, China, September 7-9, 2004, Proceedings / / edited by Pen-Chung Yew, Jingling Xue |
| Edizione | [1st ed. 2004.] |
| Pubbl/distr/stampa | Berlin, Heidelberg : , : Springer Berlin Heidelberg : , : Imprint : Springer, , 2004 |
| Descrizione fisica | 1 online resource (XVIII, 602 p.) |
| Disciplina | 004.2/2 |
| Collana | Lecture Notes in Computer Science |
| Soggetto topico |
Architecture, Computer
Arithmetic and logic units, Computer Input-output equipment (Computers) Microprocessors Computer communication systems Computer System Implementation Arithmetic and Logic Structures Input/Output and Data Communications Register-Transfer-Level Implementation Computer Communication Networks Processor Architectures |
| ISBN | 3-540-30102-X |
| Formato | Materiale a stampa |
| Livello bibliografico | Monografia |
| Lingua di pubblicazione | eng |
| Nota di contenuto | Keynote Address I -- Some Real Observations on Virtual Machines -- Session 1A: Cache and Memory -- Replica Victim Caching to Improve Reliability of In-Cache Replication -- Efficient Victim Mechanism on Sector Cache Organization -- Cache Behavior Analysis of a Compiler-Assisted Cache Replacement Policy -- Modeling the Cache Behavior of Codes with Arbitrary Data-Dependent Conditional Structures -- Session 1B: Reconfigurable and Embedded Architectures -- A Configurable System-on-Chip Architecture for Embedded Devices -- An Auto-adaptative Reconfigurable Architecture for the Control -- Enhancing the Memory Performance of Embedded Systems with the Flexible Sequential and Random Access Memory -- Heuristic Algorithm for Reducing Mapping Sets of Hardware-Software Partitioning in Reconfigurable System -- Session 2A: Processor Architecture and Design I -- Architecture Design of a High-Performance 32-Bit Fixed-Point DSP -- TengYue-1: A High Performance Embedded SoC -- A Fault-Tolerant Single-Chip Multiprocessor -- Session 2B: Power and Energy Management -- Initial Experiences with Dreamy Memory and the RAMpage Memory Hierarchy -- dDVS: An Efficient Dynamic Voltage Scaling Algorithm Based on the Differential of CPU Utilization -- High Performance Microprocessor Design Methods Exploiting Information Locality and Data Redundancy for Lower Area Cost and Power Consumption -- Session 3A: Processor Architecture and Design II -- Dynamic Reallocation of Functional Units in Superscalar Processors -- Multiple-Dimension Scalable Adaptive Stream Architecture -- Impact of Register-Cache Bandwidth Variation on Processor Performance -- Session 3B: Compiler and Operating System Issues -- Exploiting Free Execution Slots on EPIC Processors for Efficient and Accurate Runtime Profiling -- Continuous Adaptive Object-Code Re-optimization Framework -- Initial Evaluation of a User-Level Device Driver Framework -- Keynote Address II -- A Generation Ahead of Microprocessor: Where Software Can Drive uArchitecture To? -- Session 4A: Application-Specific Systems -- A Cost-Effective Supersampling for Full Scene AntiAliasing -- A Simple Architectural Enhancement for Fast and Flexible Elliptic Curve Cryptography over Binary Finite Fields GF(2 m ) -- Scalable Design Framework for JPEG2000 System Architecture -- Real-Time Three Dimensional Vision -- Session 4B: Interconnection Networks -- A Router Architecture for QoS Capable Clusters -- Optimal Scheduling Algorithms in WDM Optical Interconnects with Limited Range Wavelength Conversion Capability -- Comparative Evaluation of Adaptive and Deterministic Routing in the OTIS-Hypercube -- A Two-Level On-Chip Bus System Based on Multiplexers -- Keynote Address III -- Make Computers Cheaper and Simpler -- Session 5A: Prediction Techniques -- A Low Power Branch Predictor to Selectively Access the BTB -- Static Techniques to Improve Power Efficiency of Branch Predictors -- Choice Predictor for Free -- Performance Impact of Different Data Value Predictors -- Session 5B: Parallel Architecture and Programming -- Heterogeneous Networks of Workstations -- Finding High Performance Solution in Reconfigurable Mesh-Connected VLSI Arrays -- Order Independent Transparency for Image Composition Parallel Rendering Machines -- An Authorization Architecture Oriented to Engineering and Scientific Computation in Grid Environments -- Session 6A: Microarchitecture Design and Evaluations -- Validating Word-Oriented Processors for Bit and Multi-word Operations -- Dynamic Fetch Engine for Simultaneous Multithreaded Processors -- A Novel Rename Register Architecture and Performance Analysis -- Session 6B: Memory and I/O Systems -- A New Hierarchy Cache Scheme Using RAM and Pagefile -- An Object-Oriented Data Storage System on Network-Attached Object Devices -- A Scalable and Adaptive Directory Scheme for Hardware Distributed Shared Memory -- Session 7A: Potpourri -- A Compiler-Assisted On-Chip Assigned-Signature Control Flow Checking -- A Floating Point Divider Performing IEEE Rounding and Quotient Conversion in Parallel -- Efficient Buffer Allocation for Asynchronous Linear Pipelines by Design Space Localization. |
| Record Nr. | UNISA-996465379503316 |
| Berlin, Heidelberg : , : Springer Berlin Heidelberg : , : Imprint : Springer, , 2004 | ||
| Materiale a stampa | ||
| Lo trovi qui: Univ. di Salerno | ||
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Advances in Computer Systems Architecture [[electronic resource] ] : 8th Asia-Pacific Conference, ACSAC 2003, Aizu-Wakamatsu, Japan, September 23-26, 2003, Proceedings / / edited by Amos Omondi, Stanislav Sedukhin
| Advances in Computer Systems Architecture [[electronic resource] ] : 8th Asia-Pacific Conference, ACSAC 2003, Aizu-Wakamatsu, Japan, September 23-26, 2003, Proceedings / / edited by Amos Omondi, Stanislav Sedukhin |
| Edizione | [1st ed. 2003.] |
| Pubbl/distr/stampa | Berlin, Heidelberg : , : Springer Berlin Heidelberg : , : Imprint : Springer, , 2003 |
| Descrizione fisica | 1 online resource (XIV, 410 p.) |
| Disciplina | 004.2/2 |
| Collana | Lecture Notes in Computer Science |
| Soggetto topico |
Architecture, Computer
Logic design Arithmetic and logic units, Computer Input-output equipment (Computers) Microprocessors Computer communication systems Computer System Implementation Logic Design Arithmetic and Logic Structures Input/Output and Data Communications Processor Architectures Computer Communication Networks |
| ISBN | 3-540-39864-3 |
| Formato | Materiale a stampa |
| Livello bibliografico | Monografia |
| Lingua di pubblicazione | eng |
| Nota di contenuto | How Can the Earth Simulator Impact on Human Activities -- Toward Architecting and Designing Novel Computers -- Designing Ultra-large Instruction Issue Windows -- Multi-threaded Microprocessors – Evolution or Revolution -- The Development of System Software for Parallel Supercomputers -- Asynchronous Bit-Serial Datapath for Object-Oriented Reconfigurable Architecture PCA -- Reconfigurable Logic: A Saviour for Experimental Computer Architecture Research -- Design and Implementation of Java Processors -- MOOSS: CPU Architecture with Memory Protection and Support for OOP -- Reducing Access Count to Register-Files through Operand Reuse -- SimAlpha Version 1.0: Simple and Readable Alpha Processor Simulator -- Towards an Asynchronous MIPS Processor -- On Implementing High Level Concurrency in Java -- Simultaneous MultiStreaming for Complexity-Effective VLIW Architectures -- A Novel Architecture for Genomic Sequence Searching and Alignment -- A Reconfigurable Multi-threaded Architecture Model -- Reconfigurable Instruction-Level Parallel Processor Architecture -- Mapping Applications to a Coarse Grain Reconfigurable System -- Packing with Boundary Constraints for a Reconfigurable Operating System -- Arithmetic Circuits Combining Residue and Signed-Digit Representations -- A New On-the-fly Summation Algorithm -- State Reordering for Low Power Combinational Logic -- User-Level Management of Kernel Memory -- Variable Radix Page Table: A Page Table for Modern Architectures -- L1 Cache and TLB Enhancements to the RAMpage Memory Hierarchy -- Legba: Fast Hardware Support for Fine-Grained Protection -- Live-Cache: Exploiting Data Redundancy to Reduce Leakage Energy in a Cache Subsystem -- Implementation of Fast Address-Space Switching and TLB Sharing on the StrongARM Processor -- Performance of the Achilles Router -- Latency Improvement in Virtual Multicasting -- A Router Architecture to Achieve Link Rate Throughput in Suburban Ad-hoc Networks. |
| Record Nr. | UNISA-996466063403316 |
| Berlin, Heidelberg : , : Springer Berlin Heidelberg : , : Imprint : Springer, , 2003 | ||
| Materiale a stampa | ||
| Lo trovi qui: Univ. di Salerno | ||
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Advances in Cryptology – CRYPTO 2018 [[electronic resource] ] : 38th Annual International Cryptology Conference, Santa Barbara, CA, USA, August 19–23, 2018, Proceedings, Part II / / edited by Hovav Shacham, Alexandra Boldyreva
| Advances in Cryptology – CRYPTO 2018 [[electronic resource] ] : 38th Annual International Cryptology Conference, Santa Barbara, CA, USA, August 19–23, 2018, Proceedings, Part II / / edited by Hovav Shacham, Alexandra Boldyreva |
| Edizione | [1st ed. 2018.] |
| Pubbl/distr/stampa | Cham : , : Springer International Publishing : , : Imprint : Springer, , 2018 |
| Descrizione fisica | 1 online resource (XV, 833 p. 113 illus.) |
| Disciplina | 005.82 |
| Collana | Security and Cryptology |
| Soggetto topico |
Data encryption (Computer science)
Software engineering Input-output equipment (Computers) Artificial intelligence Cryptology Software Engineering/Programming and Operating Systems Input/Output and Data Communications Artificial Intelligence |
| ISBN | 3-319-96881-5 |
| Formato | Materiale a stampa |
| Livello bibliografico | Monografia |
| Lingua di pubblicazione | eng |
| Nota di contenuto | Secure messaging -- Implementations and physical attacks prevention -- Authenticated and format-preserving encryption -- Cryptoanalysis -- Searchable encryption and differential privacy -- Secret sharing -- Encryption -- Symmetric cryptography -- Proofs of work and proofs of Stake -- Proof tools -- Key exchange -- Symmetric cryptoanalysis -- Hashes and random oracles -- Trapdoor functions -- Round optimal MPC -- Foundations -- Lattices -- Lattice-based ZK -- Efficient MPC -- Quantum cryptography -- MPC -- Garbling -- Information-theoretic MPC -- Oblivious transfer -- Non-malleable codes -- Zero knowledge -- Obfuscation. |
| Record Nr. | UNISA-996466468503316 |
| Cham : , : Springer International Publishing : , : Imprint : Springer, , 2018 | ||
| Materiale a stampa | ||
| Lo trovi qui: Univ. di Salerno | ||
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The Amazing Journey of Reason [[electronic resource] ] : from DNA to Artificial Intelligence / / by Mario Alemi
| The Amazing Journey of Reason [[electronic resource] ] : from DNA to Artificial Intelligence / / by Mario Alemi |
| Autore | Alemi Mario |
| Edizione | [1st ed. 2020.] |
| Pubbl/distr/stampa | Cham, : Springer Nature, 2020 |
| Descrizione fisica | 1 online resource (113) |
| Disciplina | 004.0151 |
| Collana | SpringerBriefs in Computer Science |
| Soggetto topico |
Computer science—Mathematics
Input-output equipment (Computers) Computer communication systems Operating systems (Computers) Algorithms Mathematical logic Math Applications in Computer Science Input/Output and Data Communications Computer Communication Networks Operating Systems Algorithm Analysis and Problem Complexity Mathematical Logic and Formal Languages |
| Soggetto non controllato |
Computer science
Computer science—Mathematics Input-output equipment (Computers) Computer communication systems Operating systems (Computers) Algorithms Mathematical logic |
| ISBN | 3-030-25962-5 |
| Formato | Materiale a stampa |
| Livello bibliografico | Monografia |
| Lingua di pubblicazione | eng |
| Record Nr. | UNISA-996465461103316 |
Alemi Mario
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| Cham, : Springer Nature, 2020 | ||
| Materiale a stampa | ||
| Lo trovi qui: Univ. di Salerno | ||
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The Amazing Journey of Reason [[electronic resource] ] : from DNA to Artificial Intelligence / / by Mario Alemi
| The Amazing Journey of Reason [[electronic resource] ] : from DNA to Artificial Intelligence / / by Mario Alemi |
| Autore | Alemi Mario |
| Edizione | [1st ed. 2020.] |
| Pubbl/distr/stampa | Cham, : Springer Nature, 2020 |
| Descrizione fisica | 1 online resource (113) |
| Disciplina | 004.0151 |
| Collana | SpringerBriefs in Computer Science |
| Soggetto topico |
Computer science—Mathematics
Input-output equipment (Computers) Computer communication systems Operating systems (Computers) Algorithms Mathematical logic Math Applications in Computer Science Input/Output and Data Communications Computer Communication Networks Operating Systems Algorithm Analysis and Problem Complexity Mathematical Logic and Formal Languages |
| Soggetto non controllato |
Computer science
Computer science—Mathematics Input-output equipment (Computers) Computer communication systems Operating systems (Computers) Algorithms Mathematical logic |
| ISBN | 3-030-25962-5 |
| Formato | Materiale a stampa |
| Livello bibliografico | Monografia |
| Lingua di pubblicazione | eng |
| Record Nr. | UNINA-9910366657903321 |
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Alemi Mario
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| Cham, : Springer Nature, 2020 | ||
| Materiale a stampa | ||
| Lo trovi qui: Univ. Federico II | ||
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Broadband Communications: Networks, Services, Applications, Future Directions [[electronic resource] ] : 1996 International Zurich Seminar on Digital Communications IZS'96, Zurich, Switzerland, February 21-23, 1996. Proceedings / / edited by Bernhard Plattner
| Broadband Communications: Networks, Services, Applications, Future Directions [[electronic resource] ] : 1996 International Zurich Seminar on Digital Communications IZS'96, Zurich, Switzerland, February 21-23, 1996. Proceedings / / edited by Bernhard Plattner |
| Edizione | [1st ed. 1996.] |
| Pubbl/distr/stampa | Berlin, Heidelberg : , : Springer Berlin Heidelberg : , : Imprint : Springer, , 1996 |
| Descrizione fisica | 1 online resource (XIV, 366 p.) |
| Disciplina | 621.382 |
| Collana | Lecture Notes in Computer Science |
| Soggetto topico |
Computer communication systems
Electrical engineering Coding theory Information theory Special purpose computers Input-output equipment (Computers) Computers Computer Communication Networks Communications Engineering, Networks Coding and Information Theory Special Purpose and Application-Based Systems Input/Output and Data Communications Models and Principles |
| ISBN | 3-540-49669-6 |
| Formato | Materiale a stampa |
| Livello bibliografico | Monografia |
| Lingua di pubblicazione | eng |
| Nota di contenuto | A path selection method in ATM using pre-computation -- Design and evaluation of distributed link and path restoration algorithms for ATM meshed networks -- Scalability enhancements for connection-oriented networks -- Fair queueing algorithms for packet scheduling in BISDN -- Burstiness bounds based multiplexing schemes for VBR video connections in the B-ISDN -- Implications of self-similarity for providing end-to-end QOS guarantees in high-speed networks: A framework of application level traffic modeling -- Multimedia call control: A centralized approach -- A generic concept for large-scale multicast -- On the potentials of forward error correction mechanisms applied to real-time services carried over B-ISDN -- Can self-similar traffic be modeled by Markovian processes? -- Modeling and analysis of MPEG video sources for performance evaluation of broadband integrated networks -- On the scalability of the demand-priority LAN a performance comparison to FDDI for multimedia scenarios -- A fast switch algorithm for ABR traffic to achieve max-min fairness -- Virtual partitioning by dynamic priorities: Fair and efficient resource-sharing by several services -- A performance study of the local fairness algorithm for the MetaRing MAC protocol -- Experiences with multimedia teleshopping applications over a broadband network — The project ESSAI -- Multimedia multipoint teleteaching over the European ATM pilot -- A universal scaling principle for ATM based connectionless servers -- The UMTS Mobility Server: A solution to support third generation mobility in ATM -- VSAT satellite networks providing ATM service -- Predictive congestion control for broadband satellite systems -- Single-frequency packet network using stack algorithm and multiple base stations -- Broadband access in RECIBA B-ISDN experimental platform -- LARNet, a wavelength division multiplexed network for broadband local access -- Design of a large ATM switch with trunk grouping -- End-to-end performance evaluation of datagram acceptance control in DQDB-ATM-DQDB CL network -- Comparison of Explicit Rate and Explicit Forward Congestion Indication Flow Control Schemes for ABR service. |
| Record Nr. | UNISA-996465573103316 |
| Berlin, Heidelberg : , : Springer Berlin Heidelberg : , : Imprint : Springer, , 1996 | ||
| Materiale a stampa | ||
| Lo trovi qui: Univ. di Salerno | ||
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Correct Hardware Design and Verification Methods [[electronic resource] ] : IFIP WG10.5 Advanced Research Working Conference, CHARME '95, Frankfurt, Germany, October 1995. Proceedings / / edited by Paolo Enrico Camurati, Hans Eveking
| Correct Hardware Design and Verification Methods [[electronic resource] ] : IFIP WG10.5 Advanced Research Working Conference, CHARME '95, Frankfurt, Germany, October 1995. Proceedings / / edited by Paolo Enrico Camurati, Hans Eveking |
| Edizione | [1st ed. 1995.] |
| Pubbl/distr/stampa | Berlin, Heidelberg : , : Springer Berlin Heidelberg : , : Imprint : Springer, , 1995 |
| Descrizione fisica | 1 online resource (X, 346 p.) |
| Disciplina | 621.39/5 |
| Collana | Lecture Notes in Computer Science |
| Soggetto topico |
Architecture, Computer
Electronics Microelectronics Input-output equipment (Computers) Software engineering Computer logic Computer System Implementation Electronics and Microelectronics, Instrumentation Input/Output and Data Communications Software Engineering Logics and Meanings of Programs |
| ISBN | 3-540-45516-7 |
| Formato | Materiale a stampa |
| Livello bibliografico | Monografia |
| Lingua di pubblicazione | eng |
| Nota di contenuto | What if model checking must be truly symbolic -- Automatic verification of the SCI cache coherence protocol -- Describing and verifying synchronous circuits with the Boyer-Moore theorem prover -- Problems encountered in the machine-assisted proof of hardware -- Formally embedding existing high level synthesis algorithms -- Formal design of a class of computers — its high stage: abstract microprogramming -- Symbolic analysis and verification of CPA descriptions -- A foundation for formal reuse of hardware -- State enumeration with abstract descriptions of state machines -- Transforming Boolean relations by symbolic encoding -- Design error diagnosis in sequential circuits -- Timing analysis of asynchronous circuits using timed automata -- Improved probabilistic verification by hash compaction -- Formal support for the ELLA hardware description language -- Verifying hardware components with JACK -- Language containment of non-deterministic ?-automata -- A partial-order approach to the verification of concurrent systems: Checking liveness properties -- Semantics of a verification-oriented subset of VHDL -- Reasoning about VHDL using operational and observational semantics -- A symbolic relation for a subset of VHDL'87 descriptions and its application to symbolic model checking. |
| Record Nr. | UNISA-996466103703316 |
| Berlin, Heidelberg : , : Springer Berlin Heidelberg : , : Imprint : Springer, , 1995 | ||
| Materiale a stampa | ||
| Lo trovi qui: Univ. di Salerno | ||
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Correct Hardware Design and Verification Methods [[electronic resource] ] : IFIP WG 10.2 Advanced Research Working Conference, CHARME'93, Arles, France, May 24-26, 1993. Proceedings / / edited by George J. Milne, Laurence Pierre
| Correct Hardware Design and Verification Methods [[electronic resource] ] : IFIP WG 10.2 Advanced Research Working Conference, CHARME'93, Arles, France, May 24-26, 1993. Proceedings / / edited by George J. Milne, Laurence Pierre |
| Edizione | [1st ed. 1993.] |
| Pubbl/distr/stampa | Berlin, Heidelberg : , : Springer Berlin Heidelberg : , : Imprint : Springer, , 1993 |
| Descrizione fisica | 1 online resource (IX, 275 p.) |
| Disciplina | 621.39/2 |
| Collana | Lecture Notes in Computer Science |
| Soggetto topico |
Computers
Computer hardware Microprogramming Arithmetic and logic units, Computer Computer memory systems Input-output equipment (Computers) Theory of Computation Computer Hardware Control Structures and Microprogramming Arithmetic and Logic Structures Memory Structures Input/Output and Data Communications |
| ISBN | 3-540-70655-0 |
| Formato | Materiale a stampa |
| Livello bibliografico | Monografia |
| Lingua di pubblicazione | eng |
| Nota di contenuto | A graph-based method for timing diagrams representation and verification -- A Petri Net approach for the analysis of VHDL descriptions -- Temporal analysis of time bounded digital systems -- Strongly-typed theory of structures and behaviours -- Verification and diagnosis of digital systems by ternary reasoning -- Logic verification of incomplete functions and design error location -- A methodology for system-level design for verifiability -- Algebraic models and the correctness of microprocessors -- Combining symbolic evaluation and object oriented approach for verifying processor-like architectures at the RT-level -- A theory of generic interpreters -- Towards verifying large(r) systems: A strategy and an experiment -- Advancements in symbolic traversal techniques -- Automatic verification of speed-independent circuit designs using the Circal system -- Correct compilation of specifications to deterministic asynchronous circuits -- DDD-FM9001: Derivation of a verified microprocessor -- Calculational derivation of a counter with bounded response time -- Towards a provably correct hardware implementation of occam -- Rewriting with constraints in T-ruby -- Embedding hardware verification within a commercial design framework -- An approach to formalization of data flow graphs. |
| Record Nr. | UNISA-996466086203316 |
| Berlin, Heidelberg : , : Springer Berlin Heidelberg : , : Imprint : Springer, , 1993 | ||
| Materiale a stampa | ||
| Lo trovi qui: Univ. di Salerno | ||
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