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16th International Conference on Information Technology-New Generations (ITNG 2019) / / edited by Shahram Latifi
16th International Conference on Information Technology-New Generations (ITNG 2019) / / edited by Shahram Latifi
Edizione [1st ed. 2019.]
Pubbl/distr/stampa Cham : , : Springer International Publishing : , : Imprint : Springer, , 2019
Descrizione fisica 1 online resource (611 pages)
Disciplina 004
006.7
Collana Advances in Intelligent Systems and Computing
Soggetto topico Application software
Signal processing
Image processing
Speech processing systems
Data structures (Computer science)
Computer input-output equipment
Information Systems Applications (incl. Internet)
Signal, Image and Speech Processing
Data Structures and Information Theory
Input/Output and Data Communications
ISBN 3-030-14070-9
Formato Materiale a stampa
Livello bibliografico Monografia
Lingua di pubblicazione eng
Nota di contenuto Networking and Wireless Communications -- Cybersecurity -- Data Mining -- Software Engineering -- High Performance Computing Architectures -- Computer Vision, HCI and Image Processing/Analysis -- Signal Processing, UAVs -- Health, Bioinformatics, Pattern Detection and Optimization -- Education, Applications and Systems -- Short Papers.
Record Nr. UNINA-9910337601303321
Cham : , : Springer International Publishing : , : Imprint : Springer, , 2019
Materiale a stampa
Lo trovi qui: Univ. Federico II
Opac: Controlla la disponibilità qui
Accelerator Programming Using Directives [[electronic resource] ] : 6th International Workshop, WACCPD 2019, Denver, CO, USA, November 18, 2019, Revised Selected Papers / / edited by Sandra Wienke, Sridutt Bhalachandra
Accelerator Programming Using Directives [[electronic resource] ] : 6th International Workshop, WACCPD 2019, Denver, CO, USA, November 18, 2019, Revised Selected Papers / / edited by Sandra Wienke, Sridutt Bhalachandra
Edizione [1st ed. 2020.]
Pubbl/distr/stampa Cham : , : Springer International Publishing : , : Imprint : Springer, , 2020
Descrizione fisica 1 online resource (170 pages)
Disciplina 005.1
Collana Programming and Software Engineering
Soggetto topico Programming languages (Electronic computers)
Computer organization
Microprogramming 
Input-output equipment (Computers)
Logic design
Programming Languages, Compilers, Interpreters
Computer Systems Organization and Communication Networks
Control Structures and Microprogramming
Input/Output and Data Communications
Logic Design
ISBN 3-030-49943-X
Formato Materiale a stampa
Livello bibliografico Monografia
Lingua di pubblicazione eng
Record Nr. UNISA-996418304403316
Cham : , : Springer International Publishing : , : Imprint : Springer, , 2020
Materiale a stampa
Lo trovi qui: Univ. di Salerno
Opac: Controlla la disponibilità qui
Accelerator Programming Using Directives : 6th International Workshop, WACCPD 2019, Denver, CO, USA, November 18, 2019, Revised Selected Papers / / edited by Sandra Wienke, Sridutt Bhalachandra
Accelerator Programming Using Directives : 6th International Workshop, WACCPD 2019, Denver, CO, USA, November 18, 2019, Revised Selected Papers / / edited by Sandra Wienke, Sridutt Bhalachandra
Edizione [1st ed. 2020.]
Pubbl/distr/stampa Cham : , : Springer International Publishing : , : Imprint : Springer, , 2020
Descrizione fisica 1 online resource (170 pages)
Disciplina 005.1
005.13
Collana Programming and Software Engineering
Soggetto topico Programming languages (Electronic computers)
Computer organization
Microprogramming
Computer input-output equipment
Logic design
Programming Languages, Compilers, Interpreters
Computer Systems Organization and Communication Networks
Control Structures and Microprogramming
Input/Output and Data Communications
Logic Design
ISBN 3-030-49943-X
Formato Materiale a stampa
Livello bibliografico Monografia
Lingua di pubblicazione eng
Record Nr. UNINA-9910409662003321
Cham : , : Springer International Publishing : , : Imprint : Springer, , 2020
Materiale a stampa
Lo trovi qui: Univ. Federico II
Opac: Controlla la disponibilità qui
Accelerator Programming Using Directives [[electronic resource] ] : 5th International Workshop, WACCPD 2018, Dallas, TX, USA, November 11-17, 2018, Proceedings / / edited by Sunita Chandrasekaran, Guido Juckeland, Sandra Wienke
Accelerator Programming Using Directives [[electronic resource] ] : 5th International Workshop, WACCPD 2018, Dallas, TX, USA, November 11-17, 2018, Proceedings / / edited by Sunita Chandrasekaran, Guido Juckeland, Sandra Wienke
Edizione [1st ed. 2019.]
Pubbl/distr/stampa Cham : , : Springer International Publishing : , : Imprint : Springer, , 2019
Descrizione fisica 1 online resource (IX, 137 p. 61 illus., 43 illus. in color.)
Disciplina 001.642
Collana Programming and Software Engineering
Soggetto topico Programming languages (Electronic computers)
Logic design
Input-output equipment (Computers)
Microprogramming 
Computer organization
Programming Languages, Compilers, Interpreters
Logic Design
Input/Output and Data Communications
Control Structures and Microprogramming
Computer Systems Organization and Communication Networks
ISBN 3-030-12274-3
Formato Materiale a stampa
Livello bibliografico Monografia
Lingua di pubblicazione eng
Record Nr. UNISA-996466464703316
Cham : , : Springer International Publishing : , : Imprint : Springer, , 2019
Materiale a stampa
Lo trovi qui: Univ. di Salerno
Opac: Controlla la disponibilità qui
Accelerator Programming Using Directives : 5th International Workshop, WACCPD 2018, Dallas, TX, USA, November 11-17, 2018, Proceedings / / edited by Sunita Chandrasekaran, Guido Juckeland, Sandra Wienke
Accelerator Programming Using Directives : 5th International Workshop, WACCPD 2018, Dallas, TX, USA, November 11-17, 2018, Proceedings / / edited by Sunita Chandrasekaran, Guido Juckeland, Sandra Wienke
Edizione [1st ed. 2019.]
Pubbl/distr/stampa Cham : , : Springer International Publishing : , : Imprint : Springer, , 2019
Descrizione fisica 1 online resource (IX, 137 p. 61 illus., 43 illus. in color.)
Disciplina 001.642
005.13
Collana Programming and Software Engineering
Soggetto topico Programming languages (Electronic computers)
Logic design
Computer input-output equipment
Microprogramming
Computer organization
Programming Languages, Compilers, Interpreters
Logic Design
Input/Output and Data Communications
Control Structures and Microprogramming
Computer Systems Organization and Communication Networks
ISBN 3-030-12274-3
Formato Materiale a stampa
Livello bibliografico Monografia
Lingua di pubblicazione eng
Record Nr. UNINA-9910337577103321
Cham : , : Springer International Publishing : , : Imprint : Springer, , 2019
Materiale a stampa
Lo trovi qui: Univ. Federico II
Opac: Controlla la disponibilità qui
Active Object Languages: Current Research Trends / / edited by Frank de Boer, Ferruccio Damiani, Reiner Hähnle, Einar Broch Johnsen, Eduard Kamburjan
Active Object Languages: Current Research Trends / / edited by Frank de Boer, Ferruccio Damiani, Reiner Hähnle, Einar Broch Johnsen, Eduard Kamburjan
Edizione [1st ed. 2024.]
Pubbl/distr/stampa Cham : , : Springer Nature Switzerland : , : Imprint : Springer, , 2024
Descrizione fisica 1 online resource (382 pages)
Disciplina 005.4
Collana Lecture Notes in Computer Science
Soggetto topico Computer programming
Microprogramming
Computer input-output equipment
Logic design
Computer networks
Microprocessors
Computer architecture
Programming Techniques
Control Structures and Microprogramming
Input/Output and Data Communications
Logic Design
Computer Communication Networks
Processor Architectures
Arquitectura d'ordinadors
Xarxes d'ordinadors
Equip perifèric
Programació (Ordinadors)
Estructura lògica
Microprocessadors
Soggetto genere / forma Llibres electrònics
ISBN 3-031-51060-7
Formato Materiale a stampa
Livello bibliografico Monografia
Lingua di pubblicazione eng
Nota di contenuto Active Objects based on Algebraic Effects -- Actor-based Designs for Distributed Self-organisation Programming -- Encore: Coda -- Bridging Between Active Objects: Multitier Programming for Distributed, Concurrent Systems -- A Survey of Actor-Like Programming Models for Serverless Computing -- Programming Language Implementations with Multiparty Session Types -- Modelling -- Integrated Timed Architectural Modeling/Execution Language -- Simulating User Journeys with Active Objects -- Actors Upgraded for Variability, Adaptability, and Determinism -- Analysis -- Integrating Data Privacy Compliance in Active Object Languages -- Context-aware Trace Contracts -- Type-Based Verification of Delegated Control in Hybrid Systems -- Enforced Dependencies for Active Objects.
Record Nr. UNINA-9910806197803321
Cham : , : Springer Nature Switzerland : , : Imprint : Springer, , 2024
Materiale a stampa
Lo trovi qui: Univ. Federico II
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Adaptive Identification of Acoustic Multichannel Systems Using Sparse Representations / / by Karim Helwani
Adaptive Identification of Acoustic Multichannel Systems Using Sparse Representations / / by Karim Helwani
Autore Helwani Karim
Edizione [1st ed. 2015.]
Pubbl/distr/stampa Cham : , : Springer International Publishing : , : Imprint : Springer, , 2015
Descrizione fisica 1 online resource (120 p.)
Disciplina 621.3822
Collana T-Labs Series in Telecommunication Services
Soggetto topico Signal processing
Image processing
Speech processing systems
Computer input-output equipment
Electrical engineering
Acoustics
Signal, Image and Speech Processing
Input/Output and Data Communications
Communications Engineering, Networks
ISBN 3-319-08954-4
Formato Materiale a stampa
Livello bibliografico Monografia
Lingua di pubblicazione eng
Nota di contenuto Introduction -- Fundamentals of Adaptive Filter Theory -- Spatio-Temporal Regularized Recursive Least Squares Algorithm -- Sparse Representation of Multichannel Acoustic Systems -- Unique System Identification from Projections -- Geometrical Constraints -- Acoustic Echo Suppression -- Conclusion.
Record Nr. UNINA-9910299851503321
Helwani Karim  
Cham : , : Springer International Publishing : , : Imprint : Springer, , 2015
Materiale a stampa
Lo trovi qui: Univ. Federico II
Opac: Controlla la disponibilità qui
Advances in Communication, Cloud, and Big Data : Proceedings of 2nd National Conference on CCB 2016 / / edited by Hiren Kumar Deva Sarma, Samarjeet Borah, Nitul Dutta
Advances in Communication, Cloud, and Big Data : Proceedings of 2nd National Conference on CCB 2016 / / edited by Hiren Kumar Deva Sarma, Samarjeet Borah, Nitul Dutta
Edizione [1st ed. 2019.]
Pubbl/distr/stampa Singapore : , : Springer Singapore : , : Imprint : Springer, , 2019
Descrizione fisica 1 online resource (XIII, 173 p. 47 illus.)
Disciplina 004.6
Collana Lecture Notes in Networks and Systems
Soggetto topico Electrical engineering
Big data
Computer input-output equipment
Communications Engineering, Networks
Big Data
Input/Output and Data Communications
ISBN 981-10-8911-6
Formato Materiale a stampa
Livello bibliografico Monografia
Lingua di pubblicazione eng
Nota di contenuto Chapter 1. Survey on Energy Efficient Routing Protocols in Wireless Sensor Networks using Game Theory -- Chapter 2. Design and Analysis of Optimum APSK Modulation Technique -- Chapter 3. Big Data Analytics in the Higher Education: Need of the future. Chapter 4. Land Capability Classification for Agriculture: GIS and Remote Sensing Approach: A Survey -- Chapter 5. Review on Vehicular Radar for Road Safety -- Chapter 6. Landmark Based Robot Navigation: A Paradigm Shift from Onboard Processing to Cloud -- Chapter 7. From Cognitive Psychology to Image Segmentation: A Change of Perspective -- Chapter 8. An Exploration in Perception Based Digital Media Processing: A Psychological Perspective -- Chapter 9. Converting and developing live website into a web content management system -- Chapter 10. A Review on Existing QoS Routing Protocols Based on Link Efficiency and Link Stability -- Chapter 11. A Diamond Shaped Fractal Bow-Tie Antenna for THz Applications -- Chapter 12. A Study on Few Approaches to Counter Security Breaches in MANETs -- Chapter 13. A Survey: EMG Signal Based Controller as Human Computer Interaction -- Chapter 14 [CCB 1622-] IEEE 802.15.4 as the MAC protocol for Internet of Things (IoT) Applications for achieving QoS and Energy Efficiency -- Chapter 15. HMM Based Speaker Gender Recognition for Bodo Language -- Chapter 16. Accurate Drainage Network Extraction From Satellite Imagery –a Survey -- Chapter 17. Survey on Transmission Control Protocol Performance over different Mobile Ad-Hoc Routing Protocols -- Chapter 18 -- Survey on detection and mitigation of Distributed Denial of Service attack in named data networking.
Record Nr. UNINA-9910337626703321
Singapore : , : Springer Singapore : , : Imprint : Springer, , 2019
Materiale a stampa
Lo trovi qui: Univ. Federico II
Opac: Controlla la disponibilità qui
Advances in Computer Systems Architecture [[electronic resource] ] : 12th Asia-Pacific Conference, ACSAC 2007, Seoul, Korea, August 23-25, 2007, Proceedings / / edited by Lynn Choi, Yunheung Paek, Sangyeun Cho
Advances in Computer Systems Architecture [[electronic resource] ] : 12th Asia-Pacific Conference, ACSAC 2007, Seoul, Korea, August 23-25, 2007, Proceedings / / edited by Lynn Choi, Yunheung Paek, Sangyeun Cho
Edizione [1st ed. 2007.]
Pubbl/distr/stampa Berlin, Heidelberg : , : Springer Berlin Heidelberg : , : Imprint : Springer, , 2007
Descrizione fisica 1 online resource (XIII, 402 p.)
Disciplina 004
Collana Theoretical Computer Science and General Issues
Soggetto topico Computer systems
Computer arithmetic and logic units
Computer input-output equipment
Logic design
Computer networks
Microprocessors
Computer architecture
Computer System Implementation
Arithmetic and Logic Structures
Input/Output and Data Communications
Logic Design
Computer Communication Networks
Processor Architectures
ISBN 1-281-04270-6
9786611042707
3-540-74309-X
Formato Materiale a stampa
Livello bibliografico Monografia
Lingua di pubblicazione eng
Nota di contenuto A Compiler Framework for Supporting Speculative Multicore Processors -- Power-Efficient Heterogeneous Multicore Technology for Digital Convergence -- StarDBT: An Efficient Multi-platform Dynamic Binary Translation System -- Unbiased Branches: An Open Problem -- An Online Profile Guided Optimization Approach for Speculative Parallel Threading -- Entropy-Based Profile Characterization and Classification for Automatic Profile Management -- Laplace Transformation on the FT64 Stream Processor -- Towards Data Tiling for Whole Programs in Scratchpad Memory Allocation -- Evolution of NAND Flash Memory Interface -- FCC-SDP: A Fast Close-Coupled Shared Data Pool for Multi-core DSPs -- Exploiting Single-Usage for Effective Memory Management -- An Alternative Organization of Defect Map for Defect-Resilient Embedded On-Chip Memories -- An Effective Design of Master-Slave Operating System Architecture for Multiprocessor Embedded Systems -- Optimal Placement of Frequently Accessed IPs in Mesh NoCs -- An Efficient Link Controller for Test Access to IP Core-Based Embedded System Chips -- Performance of Keyword Connection Algorithm in Nested Mobility Networks -- Leakage Energy Reduction in Cache Memory by Software Self-invalidation -- Exploiting Task Temperature Profiling in Temperature-Aware Task Scheduling for Computational Clusters -- Runtime Performance Projection Model for Dynamic Power Management -- A Power-Aware Alternative for the Perceptron Branch Predictor -- Power Consumption and Performance Analysis of 3D NoCs -- A Design Methodology for Performance-Resource Optimization of a Generalized 2D Convolution Architecture with Quadrant Symmetric Kernels -- Bipartition Architecture for Low Power JPEG Huffman Decoder -- A SWP Specification for Sequential Image Processing Algorithms -- A Stream System-on-Chip Architecture for High Speed Target Recognition Based on Biologic Vision -- FPGA-Accelerated Active Shape Model for Real-Time People Tracking -- Performance Evaluation of Evolutionary Multi-core and Aggressively Multi-threaded Processor Architectures -- Synchronization Mechanisms on Modern Multi-core Architectures -- Concerning with On-Chip Network Features to Improve Cache Coherence Protocols for CMPs -- Generalized Wormhole Switching: A New Fault-Tolerant Mathematical Model for Adaptively Wormhole-Routed Interconnect Networks -- Open Issues in MPI Implementation -- Implicit Transactional Memory in Kilo-Instruction Multiprocessors -- Design of a Low–Power Embedded Processor Architecture Using Asynchronous Function Units -- A Bypass Mechanism to Enhance Branch Predictor for SMT Processors -- Thread Priority-Aware Random Replacement in TLBs for a High-Performance Real-Time SMT Processor -- Architectural Solution to Object-Oriented Programming.
Record Nr. UNISA-996465487703316
Berlin, Heidelberg : , : Springer Berlin Heidelberg : , : Imprint : Springer, , 2007
Materiale a stampa
Lo trovi qui: Univ. di Salerno
Opac: Controlla la disponibilità qui
Advances in Computer Systems Architecture : 12th Asia-Pacific Conference, ACSAC 2007, Seoul, Korea, August 23-25, 2007, Proceedings / / edited by Lynn Choi, Yunheung Paek, Sangyeun Cho
Advances in Computer Systems Architecture : 12th Asia-Pacific Conference, ACSAC 2007, Seoul, Korea, August 23-25, 2007, Proceedings / / edited by Lynn Choi, Yunheung Paek, Sangyeun Cho
Edizione [1st ed. 2007.]
Pubbl/distr/stampa Berlin, Heidelberg : , : Springer Berlin Heidelberg : , : Imprint : Springer, , 2007
Descrizione fisica 1 online resource (XIII, 402 p.)
Disciplina 004
Collana Theoretical Computer Science and General Issues
Soggetto topico Computer systems
Computer arithmetic and logic units
Computer input-output equipment
Logic design
Computer networks
Microprocessors
Computer architecture
Computer System Implementation
Arithmetic and Logic Structures
Input/Output and Data Communications
Logic Design
Computer Communication Networks
Processor Architectures
ISBN 1-281-04270-6
9786611042707
3-540-74309-X
Formato Materiale a stampa
Livello bibliografico Monografia
Lingua di pubblicazione eng
Nota di contenuto A Compiler Framework for Supporting Speculative Multicore Processors -- Power-Efficient Heterogeneous Multicore Technology for Digital Convergence -- StarDBT: An Efficient Multi-platform Dynamic Binary Translation System -- Unbiased Branches: An Open Problem -- An Online Profile Guided Optimization Approach for Speculative Parallel Threading -- Entropy-Based Profile Characterization and Classification for Automatic Profile Management -- Laplace Transformation on the FT64 Stream Processor -- Towards Data Tiling for Whole Programs in Scratchpad Memory Allocation -- Evolution of NAND Flash Memory Interface -- FCC-SDP: A Fast Close-Coupled Shared Data Pool for Multi-core DSPs -- Exploiting Single-Usage for Effective Memory Management -- An Alternative Organization of Defect Map for Defect-Resilient Embedded On-Chip Memories -- An Effective Design of Master-Slave Operating System Architecture for Multiprocessor Embedded Systems -- Optimal Placement of Frequently Accessed IPs in Mesh NoCs -- An Efficient Link Controller for Test Access to IP Core-Based Embedded System Chips -- Performance of Keyword Connection Algorithm in Nested Mobility Networks -- Leakage Energy Reduction in Cache Memory by Software Self-invalidation -- Exploiting Task Temperature Profiling in Temperature-Aware Task Scheduling for Computational Clusters -- Runtime Performance Projection Model for Dynamic Power Management -- A Power-Aware Alternative for the Perceptron Branch Predictor -- Power Consumption and Performance Analysis of 3D NoCs -- A Design Methodology for Performance-Resource Optimization of a Generalized 2D Convolution Architecture with Quadrant Symmetric Kernels -- Bipartition Architecture for Low Power JPEG Huffman Decoder -- A SWP Specification for Sequential Image Processing Algorithms -- A Stream System-on-Chip Architecture for High Speed Target Recognition Based on Biologic Vision -- FPGA-Accelerated Active Shape Model for Real-Time People Tracking -- Performance Evaluation of Evolutionary Multi-core and Aggressively Multi-threaded Processor Architectures -- Synchronization Mechanisms on Modern Multi-core Architectures -- Concerning with On-Chip Network Features to Improve Cache Coherence Protocols for CMPs -- Generalized Wormhole Switching: A New Fault-Tolerant Mathematical Model for Adaptively Wormhole-Routed Interconnect Networks -- Open Issues in MPI Implementation -- Implicit Transactional Memory in Kilo-Instruction Multiprocessors -- Design of a Low–Power Embedded Processor Architecture Using Asynchronous Function Units -- A Bypass Mechanism to Enhance Branch Predictor for SMT Processors -- Thread Priority-Aware Random Replacement in TLBs for a High-Performance Real-Time SMT Processor -- Architectural Solution to Object-Oriented Programming.
Record Nr. UNINA-9910484390303321
Berlin, Heidelberg : , : Springer Berlin Heidelberg : , : Imprint : Springer, , 2007
Materiale a stampa
Lo trovi qui: Univ. Federico II
Opac: Controlla la disponibilità qui