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Advanced Frequency Synthesis by Phase Lock / / William F. Egan
| Advanced Frequency Synthesis by Phase Lock / / William F. Egan |
| Autore | Egan William F. <1936-> |
| Pubbl/distr/stampa | Hoboken, New Jersey : , : Wiley, , c2011 |
| Descrizione fisica | 1 online resource (314 p.) |
| Disciplina | 621.3815486 |
| Soggetto topico |
Frequency synthesizers
Phase-locked loops |
| ISBN |
1-283-33753-3
9786613337535 1-118-17115-2 |
| Classificazione | TEC008010 |
| Formato | Materiale a stampa  |
| Livello bibliografico | Monografia |
| Lingua di pubblicazione | eng |
| Nota di contenuto | Frontmatter -- Introduction -- Fractional-N and Basic S? Synthesizers -- Other Spurious Reduction Techniques -- Defects in S? Synthesizers -- Other S? Architectures -- Simulation -- Diophantine Synthesizer -- Operation at Extreme Bandwidths -- All-Digital Frequency Synthesizers -- Appendix A: All Digital -- Appendix C: Fractional Cancellation -- Appendix E: Excess PPSD -- Appendix F: References to -- Appendix G: Using Gsmpl -- Appendix H: Sample-and-Hold Circuit -- Appendix L: Loop Response -- Appendix M: Mash PPSD -- Appendix N: Sampled Noise -- Appendix O: Oscillator Spectrums -- Appendix P: Phase Detectors -- Appendix Q: Quantization PPSD -- Appendix R: Reference Frequency Spurs -- Appendix S: Spectrum Analysis -- Appendix T: Toolboxes -- Appendix U: Noise Produced by Charge Pump Current Unbalance (Mismatch) -- Appendix W: Getting Files from the Wiley Internet Site -- Appendix X: Some Tables -- End Notes -- References -- Index. |
| Record Nr. | UNINA-9910139746003321 |
Egan William F. <1936->
|
||
| Hoboken, New Jersey : , : Wiley, , c2011 | ||
| Materiale a stampa | ||
| Lo trovi qui: Univ. Federico II | ||
| ||
Advanced Frequency Synthesis by Phase Lock / / William F. Egan
| Advanced Frequency Synthesis by Phase Lock / / William F. Egan |
| Autore | Egan William F. <1936-> |
| Pubbl/distr/stampa | Hoboken, New Jersey : , : Wiley, , c2011 |
| Descrizione fisica | 1 online resource (314 p.) |
| Disciplina | 621.3815486 |
| Soggetto topico |
Frequency synthesizers
Phase-locked loops |
| ISBN |
1-283-33753-3
9786613337535 1-118-17115-2 |
| Classificazione | TEC008010 |
| Formato | Materiale a stampa |
| Livello bibliografico | Monografia |
| Lingua di pubblicazione | eng |
| Nota di contenuto | Frontmatter -- Introduction -- Fractional-N and Basic S? Synthesizers -- Other Spurious Reduction Techniques -- Defects in S? Synthesizers -- Other S? Architectures -- Simulation -- Diophantine Synthesizer -- Operation at Extreme Bandwidths -- All-Digital Frequency Synthesizers -- Appendix A: All Digital -- Appendix C: Fractional Cancellation -- Appendix E: Excess PPSD -- Appendix F: References to -- Appendix G: Using Gsmpl -- Appendix H: Sample-and-Hold Circuit -- Appendix L: Loop Response -- Appendix M: Mash PPSD -- Appendix N: Sampled Noise -- Appendix O: Oscillator Spectrums -- Appendix P: Phase Detectors -- Appendix Q: Quantization PPSD -- Appendix R: Reference Frequency Spurs -- Appendix S: Spectrum Analysis -- Appendix T: Toolboxes -- Appendix U: Noise Produced by Charge Pump Current Unbalance (Mismatch) -- Appendix W: Getting Files from the Wiley Internet Site -- Appendix X: Some Tables -- End Notes -- References -- Index. |
| Record Nr. | UNINA-9910830729803321 |
|
Egan William F. <1936->
|
||
| Hoboken, New Jersey : , : Wiley, , c2011 | ||
| Materiale a stampa | ||
| Lo trovi qui: Univ. Federico II | ||
| ||
Advanced frequency synthesis by phase lock / / William F. Egan
| Advanced frequency synthesis by phase lock / / William F. Egan |
| Autore | Egan William F |
| Pubbl/distr/stampa | Hoboken, New Jersey, : Wiley, 2011 |
| Descrizione fisica | 1 online resource (314 p.) |
| Disciplina | 621.3815/486 |
| Soggetto topico |
Frequency synthesizers
Phase-locked loops |
| ISBN |
1-283-33753-3
9786613337535 1-118-17115-2 |
| Classificazione | TEC008010 |
| Formato | Materiale a stampa |
| Livello bibliografico | Monografia |
| Lingua di pubblicazione | eng |
| Nota di contenuto | Frontmatter -- Introduction -- Fractional-N and Basic S? Synthesizers -- Other Spurious Reduction Techniques -- Defects in S? Synthesizers -- Other S? Architectures -- Simulation -- Diophantine Synthesizer -- Operation at Extreme Bandwidths -- All-Digital Frequency Synthesizers -- Appendix A: All Digital -- Appendix C: Fractional Cancellation -- Appendix E: Excess PPSD -- Appendix F: References to -- Appendix G: Using Gsmpl -- Appendix H: Sample-and-Hold Circuit -- Appendix L: Loop Response -- Appendix M: Mash PPSD -- Appendix N: Sampled Noise -- Appendix O: Oscillator Spectrums -- Appendix P: Phase Detectors -- Appendix Q: Quantization PPSD -- Appendix R: Reference Frequency Spurs -- Appendix S: Spectrum Analysis -- Appendix T: Toolboxes -- Appendix U: Noise Produced by Charge Pump Current Unbalance (Mismatch) -- Appendix W: Getting Files from the Wiley Internet Site -- Appendix X: Some Tables -- End Notes -- References -- Index. |
| Record Nr. | UNINA-9910877676603321 |
|
Egan William F
|
||
| Hoboken, New Jersey, : Wiley, 2011 | ||
| Materiale a stampa | ||
| Lo trovi qui: Univ. Federico II | ||
| ||
Architectures for RF frequency synthesizers / / by Cicero S. Vaucher ; with a foreword by Bram Nauta
| Architectures for RF frequency synthesizers / / by Cicero S. Vaucher ; with a foreword by Bram Nauta |
| Edizione | [1st ed.] |
| Pubbl/distr/stampa | Boston, : Kluwer, 2002 |
| Descrizione fisica | 1 online resource (XXVI, 250 p. 27 illus.) |
| Disciplina | 621.3815/486 |
| Collana | The Kluwer international series in engineering and computer science |
| Soggetto topico |
Frequency synthesizers
Radio frequency oscillators Phase-locked loops Integrated circuits - Design and construction Radio frequency integrated circuits |
| ISBN | 0-306-47955-9 |
| Formato | Materiale a stampa |
| Livello bibliografico | Monografia |
| Lingua di pubblicazione | eng |
| Nota di contenuto | Tuning System Specifications -- Single-Loop Architectures -- Wide-Band Tuning System Architectures -- Adaptive PLL Architecture Combining High Spectral Purity and Fast Settling Time -- Architecture and Circuit Design of Programmable Dividers -- Conclusions. |
| Record Nr. | UNINA-9910812321703321 |
| Boston, : Kluwer, 2002 | ||
| Materiale a stampa | ||
| Lo trovi qui: Univ. Federico II | ||
| ||
Current-mode analog nonlinear function synthesizer structures / / Cosmin Radu Popa
| Current-mode analog nonlinear function synthesizer structures / / Cosmin Radu Popa |
| Autore | Popa Cosmin Radu |
| Edizione | [1st ed. 2013.] |
| Pubbl/distr/stampa | Cham, : Springer International, 2013 |
| Descrizione fisica | 1 online resource (xiv, 198 pages) : illustrations (some color) |
| Disciplina | 621.381 |
| Collana | Gale eBooks |
| Soggetto topico |
Frequency synthesizers
Signal processing |
| ISBN | 3-319-01035-2 |
| Formato | Materiale a stampa |
| Livello bibliografico | Monografia |
| Lingua di pubblicazione | eng |
| Nota di contenuto | Wide Output Dynamic Range Exponential Function Synthesizers -- Wide Output Dynamic Range Gaussian Function -- Hyperbolic Functions Synthesis -- Third Order Function Synthesizers -- Fourth-Order Function Synthesizers. |
| Record Nr. | UNINA-9910437921803321 |
|
Popa Cosmin Radu
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||
| Cham, : Springer International, 2013 | ||
| Materiale a stampa | ||
| Lo trovi qui: Univ. Federico II | ||
| ||
Frequency acquisition techniques for phase locked loop / / author Daniel Talbot
| Frequency acquisition techniques for phase locked loop / / author Daniel Talbot |
| Autore | Talbot Daniel (Daniel B.) |
| Pubbl/distr/stampa | Hoboken, New Jersey : , : John Wiley & Sons, Inc., , [2012] |
| Descrizione fisica | 1 online resource (238 p.) |
| Disciplina |
621.3815/486
621.382 |
| Soggetto topico |
Frequency synthesizers
Phase-locked loops |
| ISBN |
1-118-38330-3
1-283-59323-8 9786613905680 1-118-38331-1 |
| Formato | Materiale a stampa |
| Livello bibliografico | Monografia |
| Lingua di pubblicazione | eng |
| Nota di contenuto |
Preface xi -- 1 Introduction 1 -- 2 A Review of PLL Fundamentals 3 -- 2.1 What is a PLL?, 3 -- 2.2 Second-Order PLL, 7 -- 2.3 Second-Order PLL Type One, 7 -- 2.4 Second-Order PLL Type Two, 7 -- 2.5 Higher-Order PLL's, 8 -- 2.6 Disturbances, 8 -- 2.7 Frequency Steering and Capture, 9 -- 2.8 Effect of DC Offsets or Noise Prior to the Loop Filter, 10 -- 2.9 Injection-Locked Oscillations, 15 -- 3 Simulating the PLL Linear Operation Mode 17 -- 3.1 Linear Model, 17 -- 3.2 A Word About Damping, 19 -- 4 Sideband Suppression Filtering 21 -- 4.1 Reference Sidebands and VCO Pushing, 21 -- 4.2 Superiority of the Cauer (or Elliptical) Filter, 22 -- 5 Pros and Cons of Sampled Data Phase Detection 25 -- 5.1 What are the Forms of Sampled Data Phase Detectors?, 25 -- 5.2 A. Ramp and Sample Analog Phase Detector, 25 -- 5.3 B. The RF Sampling Phase Detector, 28 -- 5.4 C. Edge-Triggered S-R Flip-Flop, 29 -- 5.5 D. Edge-Triggered Flip-Flop Ensemble, 31 -- 5.6 E. Sample and Hold as a Phase Detector, 31 -- 6 Phase Compression 33 -- 7 Hard Limiting of a Signal Plus Noise 35 -- 8 Phase Noise and Other Spurious Interferers 39 -- 8.1 The Mechanism for Phase Noise in an Oscillator, 42 -- 8.2 Additive Noise in an FM Channel and the Bowtie, 42 -- 8.3 Importance of FM Theory to Frequency Acquisition, 45 -- 9 Impulse Modulation and Noise Aliasing 47 -- 9.1 Impulse Train Spectrum, 47 -- 9.2 Sampling Phase Detector Noise, 47 -- 9.3 Spur Aliasing, 50 -- 10 Time and Phase Jitter, Heterodyning, and Multiplication 53 -- 10.1 Heterodyning and Resulting Time Jitter, 53 -- 10.2 Frequency Multiplication and Angle Modulation Index, 54 -- 10.3 Frequency Multiplication's Role in Carrier Recovery, 54 -- 11 Carrier Recovery Applications and Acquisition 57 -- 11.1 Frequency Multiplier Carrier Recovery in General, 57 -- 11.2 The Simplest Form of Costas PLL, 59 -- 11.3 Higher Level Quadrature Demodulation Costas PLL, 61 -- 11.4 False Lock in BPSK Costas PLL, 62 -- 11.5 Additional Measures for Prevention of False Locking, 65.
11.6 False Lock Prevention Using DC Offset, 72 -- 12 Notes on Sweep Methods 73 -- 12.1 Sweep Waveform Superimposed Directly on VCO Input, 73 -- 12.2 Maximum Sweep Rate (Acceleration), 74 -- 12.3 False Lock due to High-Order Filtering, 77 -- 12.4 Sweep Waveform Applied Directly to PLL Loop Integrator, 79 -- 12.5 Self-Sweeping PLL, 79 -- 13 Nonsweep Acquisition Methods 85 -- 13.1 Delay Line Frequency Discriminator, 85 -- 13.2 The Fully Unbalanced Quadricorrelator, 87 -- 13.3 The Fully Balanced Quadricorrelator, 88 -- 13.4 The Multipulse Balanced Quadricorrelator, 89 -- 13.5 Conclusion Regarding Pulsed Frequency Detection, 91 -- 13.6 Quadricorrelator Linearity, 92 -- 13.7 Limiter Asymmetry due to DC Offset, 97 -- 13.8 Taylor Series Demonstrates Second-Order-Caused DC Offset, 100 -- 13.9 Third-Order Intermodulation Distortion and Taylor Series, 101 -- 14 AM Rejection in Frequency Detection Schemes 105 -- 14.1 AM Rejection with Limiter and Interferer, 105 -- 14.2 AM Rejection of the Balanced Limiter/Quadricorrelator Versus the Limiter/Discriminator in the Presence of a Single Spur, 106 -- 14.3 Impairment due to Filter Response Tilt (Asymmetry), 110 -- 14.4 Bandpass Filter Geometric and Arithmetic Symmetry, 114 -- 14.5 Comments on Degree of Scrutiny, 117 -- 15 Interfacing the Frequency Discriminator to the PLL 119 -- 15.1 Continuous Connection: Pros and Cons, 119 -- 15.2 Connection to PLL via a Dead Band, 120 -- 15.3 Switched Connection, 121 -- 16 Actual Frequency Discriminator Implementations 125 -- 16.1 Quadricorrelator, Low-Frequency Implementation, 125 -- 16.2 Frequency Ratio Calculating Circuit for Wide-Bandwidth Use, 128 -- 16.3 Dividing the Frequency and Resultant Implementation, 131 -- 16.4 Marriage of Both Frequency and Phaselock Loops, 135 -- 16.5 Comments on Spurs' Numerical Influence on the VCO, 141 -- 16.6 Frequency Compression, 143 -- 17 Clock Recovery Using a PLL 145 -- 17.1 PLL Only, 145 -- 17.2 PLL with Sideband Crystal Filter(s), 152 -- 17.3 PLL with Sideband Cavity Filter, 153. 17.4 The Hogge Phase Detector, 161 -- 17.5 Bang-Bang Phase Detectors, 162 -- 18 Frequency Synthesis Applications 165 -- 18.1 Direct Frequency Synthesis with Wadley Loop, 166 -- 18.2 Indirect Frequency Synthesis with PLLs, 173 -- 18.3 Simple Frequency Acquisition Improvement for a PLL, 175 -- 18.4 Hybrid Frequency Synthesis with DDS and PLL, 176 -- 18.5 Phase Noise Considerations, 181 -- 18.6 Pros and Cons of DDS-Augmented Synthesis, 185 -- 18.7 Multiple Loops, 185 -- 18.8 Reference Signal Considerations and Filtering, 186 -- 18.9 SNR of Various Phase Detectors, 187 -- 18.10 Phase Detector Dead Band (Dead Zone) and Remediation, 187 -- 18.11 Sideband Energy due to DC Offset Following Phase Detector, 191 -- 18.12 Brute Force PLL Frequency Acquisition via Speedup, 193 -- 18.13 Short-Term and Long-Term Settling, 193 -- 18.14 N-over-M Synthesis, 193 -- 19 Injection Pulling of Multiple VCO's as in a Serdes 195 -- 19.1 Allowable Coupling Between any Two VCOs Versus Q and BW, 195 -- 19.2 Topology Suggestion for Eliminating the Injection Pulling, 195 -- 20 Digital PLL Example 199 -- 21 Conclusion 203 -- References 205 -- Index 209. |
| Record Nr. | UNINA-9910141433803321 |
|
Talbot Daniel (Daniel B.)
|
||
| Hoboken, New Jersey : , : John Wiley & Sons, Inc., , [2012] | ||
| Materiale a stampa | ||
| Lo trovi qui: Univ. Federico II | ||
| ||
Frequency acquisition techniques for phase locked loop / / author Daniel Talbot
| Frequency acquisition techniques for phase locked loop / / author Daniel Talbot |
| Autore | Talbot Daniel (Daniel B.) |
| Pubbl/distr/stampa | Hoboken, New Jersey : , : John Wiley & Sons, Inc., , [2012] |
| Descrizione fisica | 1 online resource (238 p.) |
| Disciplina |
621.3815/486
621.382 |
| Soggetto topico |
Frequency synthesizers
Phase-locked loops |
| ISBN |
1-118-38330-3
1-283-59323-8 9786613905680 1-118-38331-1 |
| Formato | Materiale a stampa |
| Livello bibliografico | Monografia |
| Lingua di pubblicazione | eng |
| Nota di contenuto |
Preface xi -- 1 Introduction 1 -- 2 A Review of PLL Fundamentals 3 -- 2.1 What is a PLL?, 3 -- 2.2 Second-Order PLL, 7 -- 2.3 Second-Order PLL Type One, 7 -- 2.4 Second-Order PLL Type Two, 7 -- 2.5 Higher-Order PLL's, 8 -- 2.6 Disturbances, 8 -- 2.7 Frequency Steering and Capture, 9 -- 2.8 Effect of DC Offsets or Noise Prior to the Loop Filter, 10 -- 2.9 Injection-Locked Oscillations, 15 -- 3 Simulating the PLL Linear Operation Mode 17 -- 3.1 Linear Model, 17 -- 3.2 A Word About Damping, 19 -- 4 Sideband Suppression Filtering 21 -- 4.1 Reference Sidebands and VCO Pushing, 21 -- 4.2 Superiority of the Cauer (or Elliptical) Filter, 22 -- 5 Pros and Cons of Sampled Data Phase Detection 25 -- 5.1 What are the Forms of Sampled Data Phase Detectors?, 25 -- 5.2 A. Ramp and Sample Analog Phase Detector, 25 -- 5.3 B. The RF Sampling Phase Detector, 28 -- 5.4 C. Edge-Triggered S-R Flip-Flop, 29 -- 5.5 D. Edge-Triggered Flip-Flop Ensemble, 31 -- 5.6 E. Sample and Hold as a Phase Detector, 31 -- 6 Phase Compression 33 -- 7 Hard Limiting of a Signal Plus Noise 35 -- 8 Phase Noise and Other Spurious Interferers 39 -- 8.1 The Mechanism for Phase Noise in an Oscillator, 42 -- 8.2 Additive Noise in an FM Channel and the Bowtie, 42 -- 8.3 Importance of FM Theory to Frequency Acquisition, 45 -- 9 Impulse Modulation and Noise Aliasing 47 -- 9.1 Impulse Train Spectrum, 47 -- 9.2 Sampling Phase Detector Noise, 47 -- 9.3 Spur Aliasing, 50 -- 10 Time and Phase Jitter, Heterodyning, and Multiplication 53 -- 10.1 Heterodyning and Resulting Time Jitter, 53 -- 10.2 Frequency Multiplication and Angle Modulation Index, 54 -- 10.3 Frequency Multiplication's Role in Carrier Recovery, 54 -- 11 Carrier Recovery Applications and Acquisition 57 -- 11.1 Frequency Multiplier Carrier Recovery in General, 57 -- 11.2 The Simplest Form of Costas PLL, 59 -- 11.3 Higher Level Quadrature Demodulation Costas PLL, 61 -- 11.4 False Lock in BPSK Costas PLL, 62 -- 11.5 Additional Measures for Prevention of False Locking, 65.
11.6 False Lock Prevention Using DC Offset, 72 -- 12 Notes on Sweep Methods 73 -- 12.1 Sweep Waveform Superimposed Directly on VCO Input, 73 -- 12.2 Maximum Sweep Rate (Acceleration), 74 -- 12.3 False Lock due to High-Order Filtering, 77 -- 12.4 Sweep Waveform Applied Directly to PLL Loop Integrator, 79 -- 12.5 Self-Sweeping PLL, 79 -- 13 Nonsweep Acquisition Methods 85 -- 13.1 Delay Line Frequency Discriminator, 85 -- 13.2 The Fully Unbalanced Quadricorrelator, 87 -- 13.3 The Fully Balanced Quadricorrelator, 88 -- 13.4 The Multipulse Balanced Quadricorrelator, 89 -- 13.5 Conclusion Regarding Pulsed Frequency Detection, 91 -- 13.6 Quadricorrelator Linearity, 92 -- 13.7 Limiter Asymmetry due to DC Offset, 97 -- 13.8 Taylor Series Demonstrates Second-Order-Caused DC Offset, 100 -- 13.9 Third-Order Intermodulation Distortion and Taylor Series, 101 -- 14 AM Rejection in Frequency Detection Schemes 105 -- 14.1 AM Rejection with Limiter and Interferer, 105 -- 14.2 AM Rejection of the Balanced Limiter/Quadricorrelator Versus the Limiter/Discriminator in the Presence of a Single Spur, 106 -- 14.3 Impairment due to Filter Response Tilt (Asymmetry), 110 -- 14.4 Bandpass Filter Geometric and Arithmetic Symmetry, 114 -- 14.5 Comments on Degree of Scrutiny, 117 -- 15 Interfacing the Frequency Discriminator to the PLL 119 -- 15.1 Continuous Connection: Pros and Cons, 119 -- 15.2 Connection to PLL via a Dead Band, 120 -- 15.3 Switched Connection, 121 -- 16 Actual Frequency Discriminator Implementations 125 -- 16.1 Quadricorrelator, Low-Frequency Implementation, 125 -- 16.2 Frequency Ratio Calculating Circuit for Wide-Bandwidth Use, 128 -- 16.3 Dividing the Frequency and Resultant Implementation, 131 -- 16.4 Marriage of Both Frequency and Phaselock Loops, 135 -- 16.5 Comments on Spurs' Numerical Influence on the VCO, 141 -- 16.6 Frequency Compression, 143 -- 17 Clock Recovery Using a PLL 145 -- 17.1 PLL Only, 145 -- 17.2 PLL with Sideband Crystal Filter(s), 152 -- 17.3 PLL with Sideband Cavity Filter, 153. 17.4 The Hogge Phase Detector, 161 -- 17.5 Bang-Bang Phase Detectors, 162 -- 18 Frequency Synthesis Applications 165 -- 18.1 Direct Frequency Synthesis with Wadley Loop, 166 -- 18.2 Indirect Frequency Synthesis with PLLs, 173 -- 18.3 Simple Frequency Acquisition Improvement for a PLL, 175 -- 18.4 Hybrid Frequency Synthesis with DDS and PLL, 176 -- 18.5 Phase Noise Considerations, 181 -- 18.6 Pros and Cons of DDS-Augmented Synthesis, 185 -- 18.7 Multiple Loops, 185 -- 18.8 Reference Signal Considerations and Filtering, 186 -- 18.9 SNR of Various Phase Detectors, 187 -- 18.10 Phase Detector Dead Band (Dead Zone) and Remediation, 187 -- 18.11 Sideband Energy due to DC Offset Following Phase Detector, 191 -- 18.12 Brute Force PLL Frequency Acquisition via Speedup, 193 -- 18.13 Short-Term and Long-Term Settling, 193 -- 18.14 N-over-M Synthesis, 193 -- 19 Injection Pulling of Multiple VCO's as in a Serdes 195 -- 19.1 Allowable Coupling Between any Two VCOs Versus Q and BW, 195 -- 19.2 Topology Suggestion for Eliminating the Injection Pulling, 195 -- 20 Digital PLL Example 199 -- 21 Conclusion 203 -- References 205 -- Index 209. |
| Record Nr. | UNINA-9910830451403321 |
|
Talbot Daniel (Daniel B.)
|
||
| Hoboken, New Jersey : , : John Wiley & Sons, Inc., , [2012] | ||
| Materiale a stampa | ||
| Lo trovi qui: Univ. Federico II | ||
| ||
Frequency Acquisition Techniques for phase locked loops / / by Daniel B. Talbot
| Frequency Acquisition Techniques for phase locked loops / / by Daniel B. Talbot |
| Autore | Talbot Daniel (Daniel B.) |
| Pubbl/distr/stampa | Piscataway, NJ, : IEEE Press |
| Descrizione fisica | 1 online resource (238 p.) |
| Disciplina |
621.3815/486
621.382 |
| Soggetto topico |
Frequency synthesizers
Phase-locked loops |
| ISBN |
1-118-38330-3
1-283-59323-8 9786613905680 1-118-38331-1 |
| Formato | Materiale a stampa |
| Livello bibliografico | Monografia |
| Lingua di pubblicazione | eng |
| Nota di contenuto |
Preface xi -- 1 Introduction 1 -- 2 A Review of PLL Fundamentals 3 -- 2.1 What is a PLL?, 3 -- 2.2 Second-Order PLL, 7 -- 2.3 Second-Order PLL Type One, 7 -- 2.4 Second-Order PLL Type Two, 7 -- 2.5 Higher-Order PLL's, 8 -- 2.6 Disturbances, 8 -- 2.7 Frequency Steering and Capture, 9 -- 2.8 Effect of DC Offsets or Noise Prior to the Loop Filter, 10 -- 2.9 Injection-Locked Oscillations, 15 -- 3 Simulating the PLL Linear Operation Mode 17 -- 3.1 Linear Model, 17 -- 3.2 A Word About Damping, 19 -- 4 Sideband Suppression Filtering 21 -- 4.1 Reference Sidebands and VCO Pushing, 21 -- 4.2 Superiority of the Cauer (or Elliptical) Filter, 22 -- 5 Pros and Cons of Sampled Data Phase Detection 25 -- 5.1 What are the Forms of Sampled Data Phase Detectors?, 25 -- 5.2 A. Ramp and Sample Analog Phase Detector, 25 -- 5.3 B. The RF Sampling Phase Detector, 28 -- 5.4 C. Edge-Triggered S-R Flip-Flop, 29 -- 5.5 D. Edge-Triggered Flip-Flop Ensemble, 31 -- 5.6 E. Sample and Hold as a Phase Detector, 31 -- 6 Phase Compression 33 -- 7 Hard Limiting of a Signal Plus Noise 35 -- 8 Phase Noise and Other Spurious Interferers 39 -- 8.1 The Mechanism for Phase Noise in an Oscillator, 42 -- 8.2 Additive Noise in an FM Channel and the Bowtie, 42 -- 8.3 Importance of FM Theory to Frequency Acquisition, 45 -- 9 Impulse Modulation and Noise Aliasing 47 -- 9.1 Impulse Train Spectrum, 47 -- 9.2 Sampling Phase Detector Noise, 47 -- 9.3 Spur Aliasing, 50 -- 10 Time and Phase Jitter, Heterodyning, and Multiplication 53 -- 10.1 Heterodyning and Resulting Time Jitter, 53 -- 10.2 Frequency Multiplication and Angle Modulation Index, 54 -- 10.3 Frequency Multiplication's Role in Carrier Recovery, 54 -- 11 Carrier Recovery Applications and Acquisition 57 -- 11.1 Frequency Multiplier Carrier Recovery in General, 57 -- 11.2 The Simplest Form of Costas PLL, 59 -- 11.3 Higher Level Quadrature Demodulation Costas PLL, 61 -- 11.4 False Lock in BPSK Costas PLL, 62 -- 11.5 Additional Measures for Prevention of False Locking, 65.
11.6 False Lock Prevention Using DC Offset, 72 -- 12 Notes on Sweep Methods 73 -- 12.1 Sweep Waveform Superimposed Directly on VCO Input, 73 -- 12.2 Maximum Sweep Rate (Acceleration), 74 -- 12.3 False Lock due to High-Order Filtering, 77 -- 12.4 Sweep Waveform Applied Directly to PLL Loop Integrator, 79 -- 12.5 Self-Sweeping PLL, 79 -- 13 Nonsweep Acquisition Methods 85 -- 13.1 Delay Line Frequency Discriminator, 85 -- 13.2 The Fully Unbalanced Quadricorrelator, 87 -- 13.3 The Fully Balanced Quadricorrelator, 88 -- 13.4 The Multipulse Balanced Quadricorrelator, 89 -- 13.5 Conclusion Regarding Pulsed Frequency Detection, 91 -- 13.6 Quadricorrelator Linearity, 92 -- 13.7 Limiter Asymmetry due to DC Offset, 97 -- 13.8 Taylor Series Demonstrates Second-Order-Caused DC Offset, 100 -- 13.9 Third-Order Intermodulation Distortion and Taylor Series, 101 -- 14 AM Rejection in Frequency Detection Schemes 105 -- 14.1 AM Rejection with Limiter and Interferer, 105 -- 14.2 AM Rejection of the Balanced Limiter/Quadricorrelator Versus the Limiter/Discriminator in the Presence of a Single Spur, 106 -- 14.3 Impairment due to Filter Response Tilt (Asymmetry), 110 -- 14.4 Bandpass Filter Geometric and Arithmetic Symmetry, 114 -- 14.5 Comments on Degree of Scrutiny, 117 -- 15 Interfacing the Frequency Discriminator to the PLL 119 -- 15.1 Continuous Connection: Pros and Cons, 119 -- 15.2 Connection to PLL via a Dead Band, 120 -- 15.3 Switched Connection, 121 -- 16 Actual Frequency Discriminator Implementations 125 -- 16.1 Quadricorrelator, Low-Frequency Implementation, 125 -- 16.2 Frequency Ratio Calculating Circuit for Wide-Bandwidth Use, 128 -- 16.3 Dividing the Frequency and Resultant Implementation, 131 -- 16.4 Marriage of Both Frequency and Phaselock Loops, 135 -- 16.5 Comments on Spurs' Numerical Influence on the VCO, 141 -- 16.6 Frequency Compression, 143 -- 17 Clock Recovery Using a PLL 145 -- 17.1 PLL Only, 145 -- 17.2 PLL with Sideband Crystal Filter(s), 152 -- 17.3 PLL with Sideband Cavity Filter, 153. 17.4 The Hogge Phase Detector, 161 -- 17.5 Bang-Bang Phase Detectors, 162 -- 18 Frequency Synthesis Applications 165 -- 18.1 Direct Frequency Synthesis with Wadley Loop, 166 -- 18.2 Indirect Frequency Synthesis with PLLs, 173 -- 18.3 Simple Frequency Acquisition Improvement for a PLL, 175 -- 18.4 Hybrid Frequency Synthesis with DDS and PLL, 176 -- 18.5 Phase Noise Considerations, 181 -- 18.6 Pros and Cons of DDS-Augmented Synthesis, 185 -- 18.7 Multiple Loops, 185 -- 18.8 Reference Signal Considerations and Filtering, 186 -- 18.9 SNR of Various Phase Detectors, 187 -- 18.10 Phase Detector Dead Band (Dead Zone) and Remediation, 187 -- 18.11 Sideband Energy due to DC Offset Following Phase Detector, 191 -- 18.12 Brute Force PLL Frequency Acquisition via Speedup, 193 -- 18.13 Short-Term and Long-Term Settling, 193 -- 18.14 N-over-M Synthesis, 193 -- 19 Injection Pulling of Multiple VCO's as in a Serdes 195 -- 19.1 Allowable Coupling Between any Two VCOs Versus Q and BW, 195 -- 19.2 Topology Suggestion for Eliminating the Injection Pulling, 195 -- 20 Digital PLL Example 199 -- 21 Conclusion 203 -- References 205 -- Index 209. |
| Record Nr. | UNINA-9910877048803321 |
|
Talbot Daniel (Daniel B.)
|
||
| Piscataway, NJ, : IEEE Press | ||
| Materiale a stampa | ||
| Lo trovi qui: Univ. Federico II | ||
| ||
Frequency synthesizers : concept to product / / Alexander Chenakin
| Frequency synthesizers : concept to product / / Alexander Chenakin |
| Autore | Chenakin Alexander |
| Pubbl/distr/stampa | Boston : , : Artech House, , ©2011 |
| Descrizione fisica | 1 online resource (xv, 214 pages) : illustrations |
| Disciplina | 621.3815486 ‡2 23 |
| Collana | Artech House microwave library |
| Soggetto topico |
Frequency synthesizers
Frequency changers |
| Soggetto genere / forma | Electronic books. |
| ISBN | 1-59693-231-7 |
| Formato | Materiale a stampa |
| Livello bibliografico | Monografia |
| Lingua di pubblicazione | eng |
| Nota di contenuto | Parameters and architectures -- Building blocks -- Synthesizer construction -- Design process -- Improving performance -- Advanced functions. |
| Record Nr. | UNINA-9910458799503321 |
|
Chenakin Alexander
|
||
| Boston : , : Artech House, , ©2011 | ||
| Materiale a stampa | ||
| Lo trovi qui: Univ. Federico II | ||
| ||
Frequency synthesizers : concept to product / / Alexander Chenakin
| Frequency synthesizers : concept to product / / Alexander Chenakin |
| Autore | Chenakin Alexander |
| Pubbl/distr/stampa | Boston : , : Artech House, , ©2011 |
| Descrizione fisica | 1 online resource (xv, 214 pages) : illustrations |
| Collana | Artech House microwave library |
| Soggetto topico |
Frequency synthesizers
Frequency changers |
| ISBN | 1-59693-231-7 |
| Formato | Materiale a stampa |
| Livello bibliografico | Monografia |
| Lingua di pubblicazione | eng |
| Nota di contenuto | Parameters and architectures -- Building blocks -- Synthesizer construction -- Design process -- Improving performance -- Advanced functions. |
| Record Nr. | UNINA-9910785446303321 |
|
Chenakin Alexander
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| Boston : , : Artech House, , ©2011 | ||
| Materiale a stampa | ||
| Lo trovi qui: Univ. Federico II | ||
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