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2017 7th International Symposium on Embedded Computing and System Design : 18-20 December 2017, Durgapur, India / / IEEE ; co-sponsored by, VLSI Society of India
2017 7th International Symposium on Embedded Computing and System Design : 18-20 December 2017, Durgapur, India / / IEEE ; co-sponsored by, VLSI Society of India
Pubbl/distr/stampa Piscataway, New Jersey : , : Institute of Electrical and Electronics Engineers, , 2017
Descrizione fisica 1 online resource (48 pages)
Disciplina 004.21
Soggetto topico System design
Embedded computer systems - Design
ISBN 1-5386-3032-X
Formato Materiale a stampa
Livello bibliografico Monografia
Lingua di pubblicazione eng
Record Nr. UNISA-996279512303316
Piscataway, New Jersey : , : Institute of Electrical and Electronics Engineers, , 2017
Materiale a stampa
Lo trovi qui: Univ. di Salerno
Opac: Controlla la disponibilità qui
2017 7th International Symposium on Embedded Computing and System Design : 18-20 December 2017, Durgapur, India / / IEEE ; co-sponsored by, VLSI Society of India
2017 7th International Symposium on Embedded Computing and System Design : 18-20 December 2017, Durgapur, India / / IEEE ; co-sponsored by, VLSI Society of India
Pubbl/distr/stampa Piscataway, New Jersey : , : Institute of Electrical and Electronics Engineers, , 2017
Descrizione fisica 1 online resource (48 pages)
Disciplina 004.21
Soggetto topico System design
Embedded computer systems - Design
ISBN 1-5386-3032-X
Formato Materiale a stampa
Livello bibliografico Monografia
Lingua di pubblicazione eng
Record Nr. UNINA-9910262259703321
Piscataway, New Jersey : , : Institute of Electrical and Electronics Engineers, , 2017
Materiale a stampa
Lo trovi qui: Univ. Federico II
Opac: Controlla la disponibilità qui
2018 8th International Symposium on Embedded Computing and System Design : 13-15 December 2018, Cochin, India : Literatur der Repusik / / Institute of Electrical and Electronics Engineers
2018 8th International Symposium on Embedded Computing and System Design : 13-15 December 2018, Cochin, India : Literatur der Repusik / / Institute of Electrical and Electronics Engineers
Pubbl/distr/stampa Piscataway, New Jersey : , : Institute of Electrical and Electronics Engineers, , 2018
Descrizione fisica 1 online resource (109 pages)
Disciplina 004.21
Soggetto topico Embedded computer systems - Design
System design
ISBN 1-5386-6575-1
Formato Materiale a stampa
Livello bibliografico Monografia
Lingua di pubblicazione eng
Record Nr. UNINA-9910320959603321
Piscataway, New Jersey : , : Institute of Electrical and Electronics Engineers, , 2018
Materiale a stampa
Lo trovi qui: Univ. Federico II
Opac: Controlla la disponibilità qui
2018 8th International Symposium on Embedded Computing and System Design : 13-15 December 2018, Cochin, India : Literatur der Repusik / / Institute of Electrical and Electronics Engineers
2018 8th International Symposium on Embedded Computing and System Design : 13-15 December 2018, Cochin, India : Literatur der Repusik / / Institute of Electrical and Electronics Engineers
Pubbl/distr/stampa Piscataway, New Jersey : , : Institute of Electrical and Electronics Engineers, , 2018
Descrizione fisica 1 online resource (109 pages)
Disciplina 004.21
Soggetto topico Embedded computer systems - Design
System design
ISBN 1-5386-6575-1
Formato Materiale a stampa
Livello bibliografico Monografia
Lingua di pubblicazione eng
Record Nr. UNISA-996575386703316
Piscataway, New Jersey : , : Institute of Electrical and Electronics Engineers, , 2018
Materiale a stampa
Lo trovi qui: Univ. di Salerno
Opac: Controlla la disponibilità qui
Customizable embedded processors [[electronic resource] ] : design technologies and applications / / Paolo Ienne and Rainer Leupers [editors]
Customizable embedded processors [[electronic resource] ] : design technologies and applications / / Paolo Ienne and Rainer Leupers [editors]
Edizione [1st edition]
Pubbl/distr/stampa San Francisco, : Morgan Kaufmann
Descrizione fisica 1 online resource (527 p.)
Disciplina 621.392
Altri autori (Persone) IennePaolo
LeupersRainer
Collana The Morgan Kaufmann series in systems on silicon
Soggetto topico Embedded computer systems
Embedded computer systems - Design
Soggetto genere / forma Electronic books.
ISBN 1-281-00536-3
9786611005368
0-12-374645-0
0-08-049098-0
Formato Materiale a stampa
Livello bibliografico Monografia
Lingua di pubblicazione eng
Nota di contenuto Front Cover; Customizable Embedded Processors; Copyright Page; Contents; In Praise of Customizable Embedded Processors; List of Contributors; About the Editors; Part I: Opportunities and Challenges; Chapter 1. From Prêt-à-Porter to Tailor-Made; 1.1 The Call for Flexibility; 1.2 Cool Chips for Shallow Pockets; 1.3 A Million Processors for the Price of One?; 1.4 Processors Coming of Age; 1.5 This Book; 1.6 Travel Broadens the Mind; Chapter 2. Opportunities for Application-Specific Processors: The Case of Wireless Communications; 2.1 Future Mobile Communication Systems
2.2 Heterogeneous MPSoC for Digital Receivers2.3 ASIP Design; Chapter 3. Customizing Processors: Lofty Ambitions, Stark Realities; 3.1 The "CFP" project at HP Labs; 3.2 Searching for the Best Architecture Is Not a Machine-Only Endeavor; 3.3 Designing a CPU Core Still Takes a Very Long Time; 3.4 Don't Underestimate Competitive Technologies; 3.5 Software Developers Don't Always Help You; 3.6 The Embedded World Is Not Immune to Legacy Problems; 3.7 Customization Can Be Trouble; 3.8 Conclusions; Part II: Aspects of Processor Customization; Chapter 4. Architecture Description Languages
4.1 ADLs and other languages4.2 Survey of Contemporary ADLs; 4.3 Conclusions; Chapter 5. C Compiler Retargeting; 5.1 Compiler Construction Background; 5.2 Approaches to Retargetable Compilation; 5.3 Processor Architecture Exploration; 5.4 C Compiler Retargeting in the LISATek Platform; 5.5 Summary and Outlook; Chapter 6. Automated Processor Configuration and Instruction Extension; 6.1 Automation Is Essential for ASIP Proliferation; 6.2 The Tensilica Xtensa LX Configurable Processor; 6.3 Generating ASIPs Using Xtensa; 6.4 Automatic Generation of ASIP Specifications
6.5 Coding an Application for Automatic ASIP Generation6.6 XPRES Benchmarking Results; 6.7 Techniques for ASIP Generation; 6.8 Exploring the Design Space; 6.9 Evaluating Xpres Estimation Methods; 6.10 Conclusions and Future of the Technology; Chapter 7. Automatic Instruction-Set Extensions; 7.1 Beyond Traditional Compilers; 7.2 Building Block for Instruction Set Extension; 7.3 Heuristics; 7.4 State-Holding Instruction-Set Extensions; 7.5 Exploiting Pipelining to Relax I/O Constraints; 7.6 Conclusions and Further Challenges; Chapter 8. Challenges to Automatic Customization
8.1 The ARCompactTM Instruction Set Architecture8.2 Microarchitecture Challenges; 8.3 Case Study-Entropy Decoding; 8.4 Limitations of Automated Extension; 8.5 The Benefits of Architecture Extension; 8.6 Conclusions; Chapter 9. Coprocessor Generation from Executable Code; 9.1 Introduction; 9.2 User Level Flow; 9.3 Integration with Embedded Software; 9.4 Coprocessor Architecture; 9.5 ILP Extraction Challenges; 9.6 Internal Tool Flow; 9.7 Code Mapping Approach; 9.8 Synthesizing Coprocessor Architectures; 9.9 A Real-World Example; 9.10 Summary; Chapter 10. Datapath Synthesis; 10.1 Introduction
10.2 Custom Instruction Selection
Record Nr. UNINA-9910458611203321
San Francisco, : Morgan Kaufmann
Materiale a stampa
Lo trovi qui: Univ. Federico II
Opac: Controlla la disponibilità qui
Customizable embedded processors [[electronic resource] ] : design technologies and applications / / Paolo Ienne and Rainer Leupers [editors]
Customizable embedded processors [[electronic resource] ] : design technologies and applications / / Paolo Ienne and Rainer Leupers [editors]
Edizione [1st edition]
Pubbl/distr/stampa San Francisco, : Morgan Kaufmann
Descrizione fisica 1 online resource (527 p.)
Disciplina 621.392
Altri autori (Persone) IennePaolo
LeupersRainer
Collana The Morgan Kaufmann series in systems on silicon
Soggetto topico Embedded computer systems
Embedded computer systems - Design
ISBN 1-281-00536-3
9786611005368
0-12-374645-0
0-08-049098-0
Formato Materiale a stampa
Livello bibliografico Monografia
Lingua di pubblicazione eng
Nota di contenuto Front Cover; Customizable Embedded Processors; Copyright Page; Contents; In Praise of Customizable Embedded Processors; List of Contributors; About the Editors; Part I: Opportunities and Challenges; Chapter 1. From Prêt-à-Porter to Tailor-Made; 1.1 The Call for Flexibility; 1.2 Cool Chips for Shallow Pockets; 1.3 A Million Processors for the Price of One?; 1.4 Processors Coming of Age; 1.5 This Book; 1.6 Travel Broadens the Mind; Chapter 2. Opportunities for Application-Specific Processors: The Case of Wireless Communications; 2.1 Future Mobile Communication Systems
2.2 Heterogeneous MPSoC for Digital Receivers2.3 ASIP Design; Chapter 3. Customizing Processors: Lofty Ambitions, Stark Realities; 3.1 The "CFP" project at HP Labs; 3.2 Searching for the Best Architecture Is Not a Machine-Only Endeavor; 3.3 Designing a CPU Core Still Takes a Very Long Time; 3.4 Don't Underestimate Competitive Technologies; 3.5 Software Developers Don't Always Help You; 3.6 The Embedded World Is Not Immune to Legacy Problems; 3.7 Customization Can Be Trouble; 3.8 Conclusions; Part II: Aspects of Processor Customization; Chapter 4. Architecture Description Languages
4.1 ADLs and other languages4.2 Survey of Contemporary ADLs; 4.3 Conclusions; Chapter 5. C Compiler Retargeting; 5.1 Compiler Construction Background; 5.2 Approaches to Retargetable Compilation; 5.3 Processor Architecture Exploration; 5.4 C Compiler Retargeting in the LISATek Platform; 5.5 Summary and Outlook; Chapter 6. Automated Processor Configuration and Instruction Extension; 6.1 Automation Is Essential for ASIP Proliferation; 6.2 The Tensilica Xtensa LX Configurable Processor; 6.3 Generating ASIPs Using Xtensa; 6.4 Automatic Generation of ASIP Specifications
6.5 Coding an Application for Automatic ASIP Generation6.6 XPRES Benchmarking Results; 6.7 Techniques for ASIP Generation; 6.8 Exploring the Design Space; 6.9 Evaluating Xpres Estimation Methods; 6.10 Conclusions and Future of the Technology; Chapter 7. Automatic Instruction-Set Extensions; 7.1 Beyond Traditional Compilers; 7.2 Building Block for Instruction Set Extension; 7.3 Heuristics; 7.4 State-Holding Instruction-Set Extensions; 7.5 Exploiting Pipelining to Relax I/O Constraints; 7.6 Conclusions and Further Challenges; Chapter 8. Challenges to Automatic Customization
8.1 The ARCompactTM Instruction Set Architecture8.2 Microarchitecture Challenges; 8.3 Case Study-Entropy Decoding; 8.4 Limitations of Automated Extension; 8.5 The Benefits of Architecture Extension; 8.6 Conclusions; Chapter 9. Coprocessor Generation from Executable Code; 9.1 Introduction; 9.2 User Level Flow; 9.3 Integration with Embedded Software; 9.4 Coprocessor Architecture; 9.5 ILP Extraction Challenges; 9.6 Internal Tool Flow; 9.7 Code Mapping Approach; 9.8 Synthesizing Coprocessor Architectures; 9.9 A Real-World Example; 9.10 Summary; Chapter 10. Datapath Synthesis; 10.1 Introduction
10.2 Custom Instruction Selection
Record Nr. UNINA-9910784651103321
San Francisco, : Morgan Kaufmann
Materiale a stampa
Lo trovi qui: Univ. Federico II
Opac: Controlla la disponibilità qui
Customizable embedded processors : design technologies and applications / / Paolo Ienne and Rainer Leupers [editors]
Customizable embedded processors : design technologies and applications / / Paolo Ienne and Rainer Leupers [editors]
Edizione [1st edition]
Pubbl/distr/stampa San Francisco, : Morgan Kaufmann
Descrizione fisica 1 online resource (527 p.)
Disciplina 621.392
Altri autori (Persone) IennePaolo
LeupersRainer
Collana The Morgan Kaufmann series in systems on silicon
Soggetto topico Embedded computer systems
Embedded computer systems - Design
ISBN 1-281-00536-3
9786611005368
0-12-374645-0
0-08-049098-0
Formato Materiale a stampa
Livello bibliografico Monografia
Lingua di pubblicazione eng
Nota di contenuto Front Cover; Customizable Embedded Processors; Copyright Page; Contents; In Praise of Customizable Embedded Processors; List of Contributors; About the Editors; Part I: Opportunities and Challenges; Chapter 1. From Prêt-à-Porter to Tailor-Made; 1.1 The Call for Flexibility; 1.2 Cool Chips for Shallow Pockets; 1.3 A Million Processors for the Price of One?; 1.4 Processors Coming of Age; 1.5 This Book; 1.6 Travel Broadens the Mind; Chapter 2. Opportunities for Application-Specific Processors: The Case of Wireless Communications; 2.1 Future Mobile Communication Systems
2.2 Heterogeneous MPSoC for Digital Receivers2.3 ASIP Design; Chapter 3. Customizing Processors: Lofty Ambitions, Stark Realities; 3.1 The "CFP" project at HP Labs; 3.2 Searching for the Best Architecture Is Not a Machine-Only Endeavor; 3.3 Designing a CPU Core Still Takes a Very Long Time; 3.4 Don't Underestimate Competitive Technologies; 3.5 Software Developers Don't Always Help You; 3.6 The Embedded World Is Not Immune to Legacy Problems; 3.7 Customization Can Be Trouble; 3.8 Conclusions; Part II: Aspects of Processor Customization; Chapter 4. Architecture Description Languages
4.1 ADLs and other languages4.2 Survey of Contemporary ADLs; 4.3 Conclusions; Chapter 5. C Compiler Retargeting; 5.1 Compiler Construction Background; 5.2 Approaches to Retargetable Compilation; 5.3 Processor Architecture Exploration; 5.4 C Compiler Retargeting in the LISATek Platform; 5.5 Summary and Outlook; Chapter 6. Automated Processor Configuration and Instruction Extension; 6.1 Automation Is Essential for ASIP Proliferation; 6.2 The Tensilica Xtensa LX Configurable Processor; 6.3 Generating ASIPs Using Xtensa; 6.4 Automatic Generation of ASIP Specifications
6.5 Coding an Application for Automatic ASIP Generation6.6 XPRES Benchmarking Results; 6.7 Techniques for ASIP Generation; 6.8 Exploring the Design Space; 6.9 Evaluating Xpres Estimation Methods; 6.10 Conclusions and Future of the Technology; Chapter 7. Automatic Instruction-Set Extensions; 7.1 Beyond Traditional Compilers; 7.2 Building Block for Instruction Set Extension; 7.3 Heuristics; 7.4 State-Holding Instruction-Set Extensions; 7.5 Exploiting Pipelining to Relax I/O Constraints; 7.6 Conclusions and Further Challenges; Chapter 8. Challenges to Automatic Customization
8.1 The ARCompactTM Instruction Set Architecture8.2 Microarchitecture Challenges; 8.3 Case Study-Entropy Decoding; 8.4 Limitations of Automated Extension; 8.5 The Benefits of Architecture Extension; 8.6 Conclusions; Chapter 9. Coprocessor Generation from Executable Code; 9.1 Introduction; 9.2 User Level Flow; 9.3 Integration with Embedded Software; 9.4 Coprocessor Architecture; 9.5 ILP Extraction Challenges; 9.6 Internal Tool Flow; 9.7 Code Mapping Approach; 9.8 Synthesizing Coprocessor Architectures; 9.9 A Real-World Example; 9.10 Summary; Chapter 10. Datapath Synthesis; 10.1 Introduction
10.2 Custom Instruction Selection
Record Nr. UNINA-9910814560603321
San Francisco, : Morgan Kaufmann
Materiale a stampa
Lo trovi qui: Univ. Federico II
Opac: Controlla la disponibilità qui
Fast and effective embedded systems design [[electronic resource] ] : applying the ARM mbed / / Rob Toulson, Tim Wilmshurst
Fast and effective embedded systems design [[electronic resource] ] : applying the ARM mbed / / Rob Toulson, Tim Wilmshurst
Autore Toulson Rob
Edizione [1st edition]
Pubbl/distr/stampa Boston, Mass., : Elsevier/Newnes, 2012
Descrizione fisica 1 online resource (400 p.)
Disciplina 004.21
621.381
Altri autori (Persone) WilmshurstTim
Soggetto topico Embedded computer systems
Embedded computer systems - Design
Soggetto genere / forma Electronic books.
ISBN 1-280-77922-5
9786613689610
0-08-097769-3
Formato Materiale a stampa
Livello bibliografico Monografia
Lingua di pubblicazione eng
Nota di contenuto pt. 1. Essentials of embedded systems, using the mbed -- pt. 2. Moving to advanced and specialist applications.
Record Nr. UNINA-9910452784403321
Toulson Rob  
Boston, Mass., : Elsevier/Newnes, 2012
Materiale a stampa
Lo trovi qui: Univ. Federico II
Opac: Controlla la disponibilità qui
Fast and effective embedded systems design [[electronic resource] ] : applying the ARM mbed / / Rob Toulson, Tim Wilmshurst
Fast and effective embedded systems design [[electronic resource] ] : applying the ARM mbed / / Rob Toulson, Tim Wilmshurst
Autore Toulson Rob
Edizione [1st edition]
Pubbl/distr/stampa Boston, Mass., : Elsevier/Newnes, 2012
Descrizione fisica 1 online resource (400 p.)
Disciplina 004.21
621.381
Altri autori (Persone) WilmshurstTim
Soggetto topico Embedded computer systems
Embedded computer systems - Design
ISBN 1-280-77922-5
9786613689610
0-08-097769-3
Formato Materiale a stampa
Livello bibliografico Monografia
Lingua di pubblicazione eng
Nota di contenuto pt. 1. Essentials of embedded systems, using the mbed -- pt. 2. Moving to advanced and specialist applications.
Record Nr. UNINA-9910779149403321
Toulson Rob  
Boston, Mass., : Elsevier/Newnes, 2012
Materiale a stampa
Lo trovi qui: Univ. Federico II
Opac: Controlla la disponibilità qui
Fast and effective embedded systems design : applying the ARM mbed / / Rob Toulson, Tim Wilmshurst
Fast and effective embedded systems design : applying the ARM mbed / / Rob Toulson, Tim Wilmshurst
Autore Toulson Rob
Edizione [1st edition]
Pubbl/distr/stampa Boston, Mass., : Elsevier/Newnes, 2012
Descrizione fisica 1 online resource (400 p.)
Disciplina 004.21
621.381
Altri autori (Persone) WilmshurstTim
Soggetto topico Embedded computer systems
Embedded computer systems - Design
ISBN 1-280-77922-5
9786613689610
0-08-097769-3
Formato Materiale a stampa
Livello bibliografico Monografia
Lingua di pubblicazione eng
Nota di contenuto pt. 1. Essentials of embedded systems, using the mbed -- pt. 2. Moving to advanced and specialist applications.
Record Nr. UNINA-9910825131603321
Toulson Rob  
Boston, Mass., : Elsevier/Newnes, 2012
Materiale a stampa
Lo trovi qui: Univ. Federico II
Opac: Controlla la disponibilità qui