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3D Interconnect Architectures for Heterogeneous Technologies : Modeling and Optimization / / by Lennart Bamberg, Jan Moritz Joseph, Alberto García-Ortiz, Thilo Pionteck
| 3D Interconnect Architectures for Heterogeneous Technologies : Modeling and Optimization / / by Lennart Bamberg, Jan Moritz Joseph, Alberto García-Ortiz, Thilo Pionteck |
| Autore | Bamberg Lennart |
| Edizione | [1st ed. 2022.] |
| Pubbl/distr/stampa | Cham : , : Springer International Publishing : , : Imprint : Springer, , 2022 |
| Descrizione fisica | 1 online resource (403 pages) |
| Disciplina | 621.3815 |
| Soggetto topico |
Electronic circuits
Embedded computer systems Microprocessors Computer architecture Electronic Circuits and Systems Embedded Systems Processor Architectures |
| ISBN | 3-030-98229-7 |
| Formato | Materiale a stampa  |
| Livello bibliografico | Monografia |
| Lingua di pubblicazione | eng |
| Nota di contenuto | Part I Introduction -- 1 Introduction to 3D Technologies -- 1.1 Motivation for Heterogenous 3D ICs -- 1.2 3D Technologies -- 1.3 TSV Capacitances—A Problem Resistant to Scaling -- 1.4 Conclusion -- 2 Interconnect Architectures for 3D Technologies -- 2.1 Interconnect Architectures -- 2.2 Overview of Interconnect Architectures for 3D ICs -- 2.3 Three-dimensional Networks on chips -- 2.4 Conclusion -- Part II 3D Technology Modeling -- 3 Power and Performance Formulas -- 3.1 High-Level Formula for the Power Consumption -- 3.2 High-Level Formula for the Propagation Delay -- 3.3 Matrix Formulations -- 3.4 Evaluation -- 3.5 Conclusion -- 4 Capacitance Estimation -- 4.1 Existing Capacitance Models -- 4.2 Edge and MOS Effects on the TSV Capacitances -- 4.3 TSV Capacitance Model -- 4.4 Evaluation -- 4.5 Conclusion -- Part III System Modeling -- xiii -- xiv Contents -- 5 Application and Simulation Models -- 5.1 Overview of the Modeling Approach -- 5.2 Application Traffic Model -- 5.3 Simulation Model of 3D NoCs -- 5.4 Simulator Interfaces -- 5.5 Conclusion -- 6 Bit-level Statistics -- 6.1 Existing Approaches to Estimate the Bit-Level Statistics for -- Single Data Streams -- 6.2 Data-Stream Multiplexing -- 6.3 Bit-Level Statistics with Data-Stream Multiplexing -- 6.4 Evaluation -- 6.5 Conclusion -- 7 Ratatoskr Framework -- 7.1 Ratatoskr for Practitioners -- 7.2 Implementation -- 7.3 Evaluation -- 7.4 Case Study: Link Power Estimation and Optimization -- 7.5 Conclusion -- Part IV 3D-Interconnect Optimization -- 8 Low-Power Technique for 3D Interconnects -- 8.1 Fundamental Idea -- 8.2 Power-Optimal TSV assignment -- 8.3 Systematic Net-to-TSV Assignments -- 8.4 Combination with Traditional Low-Power Codes -- 8.5 Evaluation -- 8.6 Conclusion -- 9 Low-Power Technique for High-Performance 3D -- Interconnects. -- 9.1 Edge-Effect-Aware Crosstalk Classification -- 9.2 Existing Approaches and Their Limitations -- 9.3 Proposed Technique -- 9.4 Extension to a Low-Power3D CAC -- 9.5 Evaluation -- 9.6 Conclusion -- 10 Low-Power Technique for High-Performance 3D -- Interconnects (Misaligned) -- 10.1 Temporal-Misalignment Effect on the Crosstalk -- 10.2 Exploiting Misalignment to Improve the Performance -- 10.3 Effect on the TSV Power Consumption -- Contents xv -- 10.4 Evaluation -- 10.5 Conclusion -- 11 Low-Power Technique for Yield-Enhanced 3D Interconnects -- 11.1 Existing TSV Yield-Enhancement Techniques -- 11.2 Preliminaries—Logical Impact of TSV Faults -- 11.3 Fundamental Idea -- 11.4 Formal Problem Description -- 11.5 TSV Redundancy Schemes -- 11.6 Evaluation -- 11.7 Case Study -- 11.8 Conclusion -- Part V NoC Optimization for Heterogeneous 3D Integration -- 12 Heterogeneous Buffering for 3D NoCs251 -- 12.1 Buffer Distributions and Depths -- 12.2 Routers with Optimized Buffer Distribution -- 12.3 Routers with Optimized Buffer Depths -- 12.4 Evaluation -- 12.5 Discussion -- 12.6 Conclusion -- 13 Heterogeneous Routing for 3D NoCs -- 13.1 Heterogeneity and Routing -- 13.2 Modeling Heterogeneous Technologies -- 13.3 Modeling Communication -- 13.4 Routing Limitations from Heterogeneity -- 13.5 Heterogeneous Routing Algorithms -- 13.6 Heterogeneous Router Architectures -- 13.7 Low-Power Routing in Heterogeneous 3D ICs -- 13.8 Evaluation -- 13.9 Discussion -- 13.10Conclusion -- 14 Heterogeneous Virtualisation for 3D NoCs -- 14.1 Problem Description -- 14.2 Heterogeneous Microarchitectures Exploiting Traffic Imbalance -- 14.3 Evaluation -- 14.4 Conclusion -- 15 Network Synthesis and SoC Floor Planning -- 15.1 Fundamental Idea -- 15.2 Modelling and Optimization -- 15.3 Mixed-Integer Linear Program -- 15.4 Heuristic Solution -- xvi Contents -- 15.5 Evaluation -- 15.6 Conclusion -- Part VI Finale -- 16 Conclusion -- 16.1 Putting it all together -- 16.2 Impact on Future Work -- A Appendix -- B Pseudo Codes -- C Method to Calculate the Depletion-Region Widths -- D Modeling Logical OR Relations. |
| Record Nr. | UNINA-9910735388803321 |
Bamberg Lennart
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| Cham : , : Springer International Publishing : , : Imprint : Springer, , 2022 | ||
| Materiale a stampa | ||
| Lo trovi qui: Univ. Federico II | ||
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Advanced Boolean Techniques : Selected Papers from the 15th International Workshop on Boolean Problems / / edited by Rolf Drechsler, Sebastian Huhn
| Advanced Boolean Techniques : Selected Papers from the 15th International Workshop on Boolean Problems / / edited by Rolf Drechsler, Sebastian Huhn |
| Autore | Drechsler Rolf |
| Edizione | [1st ed. 2023.] |
| Pubbl/distr/stampa | Cham : , : Springer International Publishing : , : Imprint : Springer, , 2023 |
| Descrizione fisica | 1 online resource (174 pages) |
| Disciplina | 621.3815 |
| Altri autori (Persone) | HuhnSebastian |
| Soggetto topico |
Electronic circuits
Computer science - Mathematics Embedded computer systems Electronic circuit design Electronic Circuits and Systems Mathematical Applications in Computer Science Embedded Systems Electronics Design and Verification |
| ISBN | 3-031-28916-1 |
| Formato | Materiale a stampa |
| Livello bibliografico | Monografia |
| Lingua di pubblicazione | eng |
| Nota di contenuto | Chapter 1. Arithmetic Satisfiability-Modulo-Theory Solving Applied to Non-Standard Analysis Problems of Cyber-Physical Systems -- Chapter 2. Fast AIG-based Approximate Logic Synthesis -- Chapter 3. External Don’t Cares in Logic Synthesis -- Chapter 4. Maiorana-McFarland Boolean Bent Functions Characterized by their Reed-Muller Spectra -- Chapter 5. Towards System-level Assertions for Heterogeneous Systems -- Chapter 6. SAT-based Key Determination Attack for Improving the Quality Assessment of Logic Locking Mechanisms -- Chapter 7. Autosymmetric and D-reducible Functions: Theory and Application to Security -- Chapter 8. Two-operands modular multiplication to small bit-ranges -- Chapter 9. Low Latency Real-Time Inference for Multilayer Perceptrons on FPGAs -- Chapter 10. Thirty-six Officers of Euler - New Insights Computed Using XBOOLE -- Chapter 11. Start Small but Dream Big: On Choosing a Static Variable Order for Multiplier BDDs. |
| Record Nr. | UNINA-9910728387303321 |
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Drechsler Rolf
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| Cham : , : Springer International Publishing : , : Imprint : Springer, , 2023 | ||
| Materiale a stampa | ||
| Lo trovi qui: Univ. Federico II | ||
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Advanced Techniques for Assertion-Based Verification in Hardware Designs Using Data Mining Algorithms / / by Mohammad Reza Heidari Iman
| Advanced Techniques for Assertion-Based Verification in Hardware Designs Using Data Mining Algorithms / / by Mohammad Reza Heidari Iman |
| Autore | Heidari Iman Mohammad Reza |
| Edizione | [1st ed. 2025.] |
| Pubbl/distr/stampa | Cham : , : Springer Nature Switzerland : , : Imprint : Springer, , 2025 |
| Descrizione fisica | 1 online resource (142 pages) |
| Disciplina | 006.22 |
| Soggetto topico |
Embedded computer systems
Electronic circuit design Electronics Embedded Systems Electronics Design and Verification Electronics and Microelectronics, Instrumentation |
| ISBN |
9783031904103
9783031904097 |
| Formato | Materiale a stampa |
| Livello bibliografico | Monografia |
| Lingua di pubblicazione | eng |
| Nota di contenuto | Introduction -- Background -- State-of-the-art -- Automatic Generation of Assertions for Functional Verification -- Automatic Evaluation and Minimization of Assertions -- Automatic Generation of Assertions for Security Verification -- Conclusion and Future Directions. |
| Record Nr. | UNINA-9911015869503321 |
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Heidari Iman Mohammad Reza
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| Cham : , : Springer Nature Switzerland : , : Imprint : Springer, , 2025 | ||
| Materiale a stampa | ||
| Lo trovi qui: Univ. Federico II | ||
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Advances in Micro-Electronics, Embedded Systems and IoT : Proceedings of Sixth International Conference on Microelectronics, Electromagnetics and Telecommunications (ICMEET 2021), Volume 1 / / edited by V. V. S. S. S. Chakravarthy, Wendy Flores-Fuentes, Vikrant Bhateja, B.N. Biswal
| Advances in Micro-Electronics, Embedded Systems and IoT : Proceedings of Sixth International Conference on Microelectronics, Electromagnetics and Telecommunications (ICMEET 2021), Volume 1 / / edited by V. V. S. S. S. Chakravarthy, Wendy Flores-Fuentes, Vikrant Bhateja, B.N. Biswal |
| Edizione | [1st ed. 2022.] |
| Pubbl/distr/stampa | Singapore : , : Springer Nature Singapore : , : Imprint : Springer, , 2022 |
| Descrizione fisica | 1 online resource (544 pages) |
| Disciplina | 621.381 |
| Collana | Lecture Notes in Electrical Engineering |
| Soggetto topico |
Electronic circuits
Electronics Embedded computer systems Internet of things Electronic Circuits and Systems Electronics and Microelectronics, Instrumentation Embedded Systems Internet of Things |
| ISBN |
981-16-8549-5
981-16-8550-9 |
| Formato | Materiale a stampa |
| Livello bibliografico | Monografia |
| Lingua di pubblicazione | eng |
| Nota di contenuto | Synthesis of KNN Algorithm in FPGA Technology -- Study of Architecture and Performance Analysis of Approximation Multipliers -- Design and Analysis of Energy Efficient Logic Gates Using INDEP Short Gate FinFETs at 10nm Technology Node -- SIMPLE-DRR: A New Energy-Efficient Multi-hop Routing Protocol in WBANs for Health Monitoring -- Design of Class AB and Class C Amplifier -- Lightgbm Model for Credit Card Fraud Discovery -- PV System Based Switched Capacitor Dc-Dc Converter for High Voltage Gain using fuzzy-PID Controller -- Startup Circuits for Zero Current Reduction in Bandgap Reference Circuit -- Recycle of Plastic Material for Fabrication of Paver Blocks -- Handwritten Cursive English Character Recognition using DAG-CNN. |
| Record Nr. | UNINA-9910743218803321 |
| Singapore : , : Springer Nature Singapore : , : Imprint : Springer, , 2022 | ||
| Materiale a stampa | ||
| Lo trovi qui: Univ. Federico II | ||
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Advances in Microelectronics, Embedded Systems and IoT : Proceedings of 8th International Conference on Microelectronics, Electromagnetics and Telecommunications (ICMEET 2023) / / edited by V. V. S. S. S Chakravarthy, Vikrant Bhateja, Jaume Anguera, Shabana Urooj, Anumoy Ghosh
| Advances in Microelectronics, Embedded Systems and IoT : Proceedings of 8th International Conference on Microelectronics, Electromagnetics and Telecommunications (ICMEET 2023) / / edited by V. V. S. S. S Chakravarthy, Vikrant Bhateja, Jaume Anguera, Shabana Urooj, Anumoy Ghosh |
| Edizione | [1st ed. 2024.] |
| Pubbl/distr/stampa | Singapore : , : Springer Nature Singapore : , : Imprint : Springer, , 2024 |
| Descrizione fisica | 1 online resource (0 pages) |
| Disciplina | 537 |
| Collana | Lecture Notes in Electrical Engineering |
| Soggetto topico |
Electronic circuits
Electronics Embedded computer systems Internet of things Electronic Circuits and Systems Electronics and Microelectronics, Instrumentation Embedded Systems Internet of Things |
| ISBN | 981-9707-67-6 |
| Formato | Materiale a stampa |
| Livello bibliografico | Monografia |
| Lingua di pubblicazione | eng |
| Nota di contenuto |
Intro -- Committee -- Preface -- Contents -- Editors and Contributors -- Hardware Security for IC Piracy: Logic Locking Past, Present and Opportunity -- 1 Introduction -- 2 Background -- 2.1 Basics of Logic Locking -- 3 Logic Locking: Defence Techniques -- 3.1 Primitive Logic Locking -- 3.2 Cyclic-Based-Logic Locking -- 3.3 Scan Chain Logic Locking/Blocking -- 3.4 Finite State Machine-Based Logic Locking -- 4 Logic Locking: Attacks -- 4.1 Algorithmic Attacks -- 4.2 Approximate Attacks -- 4.3 Structural Attacks -- 5 Research Opportunities in Logic Locking -- 6 Conclusion -- References -- Design and Analysis of 2.4 to 3.5 GHz Low-Noise Amplifier for Sub-6 Cellular LTE/5G NR Application Using CMOS 110 nm SOI Process Technology -- 1 Introduction -- 2 Selection of Process Technology (CMOS SOI) -- 3 Topology Selection for Proposed LNA -- 4 Transistor Size Selection for Proposed LNA Design -- 5 Impedance Matching for Proposed LNA Design -- 6 Circuit Design of proposed LNA Design -- 7 Performance of Designed LNA Abbreviations and Acronyms -- 7.1 S Parameter -- 7.2 Noise Figure -- 7.3 Stability -- 7.4 Linearity -- 8 Comparison of Proposed LNA Design -- 9 Conclusion -- References -- Out-of-Order Execution of Instructions for In-Order Five-Stage RISC-V Processor -- 1 Introduction -- 2 System Design -- 3 Results -- 4 Conclusion -- References -- Load Balancing by Efficient Resource Allocation for Edge Devices -- 1 Introduction -- 2 Proposed Method -- 2.1 The First Stage Is to Build the Simulator that Mainly Contains 3 Physical Entities -- 2.2 Finding the Most Appropriate Load Balancing Algorithm and Adding It to the Simulator -- 3 Evaluating the Performance of the Simulator -- 4 Conclusion -- References -- Analysis of Clock Gating Techniques for Low Power -- 1 Introduction -- 2 Power Analysis of Existing Clock Gating Techniques -- 2.1 AND-Based Clock Gating.
2.2 Flip-Flop-Based Clock Gating -- 2.3 Latch-Based Clock Gating (LBCG) -- 2.4 Data-Driven-Based Clock Gating -- 2.5 Autogated-Based Clock Gating (ABCG) -- 3 Experimental Results -- 4 Conclusion -- References -- Design and Development of Physiological Parameter Monitoring System Using Wearable Sensors -- 1 Introduction -- 1.1 Background Study -- 2 Research Methods -- 2.1 Material and Study -- 2.2 Block Diagram -- 2.3 Flowchart -- 2.4 Circuit Diagram -- 3 Testing -- 3.1 Data Retrieval -- 4 Conclusion -- References -- Energy-Efficient Enhancement of the AES Module in Randshift Method Through S-Box with Registers -- 1 Introduction -- 2 Literature Survey -- 3 Methodology -- 3.1 Existing AES in Randshift -- 3.2 Proposed Methodology -- 4 Simulation Results -- 5 Conclusion and Future Scope -- References -- Numerical Exploration of Supercontinuum Generation in Zinc-Germanium Diphosphide-Based Photonic Crystal Fiber -- 1 Introduction -- 2 Proposed Design of PCF -- 3 Linear and Nonlinear Parameters -- 4 Optical Properties of the Fiber -- 5 Numerical Simulation Outcomes for SCG -- 6 Conclusion and Future Scope -- References -- Adaptive Learning-Based IoT Security Framework Using Recurrent Neural Networks -- 1 Introduction -- 1.1 Background and Motivation -- 2 Literature Review -- 3 Methodology -- 3.1 Overview of the Proposed Adaptive Learning-Based IoT Security Framework -- 3.2 Sensor Parameters for IoT Security Analysis -- 3.3 Data Collection and Preprocessing for RNN Training -- 3.4 Model Evaluation and Validation Techniques -- 4 Implementation -- 4.1 Selection of IoT Devices and Network Setup -- 4.2 Integration of the RNN Model into the IoT Security Framework -- 5 Results and Analysis -- 5.1 Performance Evaluation Metrics -- 5.2 Comparison of the Proposed Framework with Traditional Methods -- 6 Conclusion -- References. Design of Radial Basis Function with PI-Based Supervisory Neural Controller for Liquid Level System -- 1 Introduction -- 2 RBF-PI-Based Supervisory Controller -- 3 Discrete-Time PI Controller with Anti-windup (AW) Strategy -- 4 Experimental Results -- 5 Conclusion -- References -- A Novel Approach for the Design of a Raspberry Pi-Based Smart Drainage Monitoring System -- 1 Introduction -- 2 Methodologies and Hardware Tools Used -- 2.1 SMTP Protocol -- 2.2 Hardware Tools -- 3 Proposed System Design -- 3.1 Working Methodology of the Proposed System -- 4 Programming Methodology -- 5 Results and Observation -- 6 Conclusion and Future Work -- References -- Design of an IoT-Based System for Prefailure Deformation Monitoring of Riverbank Landslides in Mekong Delta -- 1 Introduction -- 2 System Design -- 2.1 Structure of the Sensor Nodes -- 2.2 Cloud Server -- 3 Experimental Results -- 4 Conclusions -- References -- Software-Defined Storage Performance Testing Using Mininet -- 1 Introduction -- 2 Related Work -- 3 Emulation Scenario -- 4 Emulation Setting -- 4.1 Emulation Environment Specifications -- 5 Emulation Results -- 6 Conclusion and Future Scope -- 6.1 Conclusion -- 6.2 Future Scope -- References -- High Gain Voltage Lift-Based Interleaved Cascaded Boost DC-DC Converter -- 1 Introduction -- 2 Circuit Analysis of the Proposed Converter -- 3 Operating Principle of Proposed Converter -- 4 Proposed Converter Steady-State Analysis -- 4.1 Voltage Gain (G) -- 4.2 Ratings of Diodes -- 4.3 Ratings of the Switches -- 5 Simulated Results Discussion -- 6 Conclusion -- References -- Modelling and Simulation of DC-DC Converters for PEM Fuel Cell Electric Vehicles -- 1 Introduction -- 2 Modelling of Fuel Cell -- 3 Modelling of DC-DC Converters -- 3.1 Interleaved Boost Converter (IBC) -- 3.2 Self-lift SEPIC Converter -- 4 Inverter, Motor and Motor Control Design. 4.1 Modelling of Inverter -- 4.2 BLDC Motor and Control -- 5 Simulation Results -- 6 Conclusion -- References -- Feasibility Assessment of All-in-One Portable Measurement Device for Home-Based Remote Vital Sign Monitoring -- 1 Introduction -- 2 Material and Method -- 2.1 PVS Primary Care Cloud Platform -- 2.2 Part 1 PVS Calibration -- 2.3 Part 2 Mild Symptom Patient Self-assessment -- 3 Results and Discussion -- 3.1 Part 1 PVS Calibration -- 3.2 Part 2 Mild Symptom Patient Self-assessment -- 3.3 Discussion -- 4 Conclusion -- References -- Enhanced Efficiency of Perovskite Solar Cells with Reduced Graphene Oxide as an HTL: A Simulation Analysis Using SCAPS-1D -- 1 Introduction -- 2 Modelling of Perovskite Solar Cell -- 3 Simulation of the Device -- 4 Results and Discussion -- 4.1 Effect of Perovskite Layer Thickness -- 4.2 Effect of Perovskite Layer Doping -- 4.3 Effect of TCO Layer Thickness -- 4.4 Effect of Reduced Graphene Oxide (rGO) Doping -- 5 Conclusion -- References -- Design and Analysis of 10-nm FD-SOI FinFET by Dual-Dielectric Spacers for High-Speed Switching -- 1 Introduction -- 2 Structure and Simulation Framework of the Device -- 2.1 Single Dielectric Spacers and Simulation Results -- 2.2 Dual-k Spacers with Device Structure and Simulation Results -- 2.3 Doping Concentration -- 3 Simulation Results of Single- and Dual-Dielectric Spacer Devices -- 4 Conclusion -- References -- Study of Effect of Nd Substitution on Dielectric and Electrical Properties of Bismuth Iron Titanate -- 1 Introduction -- 2 Experimental Procedure -- 3 Analysis of Experimental Results -- 3.1 XRD and Morphological Analysis -- 3.2 Dielectric Analysis -- 3.3 Impedance Analysis -- 3.4 AC Conductivity -- 4 Conclusion -- References -- Initiation, Innovation, Implementation and Integration of CBDC in Digital Virtual Payment Systems -- 1 Introduction. 2 Background Information -- 2.1 Blockchain -- 2.2 Different Forms of Digital Currency -- 2.3 Difference Between Regular Online Payments and CBDC -- 3 Proposed 4i Stage Model of CBDC -- 3.1 Initiation of CBDC -- 3.2 Innovations of CBDC -- 3.3 Implementation of CBDC -- 4 Integration of CBDC -- 5 Conclusion -- References -- Software Development Effort Estimation Using UML Activity Models with Regression Analysis -- 1 Introduction -- 2 Relevant Work -- 3 Proposed Approach -- 3.1 Dataset -- 3.2 Regression Models -- 3.3 Performance Metrics -- 4 Environment Setup -- 5 Results Analysis -- 6 Conclusion -- References -- An IoT-Based Intelligent Smart Parking System with Effective Communication System -- 1 Introduction -- 2 Literature Review -- 3 Methodology -- 3.1 Design Methodologies -- 3.2 Connections -- 3.3 System Architecture Diagram -- 3.4 Hardware Requirements -- 3.5 Software Requirements -- 4 Results and Findings -- 4.1 Stepwise Description of Implementation -- 4.2 Results -- 4.3 Observations from the Work -- 5 Conclusion and Future Scope -- 5.1 Conclusion -- 5.2 Future Study -- References -- Smart Pregnancy Watch with Location-Based Emergency Messaging, a Comprehensive Solution for Maternal Health Care -- 1 About Smart Band -- 2 Survey for Pregnancy in Women -- 3 Problems Identified -- 3.1 Discussion About the Problem -- 3.2 Emergency Message Sending -- 3.3 Location Tracking -- 3.4 Baby Safety -- 4 Hardware Components -- 5 Design and Implementation -- 6 Results and Discussion -- 7 Conclusion -- References -- ANN Enabled Obstacle Avoiding Automated Car -- 1 Introduction -- 2 Scope -- 3 Overview -- 4 Related Work -- 5 Existing System -- 6 Proposed System -- 7 Problem Statement -- 8 Methodology -- 8.1 Circuit Diagram -- 8.2 Algorithm -- 8.3 Data Flow Diagram -- 8.4 Pseudo-code -- 9 Overview of Technology -- 9.1 Arduino UNO -- 9.2 Ultrasonic Sensor. 9.3 TT Gear Set and Wheels. |
| Record Nr. | UNINA-9910861097303321 |
| Singapore : , : Springer Nature Singapore : , : Imprint : Springer, , 2024 | ||
| Materiale a stampa | ||
| Lo trovi qui: Univ. Federico II | ||
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Advances in Signal Processing, Embedded Systems and IoT : Proceedings of Seventh ICMEET- 2022 / / edited by V.V.S.S.S. Chakravarthy, Vikrant Bhateja, Wendy Flores Fuentes, Jaume Anguera, K. Padma Vasavi
| Advances in Signal Processing, Embedded Systems and IoT : Proceedings of Seventh ICMEET- 2022 / / edited by V.V.S.S.S. Chakravarthy, Vikrant Bhateja, Wendy Flores Fuentes, Jaume Anguera, K. Padma Vasavi |
| Edizione | [1st ed. 2023.] |
| Pubbl/distr/stampa | Singapore : , : Springer Nature Singapore : , : Imprint : Springer, , 2023 |
| Descrizione fisica | 1 online resource (692 pages) |
| Disciplina | 621.382 |
| Collana | Lecture Notes in Electrical Engineering |
| Soggetto topico |
Electronic circuits
Electronics Embedded computer systems Internet of things Electronic Circuits and Systems Electronics and Microelectronics, Instrumentation Embedded Systems Internet of Things |
| ISBN | 981-19-8865-X |
| Formato | Materiale a stampa |
| Livello bibliografico | Monografia |
| Lingua di pubblicazione | eng |
| Nota di contenuto | Interference and Cancellation Issues for an Indoor VLC Network -- FPGA-Based 128-Bit RISC Processor Using Pipelining -- Analysis and Implementation of a Multi-path and Metal-Stacked 8-Shaped Inductor -- Improved Conversion Gain with High SFDR and Highly Linear RF Mixer Using Inductive Gate Biasing Technique for Low Power WAS and Radio LAN Applications. |
| Record Nr. | UNINA-9910726272503321 |
| Singapore : , : Springer Nature Singapore : , : Imprint : Springer, , 2023 | ||
| Materiale a stampa | ||
| Lo trovi qui: Univ. Federico II | ||
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Advances in Smart Communication Technology and Information Processing : OPTRONIX 2020 / / edited by Soumen Banerjee, Jyotsna Kumar Mandal
| Advances in Smart Communication Technology and Information Processing : OPTRONIX 2020 / / edited by Soumen Banerjee, Jyotsna Kumar Mandal |
| Edizione | [1st ed. 2021.] |
| Pubbl/distr/stampa | Singapore : , : Springer Nature Singapore : , : Imprint : Springer, , 2021 |
| Descrizione fisica | 1 online resource (XXX, 484 p. 320 illus., 232 illus. in color.) |
| Disciplina | 621.3 |
| Collana | Lecture Notes in Networks and Systems |
| Soggetto topico |
Telecommunication
Database management Artificial intelligence Embedded computer systems Computational intelligence Communications Engineering, Networks Database Management System Artificial Intelligence Embedded Systems Computational Intelligence |
| ISBN | 981-15-9433-3 |
| Formato | Materiale a stampa |
| Livello bibliografico | Monografia |
| Lingua di pubblicazione | eng |
| Nota di contenuto | A Dielectric Resonator MIMO Antenna for Intelligent Transportation Systems Applications -- Some Studies on Microstrip Patch Antennas for Wearable Applications -- Ultra Wide Band Planar Inverted F Antenna Design -- A Novel Design of Circularly Polarized Antenna with Asymmetric Slots -- Designing a Framework for Real-time WiFi-based Indoor Positioning -- Smart Plant Monitoring System Using BLYNK Application -- Image Segmentation based on Galactic Swarm Optimization -- An Intelligent and Smart Belt for the Blind People -- Design of a Microring Resonator having high sensitivity for Biosensing Applications -- Technical Assessment for Implementation of Agricultural Solar Pump in West Bengal to Reduce AT&C loss of Discom –A Case Study. |
| Record Nr. | UNINA-9910483878103321 |
| Singapore : , : Springer Nature Singapore : , : Imprint : Springer, , 2021 | ||
| Materiale a stampa | ||
| Lo trovi qui: Univ. Federico II | ||
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AI on the Edge with Security : Foundations and Practices / / by Naresh Kumar Sehgal, Manoj Saxena, Dhaval N. Shah
| AI on the Edge with Security : Foundations and Practices / / by Naresh Kumar Sehgal, Manoj Saxena, Dhaval N. Shah |
| Autore | Sehgal Naresh Kumar |
| Edizione | [1st ed. 2025.] |
| Pubbl/distr/stampa | Cham : , : Springer Nature Switzerland : , : Imprint : Springer, , 2025 |
| Descrizione fisica | 1 online resource (285 pages) |
| Disciplina | 006.22 |
| Altri autori (Persone) |
SaxenaManoj
ShahDhaval N |
| Soggetto topico |
Embedded computer systems
Cooperating objects (Computer systems) Internet of things Embedded Systems Cyber-Physical Systems Internet of Things |
| ISBN |
9783031782725
9783031782718 |
| Formato | Materiale a stampa |
| Livello bibliografico | Monografia |
| Lingua di pubblicazione | eng |
| Nota di contenuto | Part I. Foundations -- Chapter 1. Edge Computing with AI: Introduction -- Chapter 2. Foundations of Computing at the Edge of Networks -- Chapter 3. Foundations of the Internet of Things (IoT) -- Chapter 4. Foundations of Artificial Intelligence -- Chapter 5. Foundations of Information Security -- Chapter 6. Edge Artificial Intelligence -- Part II. Practices -- Chapter 7. Security and Performance at the Edge -- Chapter 8. Intelligent Edge Computing: Design Use Cases -- Chapter 9. Role of Regulatory -- Chapter 10. Future of Edge AI. |
| Record Nr. | UNINA-9910983393203321 |
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Sehgal Naresh Kumar
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| Cham : , : Springer Nature Switzerland : , : Imprint : Springer, , 2025 | ||
| Materiale a stampa | ||
| Lo trovi qui: Univ. Federico II | ||
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Analog Current-Mode Computational Circuits for Artificial Neural Networks / / by Cosmin Radu Popa
| Analog Current-Mode Computational Circuits for Artificial Neural Networks / / by Cosmin Radu Popa |
| Autore | Popa Cosmin Radu |
| Edizione | [1st ed. 2025.] |
| Pubbl/distr/stampa | Cham : , : Springer Nature Switzerland : , : Imprint : Springer, , 2025 |
| Descrizione fisica | 1 online resource (233 pages) |
| Disciplina | 621.3815 |
| Collana | Analog Circuits and Signal Processing |
| Soggetto topico |
Electronic circuit design
Embedded computer systems Cooperating objects (Computer systems) Electronics Design and Verification Embedded Systems Cyber-Physical Systems |
| ISBN |
9783032039897
9783032039880 |
| Formato | Materiale a stampa |
| Livello bibliografico | Monografia |
| Lingua di pubblicazione | eng |
| Nota di contenuto | Introduction -- Superior-order approximation functions for generating sigmoidal activation functions -- Superior-order approximation functions for generating radial basis activation functions -- Superior-order approximation functions for artificial neural networks applications -- Analysis and design of analog function synthesizers for implmenting sigmoidal activation functions -- Analysis and design of analog function synthesizers for generating radial basis activation functions -- Analysis and design of analog function synthesizers for artificial neural networks applications -- Low-voltage low-power current-mode CMOS computational circuits for implementing activation functions -- Conclusions. |
| Record Nr. | UNINA-9911039319703321 |
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Popa Cosmin Radu
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| Cham : , : Springer Nature Switzerland : , : Imprint : Springer, , 2025 | ||
| Materiale a stampa | ||
| Lo trovi qui: Univ. Federico II | ||
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Analog Microelectronics / / by Mattia Borgarino
| Analog Microelectronics / / by Mattia Borgarino |
| Autore | Borgarino Mattia |
| Edizione | [1st ed. 2025.] |
| Pubbl/distr/stampa | Cham : , : Springer Nature Switzerland : , : Imprint : Springer, , 2025 |
| Descrizione fisica | 1 online resource (979 pages) |
| Disciplina | 621.3815 |
| Soggetto topico |
Electronic circuit design
Embedded computer systems Electronics Electronics Design and Verification Embedded Systems Electronics and Microelectronics, Instrumentation |
| ISBN | 3-031-94286-8 |
| Formato | Materiale a stampa |
| Livello bibliografico | Monografia |
| Lingua di pubblicazione | eng |
| Nota di contenuto | History of Electronics -- Transistors and Amplifiers -- Fundamental Patterns -- Exercises on basic patterns -- Frequency Response -- Feedback -- Feedback and Stability -- Examples of Feedback Amplifiers. |
| Record Nr. | UNINA-9911020421703321 |
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Borgarino Mattia
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| Cham : , : Springer Nature Switzerland : , : Imprint : Springer, , 2025 | ||
| Materiale a stampa | ||
| Lo trovi qui: Univ. Federico II | ||
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