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Digital system clocking : high performance and low-power aspects / / Vojin G. Oklobdzija ... [et al.]
| Digital system clocking : high performance and low-power aspects / / Vojin G. Oklobdzija ... [et al.] |
| Autore | Oklobdzija Vojin |
| Edizione | [1st edition] |
| Pubbl/distr/stampa | New York : , : IEEE, , c2003 |
| Descrizione fisica | 1 online resource (265 p.) |
| Disciplina | 621.39 |
| Altri autori (Persone) | OklobdzijaVojin G |
| Soggetto topico |
Timing circuits - Design and construction
Memory management (Computer science) Low voltage integrated circuits - Design and construction High performance computing Electronic digital computers - Power supply Electric power - Conservation |
| Soggetto non controllato | Electrical and Electronics Engineering |
| ISBN |
1-280-25290-1
9786610252909 0-470-34300-1 0-471-72368-1 0-471-72370-3 |
| Formato | Materiale a stampa  |
| Livello bibliografico | Monografia |
| Lingua di pubblicazione | eng |
| Nota di contenuto | Preface. -- Introduction. -- Theory of Clocked Storage Elements. -- Timing and Energy Parameters. -- Pipelining and Timing Analysis. -- High-Performance System Issues. -- Low-Energy System Issues. -- Simulation Techniques. -- State-of-the-Art Clocked Storage Elements in CMOS Technology. -- Microprocesor Examples. -- References. -- Index. |
| Record Nr. | UNINA-9910145767103321 |
Oklobdzija Vojin
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||
| New York : , : IEEE, , c2003 | ||
| Materiale a stampa | ||
| Lo trovi qui: Univ. Federico II | ||
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Digital system clocking : high performance and low-power aspects / / Vojin G. Oklobdzija ... [et al.]
| Digital system clocking : high performance and low-power aspects / / Vojin G. Oklobdzija ... [et al.] |
| Autore | Oklobdzija Vojin |
| Edizione | [1st edition] |
| Pubbl/distr/stampa | New York : , : IEEE, , c2003 |
| Descrizione fisica | 1 online resource (265 p.) |
| Disciplina | 621.39 |
| Altri autori (Persone) | OklobdzijaVojin G |
| Soggetto topico |
Timing circuits - Design and construction
Memory management (Computer science) Low voltage integrated circuits - Design and construction High performance computing Electronic digital computers - Power supply Electric power - Conservation |
| Soggetto non controllato | Electrical and Electronics Engineering |
| ISBN |
1-280-25290-1
9786610252909 0-470-34300-1 0-471-72368-1 0-471-72370-3 |
| Formato | Materiale a stampa |
| Livello bibliografico | Monografia |
| Lingua di pubblicazione | eng |
| Nota di contenuto | Preface. -- Introduction. -- Theory of Clocked Storage Elements. -- Timing and Energy Parameters. -- Pipelining and Timing Analysis. -- High-Performance System Issues. -- Low-Energy System Issues. -- Simulation Techniques. -- State-of-the-Art Clocked Storage Elements in CMOS Technology. -- Microprocesor Examples. -- References. -- Index. |
| Record Nr. | UNISA-996217426803316 |
|
Oklobdzija Vojin
|
||
| New York : , : IEEE, , c2003 | ||
| Materiale a stampa | ||
| Lo trovi qui: Univ. di Salerno | ||
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Digital system clocking : high performance and low-power aspects / / Vojin G. Oklobdzija ... [et al.]
| Digital system clocking : high performance and low-power aspects / / Vojin G. Oklobdzija ... [et al.] |
| Autore | Oklobdzija Vojin |
| Edizione | [1st edition] |
| Pubbl/distr/stampa | New York : , : IEEE, , c2003 |
| Descrizione fisica | 1 online resource (265 p.) |
| Disciplina | 621.39 |
| Altri autori (Persone) | OklobdzijaVojin G |
| Soggetto topico |
Timing circuits - Design and construction
Memory management (Computer science) Low voltage integrated circuits - Design and construction High performance computing Electronic digital computers - Power supply Electric power - Conservation |
| Soggetto non controllato | Electrical and Electronics Engineering |
| ISBN |
1-280-25290-1
9786610252909 0-470-34300-1 0-471-72368-1 0-471-72370-3 |
| Formato | Materiale a stampa |
| Livello bibliografico | Monografia |
| Lingua di pubblicazione | eng |
| Nota di contenuto | Preface. -- Introduction. -- Theory of Clocked Storage Elements. -- Timing and Energy Parameters. -- Pipelining and Timing Analysis. -- High-Performance System Issues. -- Low-Energy System Issues. -- Simulation Techniques. -- State-of-the-Art Clocked Storage Elements in CMOS Technology. -- Microprocesor Examples. -- References. -- Index. |
| Record Nr. | UNINA-9910831056803321 |
|
Oklobdzija Vojin
|
||
| New York : , : IEEE, , c2003 | ||
| Materiale a stampa | ||
| Lo trovi qui: Univ. Federico II | ||
| ||
Digital system clocking : high performance and low-power aspects / / Vojin G. Oklobdzija ... [et al.]
| Digital system clocking : high performance and low-power aspects / / Vojin G. Oklobdzija ... [et al.] |
| Edizione | [1st edition] |
| Pubbl/distr/stampa | New York, : IEEE |
| Descrizione fisica | 1 online resource (265 p.) |
| Disciplina | 621.3815 |
| Altri autori (Persone) | OklobdzijaVojin G |
| Soggetto topico |
Timing circuits - Design and construction
Memory management (Computer science) Low voltage integrated circuits - Design and construction High performance computing Electronic digital computers - Power supply Electric power - Conservation |
| ISBN |
1-280-25290-1
9786610252909 0-470-34300-1 0-471-72368-1 0-471-72370-3 |
| Formato | Materiale a stampa |
| Livello bibliografico | Monografia |
| Lingua di pubblicazione | eng |
| Nota di contenuto | Preface. -- Introduction. -- Theory of Clocked Storage Elements. -- Timing and Energy Parameters. -- Pipelining and Timing Analysis. -- High-Performance System Issues. -- Low-Energy System Issues. -- Simulation Techniques. -- State-of-the-Art Clocked Storage Elements in CMOS Technology. -- Microprocesor Examples. -- References. -- Index. |
| Record Nr. | UNINA-9910877807203321 |
| New York, : IEEE | ||
| Materiale a stampa | ||
| Lo trovi qui: Univ. Federico II | ||
| ||
Green computing with emerging memory : low-power computation for social innovation / / Takayuki Kawahara, Hiroyuki Mizuno editors
| Green computing with emerging memory : low-power computation for social innovation / / Takayuki Kawahara, Hiroyuki Mizuno editors |
| Edizione | [1st ed. 2013.] |
| Pubbl/distr/stampa | New York, : Springer, 2013 |
| Descrizione fisica | 1 online resource (213 p.) |
| Disciplina |
004.16004
621.3973 |
| Altri autori (Persone) |
KawaharaTakayuki
MizunoHiroyuki |
| Soggetto topico |
Electronic digital computers - Power supply
Computer systems - Energy conservation Green technology Low voltage systems |
| ISBN |
1-283-90983-9
1-4614-0812-1 |
| Formato | Materiale a stampa |
| Livello bibliografico | Monografia |
| Lingua di pubblicazione | eng |
| Nota di contenuto | Introduction.- Low-Power Electron Devices -- Low-Power Spin Devices -- Low-Power SRAM.- Low-Power DRAM -- Low-Power NV-RAM -- On-Chip Power Gating Technique -- Low-Power Processing with NV-RAM -- Closing. |
| Record Nr. | UNINA-9910437782503321 |
| New York, : Springer, 2013 | ||
| Materiale a stampa | ||
| Lo trovi qui: Univ. Federico II | ||
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Power management in mobile devices [[electronic resource] /] / Findlay Shearer
| Power management in mobile devices [[electronic resource] /] / Findlay Shearer |
| Autore | Shearer Findlay |
| Edizione | [1st edition] |
| Pubbl/distr/stampa | Burlington, MA, : Newnes, c2008 |
| Descrizione fisica | 1 online resource (337 p.) |
| Disciplina | 621.384 |
| Collana | Communications engineering series |
| Soggetto topico |
Electronic digital computers - Power supply
Wireless communication systems - Power supply Personal communication service systems - Power supply |
| Soggetto genere / forma | Electronic books. |
| ISBN |
1-281-11239-9
9786611112394 0-08-055640-X |
| Formato | Materiale a stampa |
| Livello bibliografico | Monografia |
| Lingua di pubblicazione | eng |
| Nota di contenuto |
Front Cover; Power Management in Mobile Devices; Copyright Page; Contents; Preface; About the Author; Chapter 1. Introduction to Power Management in Portable Personal Devices; 1.1 Power Trends; 1.2 Mobile Devices and Applications; 1.2.1 Cellular Phones; 1.2.2 Portable Media Players; 1.2.3 Portable Digital Audio Players; 1.2.4 Portable Navigation Devices; 1.3 Cellular Handsets: Deeper Dive; 1.3.1 Cellular System Overview; 1.3.2 Evolution of Cellular Systems; 1.3.3 Cellular Handset Teardown; 1.3.4 Seamless Mobility: Connectivity; 1.4 Summary; Chapter 2. Hierarchical View of Energy Conservation
2.1 Issues and Challenges 2.1.1 Closing the Technology Gaps; 2.1.2 Always On, Always Connected: Paradox of the Portable Age; 2.1.3 Balancing Battery Life with Performance and Cost; 2.2 Power versus Energy Types; 2.2.1 The Elements Power Consumption; 2.2.2 Elements of Dynamic and Static Power; 2.3 Hierarchy of Energy Conservation Techniques; 2.4 Low Power Process and Transistor Technology; 2.4.1 Process Technology Scaling; 2.4.2 Transistors and Interconnects; 2.5 Low Power Packaging Techniques; 2.5.1 Introduction; 2.5.2 Systems-in-Package; 2.5.3 Package-on-Package; 2.5.4 SiP versus PoP 2.6 Summary Chapter 3. Low Power Design Techniques, Design Methodology, and Tools; 3.1 Low Power Design Techniques; 3.1.1 Dynamic Process Temperature Compensation; 3.1.2 Static Process Compensation; 3.1.3 Power Gating; 3.1.4 State-Retention Power Gating; 3.2 Low Power Architectural and Subsystem Techniques; 3.2.1 Clock Gating; 3.2.2 Asynchronous Techniques: GALS; 3.2.3 Power Saving Modes; 3.3 Low Power SoC Design Methodology, Tools, and Standards; 3.3.1 Introduction; 3.3.2 Low Power Design Process; 3.3.3 Key EDA Vendors Approach to Low Power Design; 3.3.4 Low Power Format Standards 3.4 Summary Chapter 4. Energy Optimized Software; 4.1 Mobile Software Platform; 4.1.1 Modem Software; 4.1.2 Application Software; 4.1.3 Operating Systems for Mobile Devices; 4.1.4 Why an Operating System? Application Execution Environment; 4.2 Energy Efficient Software; 4.2.1 Dynamic Power Management; 4.2.2 Energy Efficient Compilers; 4.2.3 Application-Driven Power Management; 4.2.4 Advanced Power Management; 4.2.5 Advanced Configuration and Power Interface; 4.2.6 The Demand for Application-Driven Power Management; 4.3 Summary; Chapter 5. Batteries and Displays for Mobile Devices 5.1 Introduction 5.1.1 Battery Challenge; 5.1.2 Evolution of Battery Technology; 5.2 Battery Fundamentals; 5.3 Battery Technologies; 5.3.1 Sealed Lead Acid; 5.3.2 Nickel Cadmium; 5.3.3 Nickel Metal Hydride; 5.3.4 Lithium Ion; 5.3.5 Lithium-Ion Polymer; 5.3.6 Other Lithium-Ion Types; 5.4 Battery Chemistry Selection; 5.5 Portable Device Display Technologies; 5.5.1 Mobile Device Power Distribution; 5.5.2 Backlights; 5.5.3 Display Technologies; 5.6 Low Power LCD Display Techniques; 5.6.1 Dynamic Luminance Scaling; 5.6.2 Extended DLS; 5.6.3 Backlight Autoregulation; 5.6.4 Frame Buffer Compression 5.6.5 Dynamic Color Depth |
| Record Nr. | UNINA-9910458598203321 |
|
Shearer Findlay
|
||
| Burlington, MA, : Newnes, c2008 | ||
| Materiale a stampa | ||
| Lo trovi qui: Univ. Federico II | ||
| ||
Power management in mobile devices [[electronic resource] /] / Findlay Shearer
| Power management in mobile devices [[electronic resource] /] / Findlay Shearer |
| Autore | Shearer Findlay |
| Edizione | [1st edition] |
| Pubbl/distr/stampa | Burlington, MA, : Newnes, c2008 |
| Descrizione fisica | 1 online resource (337 p.) |
| Disciplina | 621.384 |
| Collana | Communications engineering series |
| Soggetto topico |
Electronic digital computers - Power supply
Wireless communication systems - Power supply Personal communication service systems - Power supply |
| ISBN |
1-281-11239-9
9786611112394 0-08-055640-X |
| Formato | Materiale a stampa |
| Livello bibliografico | Monografia |
| Lingua di pubblicazione | eng |
| Nota di contenuto |
Front Cover; Power Management in Mobile Devices; Copyright Page; Contents; Preface; About the Author; Chapter 1. Introduction to Power Management in Portable Personal Devices; 1.1 Power Trends; 1.2 Mobile Devices and Applications; 1.2.1 Cellular Phones; 1.2.2 Portable Media Players; 1.2.3 Portable Digital Audio Players; 1.2.4 Portable Navigation Devices; 1.3 Cellular Handsets: Deeper Dive; 1.3.1 Cellular System Overview; 1.3.2 Evolution of Cellular Systems; 1.3.3 Cellular Handset Teardown; 1.3.4 Seamless Mobility: Connectivity; 1.4 Summary; Chapter 2. Hierarchical View of Energy Conservation
2.1 Issues and Challenges 2.1.1 Closing the Technology Gaps; 2.1.2 Always On, Always Connected: Paradox of the Portable Age; 2.1.3 Balancing Battery Life with Performance and Cost; 2.2 Power versus Energy Types; 2.2.1 The Elements Power Consumption; 2.2.2 Elements of Dynamic and Static Power; 2.3 Hierarchy of Energy Conservation Techniques; 2.4 Low Power Process and Transistor Technology; 2.4.1 Process Technology Scaling; 2.4.2 Transistors and Interconnects; 2.5 Low Power Packaging Techniques; 2.5.1 Introduction; 2.5.2 Systems-in-Package; 2.5.3 Package-on-Package; 2.5.4 SiP versus PoP 2.6 Summary Chapter 3. Low Power Design Techniques, Design Methodology, and Tools; 3.1 Low Power Design Techniques; 3.1.1 Dynamic Process Temperature Compensation; 3.1.2 Static Process Compensation; 3.1.3 Power Gating; 3.1.4 State-Retention Power Gating; 3.2 Low Power Architectural and Subsystem Techniques; 3.2.1 Clock Gating; 3.2.2 Asynchronous Techniques: GALS; 3.2.3 Power Saving Modes; 3.3 Low Power SoC Design Methodology, Tools, and Standards; 3.3.1 Introduction; 3.3.2 Low Power Design Process; 3.3.3 Key EDA Vendors Approach to Low Power Design; 3.3.4 Low Power Format Standards 3.4 Summary Chapter 4. Energy Optimized Software; 4.1 Mobile Software Platform; 4.1.1 Modem Software; 4.1.2 Application Software; 4.1.3 Operating Systems for Mobile Devices; 4.1.4 Why an Operating System? Application Execution Environment; 4.2 Energy Efficient Software; 4.2.1 Dynamic Power Management; 4.2.2 Energy Efficient Compilers; 4.2.3 Application-Driven Power Management; 4.2.4 Advanced Power Management; 4.2.5 Advanced Configuration and Power Interface; 4.2.6 The Demand for Application-Driven Power Management; 4.3 Summary; Chapter 5. Batteries and Displays for Mobile Devices 5.1 Introduction 5.1.1 Battery Challenge; 5.1.2 Evolution of Battery Technology; 5.2 Battery Fundamentals; 5.3 Battery Technologies; 5.3.1 Sealed Lead Acid; 5.3.2 Nickel Cadmium; 5.3.3 Nickel Metal Hydride; 5.3.4 Lithium Ion; 5.3.5 Lithium-Ion Polymer; 5.3.6 Other Lithium-Ion Types; 5.4 Battery Chemistry Selection; 5.5 Portable Device Display Technologies; 5.5.1 Mobile Device Power Distribution; 5.5.2 Backlights; 5.5.3 Display Technologies; 5.6 Low Power LCD Display Techniques; 5.6.1 Dynamic Luminance Scaling; 5.6.2 Extended DLS; 5.6.3 Backlight Autoregulation; 5.6.4 Frame Buffer Compression 5.6.5 Dynamic Color Depth |
| Record Nr. | UNINA-9910784754203321 |
|
Shearer Findlay
|
||
| Burlington, MA, : Newnes, c2008 | ||
| Materiale a stampa | ||
| Lo trovi qui: Univ. Federico II | ||
| ||
Power management in mobile devices / / Findlay Shearer
| Power management in mobile devices / / Findlay Shearer |
| Autore | Shearer Findlay |
| Edizione | [1st edition] |
| Pubbl/distr/stampa | Burlington, MA, : Newnes, c2008 |
| Descrizione fisica | 1 online resource (337 p.) |
| Disciplina | 621.384 |
| Collana | Communications engineering series |
| Soggetto topico |
Electronic digital computers - Power supply
Wireless communication systems - Power supply Personal communication service systems - Power supply |
| ISBN |
1-281-11239-9
9786611112394 0-08-055640-X |
| Formato | Materiale a stampa |
| Livello bibliografico | Monografia |
| Lingua di pubblicazione | eng |
| Nota di contenuto |
Front Cover; Power Management in Mobile Devices; Copyright Page; Contents; Preface; About the Author; Chapter 1. Introduction to Power Management in Portable Personal Devices; 1.1 Power Trends; 1.2 Mobile Devices and Applications; 1.2.1 Cellular Phones; 1.2.2 Portable Media Players; 1.2.3 Portable Digital Audio Players; 1.2.4 Portable Navigation Devices; 1.3 Cellular Handsets: Deeper Dive; 1.3.1 Cellular System Overview; 1.3.2 Evolution of Cellular Systems; 1.3.3 Cellular Handset Teardown; 1.3.4 Seamless Mobility: Connectivity; 1.4 Summary; Chapter 2. Hierarchical View of Energy Conservation
2.1 Issues and Challenges 2.1.1 Closing the Technology Gaps; 2.1.2 Always On, Always Connected: Paradox of the Portable Age; 2.1.3 Balancing Battery Life with Performance and Cost; 2.2 Power versus Energy Types; 2.2.1 The Elements Power Consumption; 2.2.2 Elements of Dynamic and Static Power; 2.3 Hierarchy of Energy Conservation Techniques; 2.4 Low Power Process and Transistor Technology; 2.4.1 Process Technology Scaling; 2.4.2 Transistors and Interconnects; 2.5 Low Power Packaging Techniques; 2.5.1 Introduction; 2.5.2 Systems-in-Package; 2.5.3 Package-on-Package; 2.5.4 SiP versus PoP 2.6 Summary Chapter 3. Low Power Design Techniques, Design Methodology, and Tools; 3.1 Low Power Design Techniques; 3.1.1 Dynamic Process Temperature Compensation; 3.1.2 Static Process Compensation; 3.1.3 Power Gating; 3.1.4 State-Retention Power Gating; 3.2 Low Power Architectural and Subsystem Techniques; 3.2.1 Clock Gating; 3.2.2 Asynchronous Techniques: GALS; 3.2.3 Power Saving Modes; 3.3 Low Power SoC Design Methodology, Tools, and Standards; 3.3.1 Introduction; 3.3.2 Low Power Design Process; 3.3.3 Key EDA Vendors Approach to Low Power Design; 3.3.4 Low Power Format Standards 3.4 Summary Chapter 4. Energy Optimized Software; 4.1 Mobile Software Platform; 4.1.1 Modem Software; 4.1.2 Application Software; 4.1.3 Operating Systems for Mobile Devices; 4.1.4 Why an Operating System? Application Execution Environment; 4.2 Energy Efficient Software; 4.2.1 Dynamic Power Management; 4.2.2 Energy Efficient Compilers; 4.2.3 Application-Driven Power Management; 4.2.4 Advanced Power Management; 4.2.5 Advanced Configuration and Power Interface; 4.2.6 The Demand for Application-Driven Power Management; 4.3 Summary; Chapter 5. Batteries and Displays for Mobile Devices 5.1 Introduction 5.1.1 Battery Challenge; 5.1.2 Evolution of Battery Technology; 5.2 Battery Fundamentals; 5.3 Battery Technologies; 5.3.1 Sealed Lead Acid; 5.3.2 Nickel Cadmium; 5.3.3 Nickel Metal Hydride; 5.3.4 Lithium Ion; 5.3.5 Lithium-Ion Polymer; 5.3.6 Other Lithium-Ion Types; 5.4 Battery Chemistry Selection; 5.5 Portable Device Display Technologies; 5.5.1 Mobile Device Power Distribution; 5.5.2 Backlights; 5.5.3 Display Technologies; 5.6 Low Power LCD Display Techniques; 5.6.1 Dynamic Luminance Scaling; 5.6.2 Extended DLS; 5.6.3 Backlight Autoregulation; 5.6.4 Frame Buffer Compression 5.6.5 Dynamic Color Depth |
| Record Nr. | UNINA-9910824296903321 |
|
Shearer Findlay
|
||
| Burlington, MA, : Newnes, c2008 | ||
| Materiale a stampa | ||
| Lo trovi qui: Univ. Federico II | ||
| ||
Power-aware computer systems : 4th International Workshop, PACS 2004, Portland, OR, USA, December 5, 2004 : revised selected papers / / Babak Falsafi, T.N. Vijaykumar (eds.)
| Power-aware computer systems : 4th International Workshop, PACS 2004, Portland, OR, USA, December 5, 2004 : revised selected papers / / Babak Falsafi, T.N. Vijaykumar (eds.) |
| Edizione | [1st ed. 2005.] |
| Pubbl/distr/stampa | Berlin ; ; New York, : Springer, c2005 |
| Descrizione fisica | 1 online resource (X, 181 p.) |
| Disciplina | 621.3916 |
| Altri autori (Persone) |
FalsafiBabak
VijaykumarT. N. <1967-> |
| Collana | Lecture notes in computer science |
| Soggetto topico |
Portable computers - Power supply
Electronic digital computers - Power supply Electric batteries Energy conservation Low voltage integrated circuits - Design and construction |
| ISBN | 3-540-31485-7 |
| Formato | Materiale a stampa |
| Livello bibliografico | Monografia |
| Lingua di pubblicazione | eng |
| Nota di contenuto | Microarchitecture- and Circuit-Level Techniques -- An Optimized Front-End Physical Register File with Banking and Writeback Filtering -- Reducing Delay and Power Consumption of the Wakeup Logic Through Instruction Packing and Tag Memoization -- Bit-Sliced Datapath for Energy-Efficient High Performance Microprocessors -- Low-Overhead Core Swapping for Thermal Management -- Power-Aware Memory and Interconnect Systems -- Software–Hardware Cooperative Power Management for Main Memory -- Energy-Aware Data Prefetching for General-Purpose Programs -- Bus Power Estimation and Power-Efficient Bus Arbitration for System-on-a-Chip Embedded Systems -- Context-Independent Codes for Off-Chip Interconnects -- Frequency-/Voltage-Scaling Techniques -- Dynamic Processor Throttling for Power Efficient Computations -- Effective Dynamic Voltage Scaling Through CPU-Boundedness Detection -- Safe Overprovisioning: Using Power Limits to Increase Aggregate Throughput -- Power Consumption Breakdown on a Modern Laptop -- Erratum -- Erratum. |
| Record Nr. | UNINA-9910484166103321 |
| Berlin ; ; New York, : Springer, c2005 | ||
| Materiale a stampa | ||
| Lo trovi qui: Univ. Federico II | ||
| ||
Power-aware computer systems : Third International Workshop, PACS 2003, San Diego, CA, USA, December 1, 2003 : revised papers / / Babak Falsafi, T.N. Vijaykumar (eds.)
| Power-aware computer systems : Third International Workshop, PACS 2003, San Diego, CA, USA, December 1, 2003 : revised papers / / Babak Falsafi, T.N. Vijaykumar (eds.) |
| Edizione | [1st ed. 2005.] |
| Pubbl/distr/stampa | Berlin ; ; New York, : Springer, c2004 |
| Descrizione fisica | 1 online resource (X, 215 p.) |
| Disciplina | 621.3916 |
| Altri autori (Persone) |
FalsafiBabak
VijaykumarT. N. <1967-> |
| Collana | Lecture notes in computer science |
| Soggetto topico |
Portable computers - Power supply
Electronic digital computers - Power supply Electric batteries Energy conservation Low voltage integrated circuits - Design and construction |
| ISBN | 3-540-28641-1 |
| Formato | Materiale a stampa |
| Livello bibliografico | Monografia |
| Lingua di pubblicazione | eng |
| Nota di contenuto | Compilers -- Runtime Biased Pointer Reuse Analysis and Its Application to Energy Efficiency -- Inter-program Compilation for Disk Energy Reduction -- Embedded Systems -- Energy Consumption in Mobile Devices: Why Future Systems Need Requirements–Aware Energy Scale-Down -- Efficient Scratchpad Allocation Algorithms for Energy Constrained Embedded Systems -- Online Prediction of Battery Lifetime for Embedded and Mobile Devices -- Synchroscalar: Initial Lessons in Power-Aware Design of a Tile-Based Embedded Architecture -- Heterogeneous Wireless Network Management -- Microarchitectural Techniques -- “Look It Up” or “Do the Math”: An Energy, Area, and Timing Analysis of Instruction Reuse and Memoization -- CPU Packing for Multiprocessor Power Reduction -- Exploring the Potential of Architecture-Level Power Optimizations -- Coupled Power and Thermal Simulation with Active Cooling -- Cache and Memory Systems -- The Synergy Between Power-Aware Memory Systems and Processor Voltage Scaling -- Hot-and-Cold: Using Criticality in the Design of Energy-Efficient Caches -- PARROT: Power Awareness Through Selective Dynamically Optimized Traces. |
| Altri titoli varianti | PACS 2003 |
| Record Nr. | UNINA-9910483432003321 |
| Berlin ; ; New York, : Springer, c2004 | ||
| Materiale a stampa | ||
| Lo trovi qui: Univ. Federico II | ||
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