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Computational Neuroscience: Cortical Dynamics [[electronic resource] ] : 8th International Summer School on Neural Nets, Erice, Italy, October 31 - November 6, 2003 Revised Lectures / / edited by Peter Erdi, Anna Esposito, Maria Marinaro, Silvia Scarpetta
| Computational Neuroscience: Cortical Dynamics [[electronic resource] ] : 8th International Summer School on Neural Nets, Erice, Italy, October 31 - November 6, 2003 Revised Lectures / / edited by Peter Erdi, Anna Esposito, Maria Marinaro, Silvia Scarpetta |
| Edizione | [1st ed. 2004.] |
| Pubbl/distr/stampa | Berlin, Heidelberg : , : Springer Berlin Heidelberg : , : Imprint : Springer, , 2004 |
| Descrizione fisica | 1 online resource (IX, 164 p.) |
| Disciplina | 612.825 |
| Collana | Lecture Notes in Computer Science |
| Soggetto topico |
Neurology
Computers Artificial intelligence Computer memory systems Computer science—Mathematics Neurosciences Neurology Computation by Abstract Devices Artificial Intelligence Memory Structures Symbolic and Algebraic Manipulation |
| Formato | Materiale a stampa  |
| Livello bibliografico | Monografia |
| Lingua di pubblicazione | eng |
| Nota di contenuto | Section 1 – Fundamentals of Cortical Dynamics -- Dynamics of Storage and Recall in Hippocampal Associative Memory Networks -- On the Nested Hierarchical Organization of CNS: Basic Characteristics of Neuronal Molecular Networks -- Neural Phase Transitions That Made Us Mammals -- Section 2 – Mathematical Models of Cortical Dynamics -- Mean Field Methods for Cortical Network Dynamics -- Chaotic Neuron Dynamics, Synchronization, and Feature Binding -- A Complex Systems Approach to an Interpretation of Dynamic Brain Activity I: Chaotic Itinerancy Can Provide a Mathematical Basis for Information Processing in Cortical Transitory and Nonstationary Dynamics -- A Complex Systems Approach to an Interpretation of Dynamic Brain Activity II: Does Cantor Coding Provide a Dynamic Model for the Formation of Episodic Memory? -- Itinerant Dynamics of Class I* Neurons Coupled by Gap Junctions. |
| Record Nr. | UNISA-996465536703316 |
| Berlin, Heidelberg : , : Springer Berlin Heidelberg : , : Imprint : Springer, , 2004 | ||
| Materiale a stampa | ||
| Lo trovi qui: Univ. di Salerno | ||
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Correct Hardware Design and Verification Methods [[electronic resource] ] : IFIP WG 10.2 Advanced Research Working Conference, CHARME'93, Arles, France, May 24-26, 1993. Proceedings / / edited by George J. Milne, Laurence Pierre
| Correct Hardware Design and Verification Methods [[electronic resource] ] : IFIP WG 10.2 Advanced Research Working Conference, CHARME'93, Arles, France, May 24-26, 1993. Proceedings / / edited by George J. Milne, Laurence Pierre |
| Edizione | [1st ed. 1993.] |
| Pubbl/distr/stampa | Berlin, Heidelberg : , : Springer Berlin Heidelberg : , : Imprint : Springer, , 1993 |
| Descrizione fisica | 1 online resource (IX, 275 p.) |
| Disciplina | 621.39/2 |
| Collana | Lecture Notes in Computer Science |
| Soggetto topico |
Computers
Computer hardware Microprogramming Arithmetic and logic units, Computer Computer memory systems Input-output equipment (Computers) Theory of Computation Computer Hardware Control Structures and Microprogramming Arithmetic and Logic Structures Memory Structures Input/Output and Data Communications |
| ISBN | 3-540-70655-0 |
| Formato | Materiale a stampa |
| Livello bibliografico | Monografia |
| Lingua di pubblicazione | eng |
| Nota di contenuto | A graph-based method for timing diagrams representation and verification -- A Petri Net approach for the analysis of VHDL descriptions -- Temporal analysis of time bounded digital systems -- Strongly-typed theory of structures and behaviours -- Verification and diagnosis of digital systems by ternary reasoning -- Logic verification of incomplete functions and design error location -- A methodology for system-level design for verifiability -- Algebraic models and the correctness of microprocessors -- Combining symbolic evaluation and object oriented approach for verifying processor-like architectures at the RT-level -- A theory of generic interpreters -- Towards verifying large(r) systems: A strategy and an experiment -- Advancements in symbolic traversal techniques -- Automatic verification of speed-independent circuit designs using the Circal system -- Correct compilation of specifications to deterministic asynchronous circuits -- DDD-FM9001: Derivation of a verified microprocessor -- Calculational derivation of a counter with bounded response time -- Towards a provably correct hardware implementation of occam -- Rewriting with constraints in T-ruby -- Embedding hardware verification within a commercial design framework -- An approach to formalization of data flow graphs. |
| Record Nr. | UNISA-996466086203316 |
| Berlin, Heidelberg : , : Springer Berlin Heidelberg : , : Imprint : Springer, , 1993 | ||
| Materiale a stampa | ||
| Lo trovi qui: Univ. di Salerno | ||
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Field-Programmable Logic and Applications: Reconfigurable Computing Is Going Mainstream [[electronic resource] ] : Reconfigurable Computing Is Going Mainstream / / edited by Manfred Glesner, Peter Zipf, Michel Renovell
| Field-Programmable Logic and Applications: Reconfigurable Computing Is Going Mainstream [[electronic resource] ] : Reconfigurable Computing Is Going Mainstream / / edited by Manfred Glesner, Peter Zipf, Michel Renovell |
| Edizione | [1st ed. 2002.] |
| Pubbl/distr/stampa | Berlin, Heidelberg : , : Springer Berlin Heidelberg : , : Imprint : Springer, , 2002 |
| Descrizione fisica | 1 online resource (XLIV, 1192 p. 330 illus.) |
| Disciplina | 621.39/5 |
| Collana | Lecture Notes in Computer Science |
| Soggetto topico |
Architecture, Computer
Software engineering Logic design Computer memory systems Microprocessors Computer communication systems Computer System Implementation Software Engineering/Programming and Operating Systems Logic Design Memory Structures Processor Architectures Computer Communication Networks |
| ISBN | 3-540-46117-5 |
| Formato | Materiale a stampa |
| Livello bibliografico | Monografia |
| Lingua di pubblicazione | eng |
| Nota di contenuto | Keynote Address -- Trends -- Rapid Prototyping -- FPGA Synthesis -- Custom Computing Engines -- DSP Applications 1 -- Reconfigurable Fabrics -- Dynamic Reconfiguration 1 -- DSP Applications 2 -- Routing & Placement -- Dynamic Reconfiguration 2 -- Power Estimation -- Synthesis Issues -- Keynote Address -- Communication Applications 1 -- New Technologies -- Reconfigurable Architectures -- Communication Applications 2 -- Multimedia Applications -- FPGA-based Arithmetic 1 -- Reconfigurable Processors -- Testing & Fault-Toloerance -- FPGA-based Arithmetic 2 -- Reconfigurable Systems -- Image Processing -- Crypto Applications 1 -- Keynote Address -- Multitasking -- Special Architectures -- Crypto Applications 2 -- Compilation Techniques -- DSP Applications 3 -- Complex Applications -- Architecture Implementation -- Design Flow -- Miscellaneous -- Short Papers. |
| Record Nr. | UNISA-996466219203316 |
| Berlin, Heidelberg : , : Springer Berlin Heidelberg : , : Imprint : Springer, , 2002 | ||
| Materiale a stampa | ||
| Lo trovi qui: Univ. di Salerno | ||
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Formal Techniques in Real-Time and Fault-Tolerant Systems [[electronic resource] ] : Third International Symposium Organized Jointly with the Working Group Provably Correct Systems - ProCos, Lübeck, Germany, September 19 - 23, 1994. Proceedings / / edited by Hans Langmaack, Willem-Paul de Roever, Jan Vytopil
| Formal Techniques in Real-Time and Fault-Tolerant Systems [[electronic resource] ] : Third International Symposium Organized Jointly with the Working Group Provably Correct Systems - ProCos, Lübeck, Germany, September 19 - 23, 1994. Proceedings / / edited by Hans Langmaack, Willem-Paul de Roever, Jan Vytopil |
| Edizione | [1st ed. 1994.] |
| Pubbl/distr/stampa | Berlin, Heidelberg : , : Springer Berlin Heidelberg : , : Imprint : Springer, , 1994 |
| Descrizione fisica | 1 online resource (XIV, 787 p.) |
| Disciplina | 004.0151 |
| Collana | Lecture Notes in Computer Science |
| Soggetto topico |
Computers
Programming languages (Electronic computers) Computer logic Microprocessors Special purpose computers Computer memory systems Theory of Computation Programming Languages, Compilers, Interpreters Logics and Meanings of Programs Processor Architectures Special Purpose and Application-Based Systems Memory Structures |
| ISBN | 3-540-48984-3 |
| Formato | Materiale a stampa |
| Livello bibliografico | Monografia |
| Lingua di pubblicazione | eng |
| Nota di contenuto | Hybrid verification by exploiting the environment -- Correctness of real time systems by construction -- Specifying and verifying fault-tolerant systems -- Development of hybrid systems -- Linear duration invariants -- Efficient reconfiguration of trees: A case study in methodical design of nonmasking fault-tolerant programs -- A comparison of Statecharts variants -- A calculus of stochastic systems -- Verification of an audio control protocol -- Verifying invariance properties of timed systems with duration variables -- Predicting logical and temporal properties of real-time systems using Synchronized Elementary Nets -- Designing and implementing correct real-time systems -- Specification and refinement of finite dataflow networks — a relational approach -- Activation-oriented specification of real-time systems -- Provably Correct Systems -- Simulation approach to provably correct hardware compilation -- Verification methods for the divergent runs of clock systems -- Fault-tolerant bisimulation and process transformations -- Layering of real-time distributed processes -- Testing and refinement for nondeterministic and probabilistic processes -- Proving safety properties of hybrid systems -- A layered real-time specification of a RISC processor -- A real time fault tolerant microprocessor based On-Board Computer System for INSAT-2 spacecraft -- Reasoning about durations in Metric Temporal Logic -- Scheduling in critical real-time systems: a manifesto -- Stepwise development of fault-tolerant reactive systems -- Distributed implementation of SIGNAL: Scheduling & graph clustering -- Derivation of the input conditional formula from a reactive system specification in temporal logic -- From physical modelling to compositional models of hybrid systems -- Specification and transformation of reactive systems with time restrictions and concurrency -- Languages for reactive specifications: Synchrony vs asynchrony -- Specification and verification of controlled systems -- Towards a duration calculus proof assistant in PVS -- Algebraic reasoning for real-time probabilistic processes with uncertain information -- Specifying timed state sequences in powerful decidable logics and timed automata -- A calculus for hybrid sampled data systems -- Formal design of hybrid systems -- A formal proof of the Deadline Driven scheduler -- Tools Demonstration. |
| Record Nr. | UNISA-996466147903316 |
| Berlin, Heidelberg : , : Springer Berlin Heidelberg : , : Imprint : Springer, , 1994 | ||
| Materiale a stampa | ||
| Lo trovi qui: Univ. di Salerno | ||
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Intelligent Memory Systems [[electronic resource] ] : Second International Workshop, IMS 2000, Cambridge, MA, USA, November 12, 2000. Revised Papers / / edited by Frederic T. Chong, Christoforos Kozyrakis, Mark Oskin
| Intelligent Memory Systems [[electronic resource] ] : Second International Workshop, IMS 2000, Cambridge, MA, USA, November 12, 2000. Revised Papers / / edited by Frederic T. Chong, Christoforos Kozyrakis, Mark Oskin |
| Edizione | [1st ed. 2001.] |
| Pubbl/distr/stampa | Berlin, Heidelberg : , : Springer Berlin Heidelberg : , : Imprint : Springer, , 2001 |
| Descrizione fisica | 1 online resource (VIII, 200 p.) |
| Disciplina | 005.4/35 |
| Collana | Lecture Notes in Computer Science |
| Soggetto topico |
Artificial intelligence
Computer engineering Computer memory systems Computer organization Operating systems (Computers) Computer logic Artificial Intelligence Computer Engineering Memory Structures Computer Systems Organization and Communication Networks Operating Systems Logics and Meanings of Programs |
| ISBN | 3-540-44570-6 |
| Formato | Materiale a stampa |
| Livello bibliografico | Monografia |
| Lingua di pubblicazione | eng |
| Nota di contenuto | Memory Technology -- A 64Mbit Mesochronous Hybrid Wave Pipelined Multibank DRAM Macro -- Software Controlled Reconfigurable On-chip Memory for High Performance Computing -- Processor and Memory Architecture -- Content-Based Prefetching: Initial Results -- Memory System Support for Dynamic Cache Line Assembly -- Adaptively Mapping Code in an Intelligent Memory Architecture -- Applications and Operating Systems -- The Characterization of Data Intensive Memory Workloads on Distributed PIM Systems? -- Memory Management in a PIM-Based Architecture -- Compiler Technology -- Exploiting On-chip Memory Bandwidth in the VIRAM Compiler -- FlexCache: A Framework for Flexible Compiler Generated Data Caching -- Poster Session -- Aggressive Memory-Aware Compilation -- Energy/Performance Design of Memory Hierarchies for Processor-in-Memory Chips? -- SAGE: A New Analysis and Optimization System for FlexRAM Architecture -- Performance/Energy Efficiency of Variable Line-Size Caches for Intelligent Memory Systems -- The DIVA Emulator: Accelerating Architecture Studies for PIM-Based Systems -- Compiler-Directed Cache Line Size Adaptivity ? -- Summary of Question/Answer Sessions for Workshop Presentations. |
| Record Nr. | UNISA-996465783103316 |
| Berlin, Heidelberg : , : Springer Berlin Heidelberg : , : Imprint : Springer, , 2001 | ||
| Materiale a stampa | ||
| Lo trovi qui: Univ. di Salerno | ||
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Lightweight Cryptography for Security and Privacy [[electronic resource] ] : 5th International Workshop, LightSec 2016, Aksaray, Turkey, September 21-22, 2016, Revised Selected Papers / / edited by Andrey Bogdanov
| Lightweight Cryptography for Security and Privacy [[electronic resource] ] : 5th International Workshop, LightSec 2016, Aksaray, Turkey, September 21-22, 2016, Revised Selected Papers / / edited by Andrey Bogdanov |
| Edizione | [1st ed. 2017.] |
| Pubbl/distr/stampa | Cham : , : Springer International Publishing : , : Imprint : Springer, , 2017 |
| Descrizione fisica | 1 online resource (VII, 149 p. 34 illus.) |
| Disciplina | 005.82 |
| Collana | Security and Cryptology |
| Soggetto topico |
Data encryption (Computer science)
Computer security Coding theory Information theory Computer memory systems Artificial intelligence Cryptology Systems and Data Security Coding and Information Theory Memory Structures Artificial Intelligence |
| ISBN | 3-319-55714-9 |
| Formato | Materiale a stampa |
| Livello bibliografico | Monografia |
| Lingua di pubblicazione | eng |
| Nota di contenuto | Cryptanalysis -- Lightweight designs -- Implementation challenges. |
| Record Nr. | UNISA-996466177703316 |
| Cham : , : Springer International Publishing : , : Imprint : Springer, , 2017 | ||
| Materiale a stampa | ||
| Lo trovi qui: Univ. di Salerno | ||
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LUCAS Associative Array Processor [[electronic resource] ] : Design, Programming and Application Studies / / by Christer Fernstrom, Ivan Kruzela, Bertil Svensson
| LUCAS Associative Array Processor [[electronic resource] ] : Design, Programming and Application Studies / / by Christer Fernstrom, Ivan Kruzela, Bertil Svensson |
| Autore | Fernstrom Christer |
| Edizione | [1st ed. 1986.] |
| Pubbl/distr/stampa | Berlin, Heidelberg : , : Springer Berlin Heidelberg : , : Imprint : Springer, , 1986 |
| Descrizione fisica | 1 online resource (XIV, 326 p.) |
| Disciplina | 005.18 |
| Collana | Lecture Notes in Computer Science |
| Soggetto topico |
Microprogramming
Arithmetic and logic units, Computer Computer memory systems Microprocessors Control Structures and Microprogramming Arithmetic and Logic Structures Memory Structures Processor Architectures |
| ISBN | 3-540-39785-X |
| Formato | Materiale a stampa |
| Livello bibliografico | Monografia |
| Lingua di pubblicazione | eng |
| Nota di contenuto | Parallel and associative processing -- LUCAS System Architecture -- Basic instructions -- Comparison with related designs -- LUCAS microprogramming language -- PASCAL/L — A high level language for LUCAS -- Some well-known problems implemented on LUCAS -- LUCAS as a backend processor for relational database processing -- LUCAS as a dedicated processor for image processing -- Conclusions and continued research. |
| Record Nr. | UNISA-996466112103316 |
Fernstrom Christer
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| Berlin, Heidelberg : , : Springer Berlin Heidelberg : , : Imprint : Springer, , 1986 | ||
| Materiale a stampa | ||
| Lo trovi qui: Univ. di Salerno | ||
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Memory Management [[electronic resource] ] : International Workshop IWMM 95, Kinross, UK, September 27 - 29, 1995. Proceedings / / edited by Henry G. Baker
| Memory Management [[electronic resource] ] : International Workshop IWMM 95, Kinross, UK, September 27 - 29, 1995. Proceedings / / edited by Henry G. Baker |
| Edizione | [1st ed. 1995.] |
| Pubbl/distr/stampa | Berlin, Heidelberg : , : Springer Berlin Heidelberg : , : Imprint : Springer, , 1995 |
| Descrizione fisica | 1 online resource (XII, 420 p.) |
| Disciplina | 005.4/3 |
| Collana | Lecture Notes in Computer Science |
| Soggetto topico |
Computers
Computer engineering Operating systems (Computers) Computer memory systems Logic design Electronics Microelectronics Theory of Computation Computer Engineering Operating Systems Memory Structures Logic Design Electronics and Microelectronics, Instrumentation |
| ISBN | 3-540-45511-6 |
| Formato | Materiale a stampa |
| Livello bibliografico | Monografia |
| Lingua di pubblicazione | eng |
| Nota di contenuto | Dynamic storage allocation: A survey and critical review -- Static analysis refuses to stay still: Prospects of static analyis for dynamic allocation -- Compile-time garbage collection for lazy functional languages -- Generational garbage collection without temporary space leaks for lazy functional languages -- Complementary garbage collector -- Performance tuning in a customizable collector -- MOA — A fast sliding compaction scheme for a large storage space -- A survey of distributed garbage collection techniques -- Garbage collection on an open network -- Indirect mark and sweep: A distributed GC -- On-the-fly global garbage collection based on Partly Mark-Sweep -- LEMMA: A distributed shared memory with global and local garbage collection -- One pass real-time generational mark-sweep garbage collection -- Garbage collection for control systems -- A garbage collector for the concurrent real-time language Erlang -- Progress in hardware-assisted real-time garbage collection -- A miss history-based architecture for cache prefetching -- Memory management in flash-memory disks with data compression. |
| Record Nr. | UNISA-996466104803316 |
| Berlin, Heidelberg : , : Springer Berlin Heidelberg : , : Imprint : Springer, , 1995 | ||
| Materiale a stampa | ||
| Lo trovi qui: Univ. di Salerno | ||
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Memory Management [[electronic resource] ] : International Workshop IWMM 92, St.Malo, France, September 17 - 19, 1992. Proceedings / / edited by Yves Bekkers, Jacques Cohen
| Memory Management [[electronic resource] ] : International Workshop IWMM 92, St.Malo, France, September 17 - 19, 1992. Proceedings / / edited by Yves Bekkers, Jacques Cohen |
| Edizione | [1st ed. 1992.] |
| Pubbl/distr/stampa | Berlin, Heidelberg : , : Springer Berlin Heidelberg : , : Imprint : Springer, , 1992 |
| Descrizione fisica | 1 online resource (XIV, 530 p.) |
| Disciplina | 005.4/3 |
| Collana | Lecture Notes in Computer Science |
| Soggetto topico |
Computer programming
Computer engineering Programming languages (Electronic computers) Operating systems (Computers) Computer memory systems Data structures (Computer science) Programming Techniques Computer Engineering Programming Languages, Compilers, Interpreters Operating Systems Memory Structures Data Storage Representation |
| ISBN | 3-540-47315-7 |
| Formato | Materiale a stampa |
| Livello bibliografico | Monografia |
| Lingua di pubblicazione | eng |
| Nota di contenuto | Uniprocessor garbage collection techniques -- Collection schemes for distributed garbage -- Dynamic memory management for sequential logic programming languages -- Comprehensive and robust garbage collection in a distributed system -- Experience with a fault-tolerant garbage collector in a distributed lisp system -- Scalable distributed garbage collection for systems of active objects -- Distributed garbage collection of active objects with no global synchronisation -- Memory management for parallel tasks in shared memory -- Incremental multi-threaded garbage collection on virtually shared memory architectures -- Generational garbage collection for lazy graph reduction -- A conservative garbage collector with ambiguous roots for static typechecking languages -- An efficient implementation for coroutines -- An implementation of an applicative file system -- A compile-time memory-reuse scheme for concurrent logic programs -- Finalization in the collector interface -- Precompiling C++ for garbage collection -- GC-cooperative C++ -- Dynamic revision of choice points during garbage collection in prolog [II/III] -- Ecological memory management in a continuation passing prolog engine -- Replication-based incremental copying collection -- Atomic incremental garbage collection -- Incremental collection of mature objects -- Object type directed garbage collection to improve locality -- Allocation regions & implementation contracts -- A concurrent generational garbage collector for a parallel graph reducer -- Garbage collection in Aurora: An overview -- Collections and garbage collection -- Memory management and garbage collection of an extended common lisp system for massively parallel SIMD architecture -- NREVERSAL of fortune — The thermodynamics of garbage collection. |
| Record Nr. | UNISA-996465482603316 |
| Berlin, Heidelberg : , : Springer Berlin Heidelberg : , : Imprint : Springer, , 1992 | ||
| Materiale a stampa | ||
| Lo trovi qui: Univ. di Salerno | ||
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Parallel Processing and Applied Mathematics [[electronic resource] ] : 5th International Conference, PPAM 2003, Czestochowa, Poland, September 7-10, 2003. Revised Papers / / edited by Roman Wyrzykowski, Jack Dongarra, Marcin Paprzycki, Jerzy Wasniewski
| Parallel Processing and Applied Mathematics [[electronic resource] ] : 5th International Conference, PPAM 2003, Czestochowa, Poland, September 7-10, 2003. Revised Papers / / edited by Roman Wyrzykowski, Jack Dongarra, Marcin Paprzycki, Jerzy Wasniewski |
| Edizione | [1st ed. 2004.] |
| Pubbl/distr/stampa | Berlin, Heidelberg : , : Springer Berlin Heidelberg : , : Imprint : Springer, , 2004 |
| Descrizione fisica | 1 online resource (XIX, 1179 p.) |
| Disciplina | 005.1 |
| Collana | Lecture Notes in Computer Science |
| Soggetto topico |
Architecture, Computer
Applied mathematics Engineering mathematics Software engineering Algorithms Computer science—Mathematics Computer memory systems Computer System Implementation Applications of Mathematics Software Engineering/Programming and Operating Systems Algorithm Analysis and Problem Complexity Mathematics of Computing Memory Structures |
| ISBN |
1-280-30741-2
9786610307418 3-540-24669-X |
| Formato | Materiale a stampa |
| Livello bibliografico | Monografia |
| Lingua di pubblicazione | eng |
| Nota di contenuto | Parallel and Distributed Architectures -- Scheduling and Load Balancing -- Performance Analysis and Prediction -- Parallel and Distributed Non-numerical Algorithms -- Parallel and Distributed Programming -- Tools and Environments for Parallel and Distributed Processing -- Applications of Parallel and Distributed Computing -- Evolutionary Computing with Applications -- Soft Computing -- Data and Knowledge Management -- Numerical Methods and Their Applications -- Multi-dimensional Systems – Applications and Computations -- Application Grid Workshop -- HeteroPar’03 -- Workshop on High Perfomance Numerical Algorithms -- Workshop on Large Scale Scientific Computations -- Special Session on Parallel and Distributed Bioinformatic Applications. |
| Record Nr. | UNISA-996465391803316 |
| Berlin, Heidelberg : , : Springer Berlin Heidelberg : , : Imprint : Springer, , 2004 | ||
| Materiale a stampa | ||
| Lo trovi qui: Univ. di Salerno | ||
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