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2003 NASA/DoD Conference on Evolvable Hardware : proceedings : 9-11 July, 2003, Chicago, Illinois, USA
2003 NASA/DoD Conference on Evolvable Hardware : proceedings : 9-11 July, 2003, Chicago, Illinois, USA
Pubbl/distr/stampa [Place of publication not identified], : IEEE Computer Society, 2003
Disciplina 621.39/8
Soggetto topico Computer input-output equipment - Design and construction
Computers - Circuits
Evolutionary programming (Computer science)
Genetic algorithms
Electrical & Computer Engineering
Engineering & Applied Sciences
Electrical Engineering
Formato Materiale a stampa
Livello bibliografico Monografia
Lingua di pubblicazione eng
Record Nr. UNISA-996210894703316
[Place of publication not identified], : IEEE Computer Society, 2003
Materiale a stampa
Lo trovi qui: Univ. di Salerno
Opac: Controlla la disponibilità qui
2003 NASA/DoD Conference on Evolvable Hardware : proceedings : 9-11 July, 2003, Chicago, Illinois, USA
2003 NASA/DoD Conference on Evolvable Hardware : proceedings : 9-11 July, 2003, Chicago, Illinois, USA
Pubbl/distr/stampa [Place of publication not identified], : IEEE Computer Society, 2003
Disciplina 621.39/8
Soggetto topico Computer input-output equipment - Design and construction
Computers - Circuits
Evolutionary programming (Computer science)
Genetic algorithms
Electrical & Computer Engineering
Engineering & Applied Sciences
Electrical Engineering
Formato Materiale a stampa
Livello bibliografico Monografia
Lingua di pubblicazione eng
Record Nr. UNINA-9910872553803321
[Place of publication not identified], : IEEE Computer Society, 2003
Materiale a stampa
Lo trovi qui: Univ. Federico II
Opac: Controlla la disponibilità qui
2005 NASA/DoD Conference on Evolvable Hardware : (EH-2005) : proceedings : June 29-July 1, 2005, Washington, D.C
2005 NASA/DoD Conference on Evolvable Hardware : (EH-2005) : proceedings : June 29-July 1, 2005, Washington, D.C
Pubbl/distr/stampa [Place of publication not identified], : IEEE Computer Society, 2005
Disciplina 621.39/8
Soggetto topico Computer input-output equipment - Design and construction
Computers - Circuits
Evolutionary programming (Computer science)
Genetic algorithms
Electrical & Computer Engineering
Engineering & Applied Sciences
Electrical Engineering
ISBN 1-5386-0078-1
Formato Materiale a stampa
Livello bibliografico Monografia
Lingua di pubblicazione eng
Record Nr. UNISA-996202409503316
[Place of publication not identified], : IEEE Computer Society, 2005
Materiale a stampa
Lo trovi qui: Univ. di Salerno
Opac: Controlla la disponibilità qui
2005 NASA/DoD Conference on Evolvable Hardware : (EH-2005) : proceedings : June 29-July 1, 2005, Washington, D.C
2005 NASA/DoD Conference on Evolvable Hardware : (EH-2005) : proceedings : June 29-July 1, 2005, Washington, D.C
Pubbl/distr/stampa [Place of publication not identified], : IEEE Computer Society, 2005
Disciplina 621.39/8
Soggetto topico Computer input-output equipment - Design and construction
Computers - Circuits
Evolutionary programming (Computer science)
Genetic algorithms
Electrical & Computer Engineering
Engineering & Applied Sciences
Electrical Engineering
ISBN 9781538600788
1538600781
Formato Materiale a stampa
Livello bibliografico Monografia
Lingua di pubblicazione eng
Record Nr. UNINA-9910146534303321
[Place of publication not identified], : IEEE Computer Society, 2005
Materiale a stampa
Lo trovi qui: Univ. Federico II
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Assessment of the ergonomic quality of hand-held tools and computer input devices [[electronic resource] /] / edited by Helmut Strasser
Assessment of the ergonomic quality of hand-held tools and computer input devices [[electronic resource] /] / edited by Helmut Strasser
Pubbl/distr/stampa Amsterdam ; ; Washington, D.C., : IOS Press, c2007
Descrizione fisica 1 online resource (296 p.)
Disciplina 620.82
Altri autori (Persone) StrasserHelmut
Collana Ergonomics, human factors and safety
Soggetto topico Tools - Design and construction
Computer input-output equipment - Design and construction
Human engineering
Soggetto genere / forma Electronic books.
ISBN 6611029923
1-281-02992-0
9786611029920
1-60750-277-1
600-00-0355-2
1-4356-0876-3
Formato Materiale a stampa
Livello bibliografico Monografia
Lingua di pubblicazione eng
Nota di contenuto Title page; Preface; Contents; A Systematic Approach for the Analysis and Ergonomic Design of Hand-Held Tools and Control Actuators - Visualized by some Real-Life Examples; Ergonomics Evaluation, Design and Testing of Hand Tools; A Knowledge-Based System for Utilizing Electromyographic Methods for the Measurement of Physiological Costs Associated with Operating Hand-Held Tools and Computer Input Devices; Electromyographically Determined Muscle Strain Associated with the Direction of Manual Movements in the Horizontal Reach
Effects of Hand Preference and Direction of Rotation on Screwdriver Torque Strength and Physiological Costs of Muscles Involved in Arm Pronation and SupinationMuscle Strain of the Hand-Arm-Shoulder System During Typing at Conventional and Ergonomic Keyboards; Estimated and Experienced Subjective Assessment of the Ergonomic Quality of a Keyboard; Ergonomic Evaluation of an Armrest for Typing; Electromyographic and Subjective Evaluation of a Wrist Rest; Evaluation of the Ergonomic Quality of Masons' Trowels; Assessment of the Ergonomic Quality of File Handles
Ergonomic Quality and Design Criteria of Professional-Grade ScrewdriversMaximum Torque and Muscle Strain While Using Screwdrivers with Clean and Contaminated Surfaces in Bi-Directional Use; Torque Levels, Subjective Discomfort, and Muscle Activity Associated with Four Commercially Available Screwdrivers Under Static and Dynamic Work Conditions; The Effect of Screwdriver Handle Design and Blade Length on Muscle Activity and Torque MVC; Product-Ergonomic Evaluation of Diagonal Cutter Handles; Ergonomic Snap-On-Handles for a Hand-Powered Hacksaw
Handle Design of Hedge-Clippers Assessed by Means of Electromyography and Subjective RatingAssessment of the Ergonomic Quality of Fire Nozzles; Ergonomics in the Rescue Service - Part 1: Strain-Oriented Evaluation of Ambulance Cots; Ergonomics in the Rescue Service - Part 2: Subjective Evaluation of Ambulance Cots; Authors; Author Index
Record Nr. UNINA-9910451874903321
Amsterdam ; ; Washington, D.C., : IOS Press, c2007
Materiale a stampa
Lo trovi qui: Univ. Federico II
Opac: Controlla la disponibilità qui
Assessment of the ergonomic quality of hand-held tools and computer input devices [[electronic resource] /] / edited by Helmut Strasser
Assessment of the ergonomic quality of hand-held tools and computer input devices [[electronic resource] /] / edited by Helmut Strasser
Pubbl/distr/stampa Amsterdam ; ; Washington, D.C., : IOS Press, c2007
Descrizione fisica 1 online resource (296 p.)
Disciplina 620.82
Altri autori (Persone) StrasserHelmut
Collana Ergonomics, human factors and safety
Soggetto topico Tools - Design and construction
Computer input-output equipment - Design and construction
Human engineering
ISBN 6611029923
1-281-02992-0
9786611029920
1-60750-277-1
600-00-0355-2
1-4356-0876-3
Formato Materiale a stampa
Livello bibliografico Monografia
Lingua di pubblicazione eng
Nota di contenuto Title page; Preface; Contents; A Systematic Approach for the Analysis and Ergonomic Design of Hand-Held Tools and Control Actuators - Visualized by some Real-Life Examples; Ergonomics Evaluation, Design and Testing of Hand Tools; A Knowledge-Based System for Utilizing Electromyographic Methods for the Measurement of Physiological Costs Associated with Operating Hand-Held Tools and Computer Input Devices; Electromyographically Determined Muscle Strain Associated with the Direction of Manual Movements in the Horizontal Reach
Effects of Hand Preference and Direction of Rotation on Screwdriver Torque Strength and Physiological Costs of Muscles Involved in Arm Pronation and SupinationMuscle Strain of the Hand-Arm-Shoulder System During Typing at Conventional and Ergonomic Keyboards; Estimated and Experienced Subjective Assessment of the Ergonomic Quality of a Keyboard; Ergonomic Evaluation of an Armrest for Typing; Electromyographic and Subjective Evaluation of a Wrist Rest; Evaluation of the Ergonomic Quality of Masons' Trowels; Assessment of the Ergonomic Quality of File Handles
Ergonomic Quality and Design Criteria of Professional-Grade ScrewdriversMaximum Torque and Muscle Strain While Using Screwdrivers with Clean and Contaminated Surfaces in Bi-Directional Use; Torque Levels, Subjective Discomfort, and Muscle Activity Associated with Four Commercially Available Screwdrivers Under Static and Dynamic Work Conditions; The Effect of Screwdriver Handle Design and Blade Length on Muscle Activity and Torque MVC; Product-Ergonomic Evaluation of Diagonal Cutter Handles; Ergonomic Snap-On-Handles for a Hand-Powered Hacksaw
Handle Design of Hedge-Clippers Assessed by Means of Electromyography and Subjective RatingAssessment of the Ergonomic Quality of Fire Nozzles; Ergonomics in the Rescue Service - Part 1: Strain-Oriented Evaluation of Ambulance Cots; Ergonomics in the Rescue Service - Part 2: Subjective Evaluation of Ambulance Cots; Authors; Author Index
Record Nr. UNINA-9910778105303321
Amsterdam ; ; Washington, D.C., : IOS Press, c2007
Materiale a stampa
Lo trovi qui: Univ. Federico II
Opac: Controlla la disponibilità qui
Embedded SOPC design with NIOS II processor and VHDL examples [[electronic resource] /] / Pong P. Chu
Embedded SOPC design with NIOS II processor and VHDL examples [[electronic resource] /] / Pong P. Chu
Autore Chu Pong P. <1959->
Pubbl/distr/stampa Hoboken, N.J., : Wiley, c2011
Descrizione fisica 1 online resource (738 p.)
Disciplina 621.392
621.395
Soggetto topico Systems on a chip
Field programmable gate arrays
Computer input-output equipment - Design and construction
VHDL (Computer hardware description language)
ISBN 1-283-28288-7
9786613282880
1-118-14653-0
1-118-14652-2
1-118-14650-6
Classificazione TEC008010
Formato Materiale a stampa
Livello bibliografico Monografia
Lingua di pubblicazione eng
Nota di contenuto Embedded SOPC Design with Nios II Processor and VHDL Examples; CONTENTS; Preface; Acknowledgments; 1 Overview of Embedded System; 1.1 Introduction; 1.1.1 Definition of an embedded system; 1.1.2 Example systems; 1.2 System design requirements; 1.3 Embedded SoPC systems; 1.3.1 Basic development flow; 1.4 Book organization; 1.5 Bibliographic notes; PART I BASIC DIGITAL CIRCUITS DEVELOPMENT; 2 Gate-level Combinational Circuit; 2.1 Overview of VHDL; 2.2 General description; 2.2.1 Basic lexical rules; 2.2.2 Library and package; 2.2.3 Entity declaration; 2.2.4 Data type and operators
2.2.5 Architecture body2.2.6 Code of a 2-bit comparator; 2.3 Structural description; 2.4 Testbench; 2.5 Bibliographic notes; 2.6 Suggested experiments; 2.6.1 Code for gate-level greater-than circuit; 2.6.2 Code for gate-level binary decoder; 3 Overview of FPGA and EDA Software; 3.1 FPGA; 3.1.1 Overview of a general FPGA device; 3.1.2 Overview of the Altera Cyclone II devices; 3.2 Overview of the Altera DE1 and DE2 boards; 3.3 Development flow; 3.4 Overview of Quartus II; 3.5 Short tutorial of Quartus II; 3.5.1 Create the design project; 3.5.2 Create a testbench and perform the RTL simulation
3.5.3 Compile the project3.5.4 Perform timing analysis; 3.5.5 Program the FPGA device; 3.6 Short tutorial on the ModelSim HDL simulator; 3.7 Bibliographic notes; 3.8 Suggested experiments; 3.8.1 Gate-level greater-than circuit; 3.8.2 Gate-level binary decoder; 4 RT-level Combinational Circuit; 4.1 RT-level components; 4.1.1 Relational operators; 4.1.2 Arithmetic operators; 4.1.3 Other synthesis-related VHDL constructs; 4.1.4 Summary; 4.2 Routing circuit with concurrent assignment statements; 4.2.1 Conditional signal assignment statement; 4.2.2 Selected signal assignment statement
4.3 Modeling with a process4.3.1 Process; 4.3.2 Sequential signal assignment statement; 4.4 Routing circuit with if and case statements; 4.4.1 If statement; 4.4.2 Case statement; 4.4.3 Comparison to concurrent statements; 4.4.4 Unintended memory; 4.5 Constants and generics; 4.5.1 Constants; 4.5.2 Generics; 4.6 Design examples; 4.6.1 Hexadecimal digit to seven-segment LED decoder; 4.6.2 Sign-magnitude adder; 4.6.3 Barrel shifter; 4.6.4 Simplified floating-point adder; 4.7 Bibliographic notes; 4.8 Suggested experiments; 4.8.1 Multi-function barrel shifter; 4.8.2 Dual-priority encoder
4.8.3 BCD incrementor4.8.4 Floating-point greater-than circuit; 4.8.5 Floating-point and signed integer conversion circuit; 4.8.6 Enhanced floating-point adder; 5 Regular Sequential Circuit; 5.1 Introduction; 5.1.1 D FF and register; 5.1.2 Synchronous system; 5.1.3 Code development; 5.2 HDL code of the basic storage elements; 5.2.1 D FF; 5.2.2 Register; 5.2.3 Register file; 5.2.4 SRAM; 5.3 Simple design examples; 5.3.1 Shift register; 5.3.2 Binary counter and variant; 5.4 Testbench for sequential circuits; 5.5 Timing analysis; 5.5.1 Timing parameters; 5.5.2 Timing considerations in Quartus II
5.6 Case study
Record Nr. UNINA-9910141240503321
Chu Pong P. <1959->  
Hoboken, N.J., : Wiley, c2011
Materiale a stampa
Lo trovi qui: Univ. Federico II
Opac: Controlla la disponibilità qui
Embedded SOPC design with NIOS II processor and VHDL examples / / Pong P. Chu
Embedded SOPC design with NIOS II processor and VHDL examples / / Pong P. Chu
Autore Chu Pong P. <1959->
Edizione [1st ed.]
Pubbl/distr/stampa Hoboken, N.J., : Wiley, c2011
Descrizione fisica 1 online resource (738 p.)
Disciplina 621.392
621.395
Soggetto topico Systems on a chip
Field programmable gate arrays
Computer input-output equipment - Design and construction
VHDL (Computer hardware description language)
ISBN 9786613282880
9781283282888
1283282887
9781118146538
1118146530
9781118146521
1118146522
9781118146507
1118146506
Classificazione TEC008010
Formato Materiale a stampa
Livello bibliografico Monografia
Lingua di pubblicazione eng
Nota di contenuto Embedded SOPC Design with Nios II Processor and VHDL Examples; CONTENTS; Preface; Acknowledgments; 1 Overview of Embedded System; 1.1 Introduction; 1.1.1 Definition of an embedded system; 1.1.2 Example systems; 1.2 System design requirements; 1.3 Embedded SoPC systems; 1.3.1 Basic development flow; 1.4 Book organization; 1.5 Bibliographic notes; PART I BASIC DIGITAL CIRCUITS DEVELOPMENT; 2 Gate-level Combinational Circuit; 2.1 Overview of VHDL; 2.2 General description; 2.2.1 Basic lexical rules; 2.2.2 Library and package; 2.2.3 Entity declaration; 2.2.4 Data type and operators
2.2.5 Architecture body2.2.6 Code of a 2-bit comparator; 2.3 Structural description; 2.4 Testbench; 2.5 Bibliographic notes; 2.6 Suggested experiments; 2.6.1 Code for gate-level greater-than circuit; 2.6.2 Code for gate-level binary decoder; 3 Overview of FPGA and EDA Software; 3.1 FPGA; 3.1.1 Overview of a general FPGA device; 3.1.2 Overview of the Altera Cyclone II devices; 3.2 Overview of the Altera DE1 and DE2 boards; 3.3 Development flow; 3.4 Overview of Quartus II; 3.5 Short tutorial of Quartus II; 3.5.1 Create the design project; 3.5.2 Create a testbench and perform the RTL simulation
3.5.3 Compile the project3.5.4 Perform timing analysis; 3.5.5 Program the FPGA device; 3.6 Short tutorial on the ModelSim HDL simulator; 3.7 Bibliographic notes; 3.8 Suggested experiments; 3.8.1 Gate-level greater-than circuit; 3.8.2 Gate-level binary decoder; 4 RT-level Combinational Circuit; 4.1 RT-level components; 4.1.1 Relational operators; 4.1.2 Arithmetic operators; 4.1.3 Other synthesis-related VHDL constructs; 4.1.4 Summary; 4.2 Routing circuit with concurrent assignment statements; 4.2.1 Conditional signal assignment statement; 4.2.2 Selected signal assignment statement
4.3 Modeling with a process4.3.1 Process; 4.3.2 Sequential signal assignment statement; 4.4 Routing circuit with if and case statements; 4.4.1 If statement; 4.4.2 Case statement; 4.4.3 Comparison to concurrent statements; 4.4.4 Unintended memory; 4.5 Constants and generics; 4.5.1 Constants; 4.5.2 Generics; 4.6 Design examples; 4.6.1 Hexadecimal digit to seven-segment LED decoder; 4.6.2 Sign-magnitude adder; 4.6.3 Barrel shifter; 4.6.4 Simplified floating-point adder; 4.7 Bibliographic notes; 4.8 Suggested experiments; 4.8.1 Multi-function barrel shifter; 4.8.2 Dual-priority encoder
4.8.3 BCD incrementor4.8.4 Floating-point greater-than circuit; 4.8.5 Floating-point and signed integer conversion circuit; 4.8.6 Enhanced floating-point adder; 5 Regular Sequential Circuit; 5.1 Introduction; 5.1.1 D FF and register; 5.1.2 Synchronous system; 5.1.3 Code development; 5.2 HDL code of the basic storage elements; 5.2.1 D FF; 5.2.2 Register; 5.2.3 Register file; 5.2.4 SRAM; 5.3 Simple design examples; 5.3.1 Shift register; 5.3.2 Binary counter and variant; 5.4 Testbench for sequential circuits; 5.5 Timing analysis; 5.5.1 Timing parameters; 5.5.2 Timing considerations in Quartus II
5.6 Case study
Record Nr. UNINA-9910808346303321
Chu Pong P. <1959->  
Hoboken, N.J., : Wiley, c2011
Materiale a stampa
Lo trovi qui: Univ. Federico II
Opac: Controlla la disponibilità qui
Introduction to evolvable hardware : a practical guide for designing self-adaptive systems / / Garrison W. Greenwood, Andrew M. Tyrrell
Introduction to evolvable hardware : a practical guide for designing self-adaptive systems / / Garrison W. Greenwood, Andrew M. Tyrrell
Autore Greenwood Garrison W
Pubbl/distr/stampa Piscataway, New Jersey : , : Wiley-IEEE Computer Society, , c2007
Descrizione fisica 1 online resource (210 p.)
Disciplina 621.392
Altri autori (Persone) TyrrellAndy M
Collana IEEE Press series on computational intelligence
Soggetto topico Computer input-output equipment - Design and construction
Evolutionary programming (Computer science)
ISBN 1-280-65446-5
9786610654468
0-470-04971-5
0-470-04970-7
Formato Materiale a stampa
Livello bibliografico Monografia
Lingua di pubblicazione eng
Nota di contenuto Fundamentals of evolutionary computation -- Reconfigurable digital devices -- Reconfigurable analog devices -- Putting evolvable hardware to use -- Future work.
Record Nr. UNINA-9910143577903321
Greenwood Garrison W  
Piscataway, New Jersey : , : Wiley-IEEE Computer Society, , c2007
Materiale a stampa
Lo trovi qui: Univ. Federico II
Opac: Controlla la disponibilità qui
Introduction to evolvable hardware : a practical guide for designing self-adaptive systems / / Garrison W. Greenwood, Andrew M. Tyrrell
Introduction to evolvable hardware : a practical guide for designing self-adaptive systems / / Garrison W. Greenwood, Andrew M. Tyrrell
Autore Greenwood Garrison W
Pubbl/distr/stampa Piscataway, New Jersey : , : Wiley-IEEE Computer Society, , c2007
Descrizione fisica 1 online resource (210 p.)
Disciplina 621.392
Altri autori (Persone) TyrrellAndy M
Collana IEEE Press series on computational intelligence
Soggetto topico Computer input-output equipment - Design and construction
Evolutionary programming (Computer science)
ISBN 1-280-65446-5
9786610654468
0-470-04971-5
0-470-04970-7
Formato Materiale a stampa
Livello bibliografico Monografia
Lingua di pubblicazione eng
Nota di contenuto Fundamentals of evolutionary computation -- Reconfigurable digital devices -- Reconfigurable analog devices -- Putting evolvable hardware to use -- Future work.
Record Nr. UNINA-9910830171703321
Greenwood Garrison W  
Piscataway, New Jersey : , : Wiley-IEEE Computer Society, , c2007
Materiale a stampa
Lo trovi qui: Univ. Federico II
Opac: Controlla la disponibilità qui