1999 IEEE Standard for VHDL Register Transfer Level (RTL) Synthesis
| 1999 IEEE Standard for VHDL Register Transfer Level (RTL) Synthesis |
| Pubbl/distr/stampa | [Place of publication not identified], : IEEE, 1999 |
| Descrizione fisica | 1 online resource (73 pages) |
| Disciplina | 621.392 |
| Soggetto topico |
Computer hardware description languages
VHDL (Computer hardware description language) - Standards |
| ISBN | 0-7381-1820-6 |
| Formato | Materiale a stampa |
| Livello bibliografico | Monografia |
| Lingua di pubblicazione | eng |
| Record Nr. | UNISA-996280515403316 |
| [Place of publication not identified], : IEEE, 1999 | ||
| Lo trovi qui: Univ. di Salerno | ||
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1999 IEEE Standard for VHDL Register Transfer Level (RTL) Synthesis
| 1999 IEEE Standard for VHDL Register Transfer Level (RTL) Synthesis |
| Pubbl/distr/stampa | [Place of publication not identified], : IEEE, 1999 |
| Descrizione fisica | 1 online resource (73 pages) |
| Disciplina | 621.392 |
| Soggetto topico |
Computer hardware description languages
VHDL (Computer hardware description language) - Standards |
| ISBN | 0-7381-1820-6 |
| Formato | Materiale a stampa |
| Livello bibliografico | Monografia |
| Lingua di pubblicazione | eng |
| Record Nr. | UNINA-9910142056503321 |
| [Place of publication not identified], : IEEE, 1999 | ||
| Lo trovi qui: Univ. Federico II | ||
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2020 Forum for Specification and Design Languages (FDL) / / Institute of Electrical and Electronics Engineers (IEEE)
| 2020 Forum for Specification and Design Languages (FDL) / / Institute of Electrical and Electronics Engineers (IEEE) |
| Pubbl/distr/stampa | Piscataway, New Jersey : , : Institute of Electrical and Electronics Engineers (IEEE), , 2020 |
| Descrizione fisica | 1 online resource : illustrations some color |
| Disciplina | 005.14 |
| Soggetto topico |
Computer software - Verification
Conference papers and proceedings Computer hardware description languages Software architecture |
| ISBN | 1-7281-8928-4 |
| Formato | Materiale a stampa |
| Livello bibliografico | Monografia |
| Lingua di pubblicazione | eng |
| Altri titoli varianti | 2020 Forum for Specification and Design Languages |
| Record Nr. | UNINA-9910437245703321 |
| Piscataway, New Jersey : , : Institute of Electrical and Electronics Engineers (IEEE), , 2020 | ||
| Lo trovi qui: Univ. Federico II | ||
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2020 Forum for Specification and Design Languages (FDL) / / Institute of Electrical and Electronics Engineers (IEEE)
| 2020 Forum for Specification and Design Languages (FDL) / / Institute of Electrical and Electronics Engineers (IEEE) |
| Pubbl/distr/stampa | Piscataway, New Jersey : , : Institute of Electrical and Electronics Engineers (IEEE), , 2020 |
| Descrizione fisica | 1 online resource : illustrations some color |
| Disciplina | 005.14 |
| Soggetto topico |
Computer software - Verification
Conference papers and proceedings Computer hardware description languages Software architecture |
| ISBN | 1-7281-8928-4 |
| Formato | Materiale a stampa |
| Livello bibliografico | Monografia |
| Lingua di pubblicazione | eng |
| Altri titoli varianti | 2020 Forum for Specification and Design Languages |
| Record Nr. | UNISA-996575525203316 |
| Piscataway, New Jersey : , : Institute of Electrical and Electronics Engineers (IEEE), , 2020 | ||
| Lo trovi qui: Univ. di Salerno | ||
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22nd Workshop - Methods and Description Languages for Modelling and Verification of Circuits and Systems : 8 April 2019, Kaiserslautern, Germany / / Institute of Electrical and Electronics Engineers
| 22nd Workshop - Methods and Description Languages for Modelling and Verification of Circuits and Systems : 8 April 2019, Kaiserslautern, Germany / / Institute of Electrical and Electronics Engineers |
| Edizione | [Neuerscheinung] |
| Pubbl/distr/stampa | Berlin, Germany : , : VDE Verlag, , 2019 |
| Descrizione fisica | 1 online resource (9 pages) |
| Disciplina | 621.392 |
| Soggetto topico |
Computer hardware description languages
Integrated circuits - Verification System design |
| ISBN | 3-8007-4946-7 |
| Formato | Materiale a stampa |
| Livello bibliografico | Monografia |
| Lingua di pubblicazione | eng |
| Record Nr. | UNISA-996575445603316 |
| Berlin, Germany : , : VDE Verlag, , 2019 | ||
| Lo trovi qui: Univ. di Salerno | ||
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61691-6-2009 : IEC/IEEE International Standard - Behavioural languages - Part 6: VHDL Analog and Mixed-Signal Extensions / / Institute of Electrical and Electronics Engineers
| 61691-6-2009 : IEC/IEEE International Standard - Behavioural languages - Part 6: VHDL Analog and Mixed-Signal Extensions / / Institute of Electrical and Electronics Engineers |
| Pubbl/distr/stampa | New York, NY, USA : , : IEEE, , 2009 |
| Descrizione fisica | 1 online resource (675 pages) |
| Disciplina | 621.392 |
| Soggetto topico |
VHDL (Computer hardware description language)
Computer hardware description languages |
| ISBN | 1-5044-7827-4 |
| Formato | Materiale a stampa |
| Livello bibliografico | Monografia |
| Lingua di pubblicazione | eng |
| Altri titoli varianti | 61691-6-2009 - IEC/IEEE International Standard - Behavioural languages - Part 6 |
| Record Nr. | UNINA-9910492137103321 |
| New York, NY, USA : , : IEEE, , 2009 | ||
| Lo trovi qui: Univ. Federico II | ||
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ANSI/IEEE Std 1076-1993 : IEEE Standard VHDL Language Reference Manual / / Institute of Electrical and Electronics Engineers
| ANSI/IEEE Std 1076-1993 : IEEE Standard VHDL Language Reference Manual / / Institute of Electrical and Electronics Engineers |
| Pubbl/distr/stampa | New York, NY, USA : , : IEEE, , 1994 |
| Descrizione fisica | 1 online resource (288 pages) |
| Disciplina | 621.3819 |
| Soggetto topico |
VHDL (Computer hardware description language)
Computer hardware description languages |
| ISBN | 0-7381-0986-X |
| Formato | Materiale a stampa |
| Livello bibliografico | Monografia |
| Lingua di pubblicazione | eng |
| Altri titoli varianti | ANSI/IEEE Std 1076-1993 |
| Record Nr. | UNINA-9910135445803321 |
| New York, NY, USA : , : IEEE, , 1994 | ||
| Lo trovi qui: Univ. Federico II | ||
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ANSI/IEEE Std 1076-1993 : IEEE Standard VHDL Language Reference Manual / / Institute of Electrical and Electronics Engineers
| ANSI/IEEE Std 1076-1993 : IEEE Standard VHDL Language Reference Manual / / Institute of Electrical and Electronics Engineers |
| Pubbl/distr/stampa | New York, NY, USA : , : IEEE, , 1994 |
| Descrizione fisica | 1 online resource (288 pages) |
| Disciplina | 621.3819 |
| Soggetto topico |
VHDL (Computer hardware description language)
Computer hardware description languages |
| ISBN | 0-7381-0986-X |
| Formato | Materiale a stampa |
| Livello bibliografico | Monografia |
| Lingua di pubblicazione | eng |
| Altri titoli varianti | ANSI/IEEE Std 1076-1993 |
| Record Nr. | UNISA-996279861503316 |
| New York, NY, USA : , : IEEE, , 1994 | ||
| Lo trovi qui: Univ. di Salerno | ||
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CPU Design and Practice / / by Wenxiang Wang, Jinzhang Xing
| CPU Design and Practice / / by Wenxiang Wang, Jinzhang Xing |
| Autore | Wang Wenxiang |
| Edizione | [1st ed. 2025.] |
| Pubbl/distr/stampa | Singapore : , : Springer Nature Singapore : , : Imprint : Springer, , 2025 |
| Descrizione fisica | 1 online resource (398 pages) |
| Disciplina | 004.22 |
| Altri autori (Persone) |
XingJinzhang
LuRongmin HaoMiao XuTianhao |
| Collana | Professional and Applied Computing Series |
| Soggetto topico |
Microprocessors
Computer architecture Computer hardware description languages Computers Processor Architectures Register-Transfer-Level Implementation Computer Hardware |
| ISBN | 981-9665-73-6 |
| Formato | Materiale a stampa |
| Livello bibliografico | Monografia |
| Lingua di pubblicazione | eng |
| Nota di contenuto | Chapter 1. Overview of the CPU Chip Development Process -- Chapter 2. Hardware Experiment Platform and FPGA Design Flow -- Chapter 3. Fundamentals of Digital Logic Circuit Design -- Chapter 4. Design A Single-cycle CPU -- Chapter 5. Design A Simple Pipelined CPU -- Chapter 6. AddMore User Mode Instructions into Pipeline -- Chapter 7. Support Exception and Interrupt -- Chapter 8. AXIBus Interface Design -- Chapter 9. Storage Management Unit Design -- Chapter 10. Cache Design -- Chapter 11. Advanced Experimental Environments -- Chapter 12. Advanced Design. |
| Record Nr. | UNINA-9911034958303321 |
Wang Wenxiang
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| Singapore : , : Springer Nature Singapore : , : Imprint : Springer, , 2025 | ||
| Lo trovi qui: Univ. Federico II | ||
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Digitaltechnik : Eine Einführung mit VHDL / / Jürgen Reichardt
| Digitaltechnik : Eine Einführung mit VHDL / / Jürgen Reichardt |
| Autore | Reichardt Jürgen |
| Edizione | [4. Auflage.] |
| Pubbl/distr/stampa | München ; ; Wien : , : De Gruyter Oldenbourg, , [2016] |
| Descrizione fisica | 1 online resource (486 pages) : illustrations (some color), graphs |
| Disciplina | 621.392 |
| Collana | De Gruyter Studium |
| Soggetto topico |
Computer hardware description languages
Hardware description language |
| ISBN |
9783110529975
3110529971 |
| Classificazione | ZN 5600 |
| Formato | Materiale a stampa |
| Livello bibliografico | Monografia |
| Lingua di pubblicazione | ger |
| Nota di contenuto | Frontmatter -- Vorwort zur 4. Auflage -- Inhaltsverzeichnis -- 1. Einleitung -- 2. Modellierung digitaler Schaltungen -- 3. Boole'sche Algebra -- 4. VHDL-Einführung I -- 5. Zahlensysteme in der Digitaltechnik -- 6. Logikminimierung -- 7. VHDL-Einführung II -- 8. Codes -- 9. Physikalische Implementierung und Beschaltung von Logikgattern -- 10. Datenpfadkomponenten -- 11. Latches und Flipflops in synchronen Schaltungen -- 12. Entwurf synchroner Zustandsautomaten -- 13. Entwurf von Synchronzählern -- 14. Schieberegister -- 15. Kommunikation zwischen digitalen Teilsystemen -- 16. Digitale Halbleiterspeicher -- 17. Programmierbare Logik -- 18. Anhang -- 19. Literaturverzeichnis -- 20. Sachregister |
| Record Nr. | UNINA-9910151848503321 |
Reichardt Jürgen
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| München ; ; Wien : , : De Gruyter Oldenbourg, , [2016] | ||
| Lo trovi qui: Univ. Federico II | ||
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