2007 International Symposium on VLSI Technology |
Pubbl/distr/stampa | [Place of publication not identified], : IEEE, 2006 |
Descrizione fisica | 1 online resource |
Disciplina | 621.38195835 |
Soggetto topico | Integrated circuits - Very large scale integration |
ISBN | 1-5090-8529-7 |
Formato | Materiale a stampa |
Livello bibliografico | Monografia |
Lingua di pubblicazione | eng |
Record Nr. | UNISA-996215451503316 |
[Place of publication not identified], : IEEE, 2006 | ||
Materiale a stampa | ||
Lo trovi qui: Univ. di Salerno | ||
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2007 International Symposium on VLSI Technology |
Pubbl/distr/stampa | [Place of publication not identified], : IEEE, 2006 |
Descrizione fisica | 1 online resource |
Disciplina | 621.38195835 |
Soggetto topico | Integrated circuits - Very large scale integration |
ISBN | 1-5090-8529-7 |
Formato | Materiale a stampa |
Livello bibliografico | Monografia |
Lingua di pubblicazione | eng |
Record Nr. | UNINA-9910146864203321 |
[Place of publication not identified], : IEEE, 2006 | ||
Materiale a stampa | ||
Lo trovi qui: Univ. Federico II | ||
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ANSI/IEEE Std 991-1986 : IEEE Standard for Logic Circuit Diagrams / / Institute of Electrical and Electronics Engineers |
Pubbl/distr/stampa | Piscataway, NJ : , : IEEE, , 1986 |
Descrizione fisica | 1 online resource |
Disciplina | 621.38195835 |
Soggetto topico | Logic circuits |
ISBN | 0-7381-0950-9 |
Formato | Materiale a stampa |
Livello bibliografico | Monografia |
Lingua di pubblicazione | eng |
Altri titoli varianti | ANSI/IEEE Std 991-1986: IEEE Standard for Logic Circuit Diagrams. Corrected Edition |
Record Nr. | UNISA-996279563003316 |
Piscataway, NJ : , : IEEE, , 1986 | ||
Materiale a stampa | ||
Lo trovi qui: Univ. di Salerno | ||
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ANSI/IEEE Std 991-1986 : IEEE Standard for Logic Circuit Diagrams / / Institute of Electrical and Electronics Engineers |
Pubbl/distr/stampa | Piscataway, NJ : , : IEEE, , 1986 |
Descrizione fisica | 1 online resource |
Disciplina | 621.38195835 |
Soggetto topico | Logic circuits |
ISBN | 0-7381-0950-9 |
Formato | Materiale a stampa |
Livello bibliografico | Monografia |
Lingua di pubblicazione | eng |
Altri titoli varianti | ANSI/IEEE Std 991-1986: IEEE Standard for Logic Circuit Diagrams. Corrected Edition |
Record Nr. | UNINA-9910135763503321 |
Piscataway, NJ : , : IEEE, , 1986 | ||
Materiale a stampa | ||
Lo trovi qui: Univ. Federico II | ||
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Computer Safety, Reliability, and Security [[electronic resource] ] : 36th International Conference, SAFECOMP 2017, Trento, Italy, September 13-15, 2017, Proceedings / / edited by Stefano Tonetta, Erwin Schoitsch, Friedemann Bitsch |
Edizione | [1st ed. 2017.] |
Pubbl/distr/stampa | Cham : , : Springer International Publishing : , : Imprint : Springer, , 2017 |
Descrizione fisica | 1 online resource (XIX, 344 p. 107 illus.) |
Disciplina | 621.38195835 |
Collana | Programming and Software Engineering |
Soggetto topico |
Computer logic
Programming languages (Electronic computers) Software engineering Computer security Application software Computer organization Logics and Meanings of Programs Programming Languages, Compilers, Interpreters Software Engineering Systems and Data Security Computer Applications Computer Systems Organization and Communication Networks |
ISBN | 3-319-66266-X |
Formato | Materiale a stampa |
Livello bibliografico | Monografia |
Lingua di pubblicazione | eng |
Nota di contenuto | Dynamic fault trees -- Safety case and argumentation -- Formal verification -- Autonomous systems -- Static analysis and testing -- Safety analysis and assessment -- Safety and security. |
Record Nr. | UNISA-996466153303316 |
Cham : , : Springer International Publishing : , : Imprint : Springer, , 2017 | ||
Materiale a stampa | ||
Lo trovi qui: Univ. di Salerno | ||
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Computer Safety, Reliability, and Security : 36th International Conference, SAFECOMP 2017, Trento, Italy, September 13-15, 2017, Proceedings / / edited by Stefano Tonetta, Erwin Schoitsch, Friedemann Bitsch |
Edizione | [1st ed. 2017.] |
Pubbl/distr/stampa | Cham : , : Springer International Publishing : , : Imprint : Springer, , 2017 |
Descrizione fisica | 1 online resource (XIX, 344 p. 107 illus.) |
Disciplina | 621.38195835 |
Collana | Programming and Software Engineering |
Soggetto topico |
Computer logic
Programming languages (Electronic computers) Software engineering Computer security Application software Computer organization Logics and Meanings of Programs Programming Languages, Compilers, Interpreters Software Engineering Systems and Data Security Computer Applications Computer Systems Organization and Communication Networks |
ISBN | 3-319-66266-X |
Formato | Materiale a stampa |
Livello bibliografico | Monografia |
Lingua di pubblicazione | eng |
Nota di contenuto | Dynamic fault trees -- Safety case and argumentation -- Formal verification -- Autonomous systems -- Static analysis and testing -- Safety analysis and assessment -- Safety and security. |
Record Nr. | UNINA-9910484945403321 |
Cham : , : Springer International Publishing : , : Imprint : Springer, , 2017 | ||
Materiale a stampa | ||
Lo trovi qui: Univ. Federico II | ||
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Digital electronics . 1 Combinational logic circuits / / Tertulien Ndjountche |
Autore | Ndjountche Tertulien |
Pubbl/distr/stampa | London, England ; ; Hoboken, New Jersey : , : ISTE : , : Wiley, , 2016 |
Descrizione fisica | 1 online resource (288 p.) |
Disciplina | 621.38195835 |
Soggetto topico | Logic circuits |
ISBN |
1-119-31864-5
1-119-31863-7 1-119-31862-9 |
Formato | Materiale a stampa |
Livello bibliografico | Monografia |
Lingua di pubblicazione | eng |
Nota di contenuto |
Intro; Table of Contents; Title; Copyright; Preface; 1 Number Systems; 2 Logic Gates; 3 Function Blocks of Combinational Logic; 4 Systematic Methods for the Simplification of Logic Functions; Bibliography; Index; End User License Agreement; 1. Summary; 2. The reader; 1.1. Introduction; 1.2. Decimal numbers; 1.3. Binary numbers; 1.4. Octal numbers; 1.5. Hexadecimal numeration; 1.6. Representation in a radix B; 1.7. Binary-coded decimal numbers; 1.8. Representations of signed integers; 1.9. Representation of the fractional part of a number; 1.10. Arithmetic operations on binary numbers
1.11. Representation of real numbers1.12. Data representation; 1.13. Codes to protect against errors; 1.14. Exercises; 1.15. Solutions; 2.1. Introduction; 2.2. Logic gates; 2.3. Three-state buffer; 2.4. Logic function; 2.5. The correspondence between a truth table and a logic function; 2.6. Boolean algebra; 2.7. Multi-level logic circuit implementation; 2.8. Practical considerations; 2.9. Demonstration of some Boolean algebra identities; 2.10. Exercises; 2.11. Solutions; 3.1. Introduction; 3.2. Multiplexer; 3.3. Demultiplexer and decoder 3.4. Implementation of logic functions using multiplexers or decoders3.5. Encoders; 3.6. Transcoders; 3.7. Parity check generator; 3.8. Barrel shifter; 3.9. Exercises; 3.10. Solutions; 4.1. Introduction; 4.2. Definitions and reminders; 4.3. Karnaugh maps; 4.4. Systematic methods for simplification; 4.5. Exercises; 4.6. Solutions |
Record Nr. | UNINA-9910134862503321 |
Ndjountche Tertulien | ||
London, England ; ; Hoboken, New Jersey : , : ISTE : , : Wiley, , 2016 | ||
Materiale a stampa | ||
Lo trovi qui: Univ. Federico II | ||
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Digital electronics . 1 Combinational logic circuits / / Tertulien Ndjountche |
Autore | Ndjountche Tertulien |
Pubbl/distr/stampa | London, England ; ; Hoboken, New Jersey : , : ISTE : , : Wiley, , 2016 |
Descrizione fisica | 1 online resource (288 p.) |
Disciplina | 621.38195835 |
Soggetto topico | Logic circuits |
ISBN |
1-119-31864-5
1-119-31863-7 1-119-31862-9 |
Formato | Materiale a stampa |
Livello bibliografico | Monografia |
Lingua di pubblicazione | eng |
Nota di contenuto |
Intro; Table of Contents; Title; Copyright; Preface; 1 Number Systems; 2 Logic Gates; 3 Function Blocks of Combinational Logic; 4 Systematic Methods for the Simplification of Logic Functions; Bibliography; Index; End User License Agreement; 1. Summary; 2. The reader; 1.1. Introduction; 1.2. Decimal numbers; 1.3. Binary numbers; 1.4. Octal numbers; 1.5. Hexadecimal numeration; 1.6. Representation in a radix B; 1.7. Binary-coded decimal numbers; 1.8. Representations of signed integers; 1.9. Representation of the fractional part of a number; 1.10. Arithmetic operations on binary numbers
1.11. Representation of real numbers1.12. Data representation; 1.13. Codes to protect against errors; 1.14. Exercises; 1.15. Solutions; 2.1. Introduction; 2.2. Logic gates; 2.3. Three-state buffer; 2.4. Logic function; 2.5. The correspondence between a truth table and a logic function; 2.6. Boolean algebra; 2.7. Multi-level logic circuit implementation; 2.8. Practical considerations; 2.9. Demonstration of some Boolean algebra identities; 2.10. Exercises; 2.11. Solutions; 3.1. Introduction; 3.2. Multiplexer; 3.3. Demultiplexer and decoder 3.4. Implementation of logic functions using multiplexers or decoders3.5. Encoders; 3.6. Transcoders; 3.7. Parity check generator; 3.8. Barrel shifter; 3.9. Exercises; 3.10. Solutions; 4.1. Introduction; 4.2. Definitions and reminders; 4.3. Karnaugh maps; 4.4. Systematic methods for simplification; 4.5. Exercises; 4.6. Solutions |
Record Nr. | UNINA-9910808615003321 |
Ndjountche Tertulien | ||
London, England ; ; Hoboken, New Jersey : , : ISTE : , : Wiley, , 2016 | ||
Materiale a stampa | ||
Lo trovi qui: Univ. Federico II | ||
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Feedback shift registers / Christian Ronse |
Autore | Ronse, Christian |
Pubbl/distr/stampa | Berlin ; New York : Springer-Verlag, 1984 |
Descrizione fisica | 145 p. : ill. ; 25 cm. |
Disciplina | 621.38195835 |
Soggetto topico |
Feedback (Electronics)
Shift registers |
ISBN | 3540133305 |
Classificazione |
AMS 94-XX
AMS 94A |
Formato | Materiale a stampa |
Livello bibliografico | Monografia |
Lingua di pubblicazione | en |
Record Nr. | UNISALENTO-991000886789707536 |
Ronse, Christian | ||
Berlin ; New York : Springer-Verlag, 1984 | ||
Materiale a stampa | ||
Lo trovi qui: Univ. del Salento | ||
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International Conference on Computer Design : VLSI in computers & processors : proceedings :October 2-4, 1995, Austin, Texas / / sponsored by IEEE Computer Society Technical Committee on Design Automation, IEEE Circuits and Systems Society |
Pubbl/distr/stampa | Los Alamitos, California : , : IEEE Computer Society, , 1995 |
Descrizione fisica | 1 online resource (iii, 709 pages) |
Disciplina | 621.38195835 |
Soggetto topico |
Electronic digital computers - Circuits
Integrated circuits - Very large scale integration |
Formato | Materiale a stampa |
Livello bibliografico | Monografia |
Lingua di pubblicazione | eng |
Record Nr. | UNISA-996200294203316 |
Los Alamitos, California : , : IEEE Computer Society, , 1995 | ||
Materiale a stampa | ||
Lo trovi qui: Univ. di Salerno | ||
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