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Biblioteca

MARC Lista (tabellare)
Analog und digital / / Otl Aicher ; mit einer einführung von Wilhelm Vossenkuhl
Analog und digital / / Otl Aicher ; mit einer einführung von Wilhelm Vossenkuhl
Autore Aicher Otl
Edizione [2. Auflage]
Pubbl/distr/stampa Berlin, Germany : , : Ernst & Sohn, , 2015
Descrizione fisica 1 online resource (196 p.)
Disciplina 621.3815/9
Soggetto topico Aesthetics
Design - Philosophy
Architecture - Philosophy
Soggetto genere / forma Electronic books.
ISBN 3-433-60591-2
3-433-60581-5
3-433-60592-0
Formato Materiale a stampa
Livello bibliografico Monografia
Lingua di pubblicazione ger
Nota di contenuto otl aicher analog und digital; inhalt; einführung; Authentizität und eine fragwürdige Analogie; Wissen und Machen; Denken und Machen; Kritik am Rationalismus; Aicher heute; greifen und begreifen; erweiterungen des ich; das auge, visuelles denken; analog und digital; nachwort; universalien und versalien; 1; 2; 3; 4; buridan und peirce; lesen von partituren; ehrendes begräbnis für descartes; design und philosophie; 1; 2; 3; 4; architektur und erkenntnistheorie; der gebrauch als philosophie; 1 wittgenstein als architekt; 2 das haus wittgenstein; 3 wir in der welt; 4 der gebrauch
5 schule des machens6 schauen; nachtrag; planung und steuerung; entwicklung, ein begriff; ein apfel; das ganz gewöhnliche; 1; 2; 3; lebensform und ideologie; kulturen des denkens; nachwort; nachweise; eula
Record Nr. UNINA-9910132409103321
Aicher Otl  
Berlin, Germany : , : Ernst & Sohn, , 2015
Materiale a stampa
Lo trovi qui: Univ. Federico II
Opac: Controlla la disponibilità qui
Analog und digital / / Otl Aicher ; mit einer einführung von Wilhelm Vossenkuhl
Analog und digital / / Otl Aicher ; mit einer einführung von Wilhelm Vossenkuhl
Autore Aicher Otl
Edizione [2. Auflage]
Pubbl/distr/stampa Berlin, Germany : , : Ernst & Sohn, , 2015
Descrizione fisica 1 online resource (196 p.)
Disciplina 621.3815/9
Soggetto topico Aesthetics
Design - Philosophy
Architecture - Philosophy
ISBN 3-433-60591-2
3-433-60581-5
3-433-60592-0
Formato Materiale a stampa
Livello bibliografico Monografia
Lingua di pubblicazione ger
Nota di contenuto otl aicher analog und digital; inhalt; einführung; Authentizität und eine fragwürdige Analogie; Wissen und Machen; Denken und Machen; Kritik am Rationalismus; Aicher heute; greifen und begreifen; erweiterungen des ich; das auge, visuelles denken; analog und digital; nachwort; universalien und versalien; 1; 2; 3; 4; buridan und peirce; lesen von partituren; ehrendes begräbnis für descartes; design und philosophie; 1; 2; 3; 4; architektur und erkenntnistheorie; der gebrauch als philosophie; 1 wittgenstein als architekt; 2 das haus wittgenstein; 3 wir in der welt; 4 der gebrauch
5 schule des machens6 schauen; nachtrag; planung und steuerung; entwicklung, ein begriff; ein apfel; das ganz gewöhnliche; 1; 2; 3; lebensform und ideologie; kulturen des denkens; nachwort; nachweise; eula
Record Nr. UNISA-996202279903316
Aicher Otl  
Berlin, Germany : , : Ernst & Sohn, , 2015
Materiale a stampa
Lo trovi qui: Univ. di Salerno
Opac: Controlla la disponibilità qui
Analog und digital / / Otl Aicher ; mit einer einführung von Wilhelm Vossenkuhl
Analog und digital / / Otl Aicher ; mit einer einführung von Wilhelm Vossenkuhl
Autore Aicher Otl
Edizione [2. Auflage]
Pubbl/distr/stampa Berlin, Germany : , : Ernst & Sohn, , 2015
Descrizione fisica 1 online resource (196 p.)
Disciplina 621.3815/9
Soggetto topico Aesthetics
Design - Philosophy
Architecture - Philosophy
ISBN 3-433-60591-2
3-433-60581-5
3-433-60592-0
Formato Materiale a stampa
Livello bibliografico Monografia
Lingua di pubblicazione ger
Nota di contenuto otl aicher analog und digital; inhalt; einführung; Authentizität und eine fragwürdige Analogie; Wissen und Machen; Denken und Machen; Kritik am Rationalismus; Aicher heute; greifen und begreifen; erweiterungen des ich; das auge, visuelles denken; analog und digital; nachwort; universalien und versalien; 1; 2; 3; 4; buridan und peirce; lesen von partituren; ehrendes begräbnis für descartes; design und philosophie; 1; 2; 3; 4; architektur und erkenntnistheorie; der gebrauch als philosophie; 1 wittgenstein als architekt; 2 das haus wittgenstein; 3 wir in der welt; 4 der gebrauch
5 schule des machens6 schauen; nachtrag; planung und steuerung; entwicklung, ein begriff; ein apfel; das ganz gewöhnliche; 1; 2; 3; lebensform und ideologie; kulturen des denkens; nachwort; nachweise; eula
Record Nr. UNINA-9910831163603321
Aicher Otl  
Berlin, Germany : , : Ernst & Sohn, , 2015
Materiale a stampa
Lo trovi qui: Univ. Federico II
Opac: Controlla la disponibilità qui
CMOS sigma-delta converters : practical design guide / / Josâe M. de la Rosa and Rocâio del Râio
CMOS sigma-delta converters : practical design guide / / Josâe M. de la Rosa and Rocâio del Râio
Autore Rosa Josâe M. de la
Edizione [3rd ed.]
Pubbl/distr/stampa Hoboken [New Jersey] : , : Wiley-Blackwell, , 2013
Descrizione fisica 1 online resource (428 p.)
Disciplina 621.3815/9
Collana Wiley - IEEE
Soggetto topico Metal oxide semiconductors, Complementary - Design and construction
ISBN 1-118-56843-5
1-299-27753-5
1-118-56922-9
Formato Materiale a stampa
Livello bibliografico Monografia
Lingua di pubblicazione eng
Nota di contenuto List of Abbreviations xvii -- Preface xxi -- Acknowledgements xxvii -- 1 Introduction to ΣΔ Modulators: Basic Concepts and Fundamentals 1 -- 1.1 Basics of A/D Conversion 2 -- 1.2 Basics of Sigma-Delta Modulators 8 -- 1.3 Classification of ΣΔ Modulators 15 -- 1.4 Single-Loop ΣΔ Modulators 16 -- 1.5 Cascade ΣΔ Modulators 24 -- 1.6 Multibit ΣΔ Modulators 29 -- 1.7 Band-Pass ΣΔ Modulators 36 -- 1.8 Continuous-Time ΣΔ Modulators 41 -- 1.9 Summary 49 -- 2 Circuits and Errors: Systematic Analysis and Practical Design Issues 54 -- 2.1 Nonidealities in Switched-Capacitor ΣΔ Modulators 55 -- 2.2 Finite Amplifier Gain in SC-ΣΔMs 56 -- 2.3 Capacitor Mismatch in SC-ΣΔMs 60 -- 2.4 Integrator Settling Error in SC-ΣΔMs 62 -- 2.5 Circuit Noise in SC-ΣΔMs 71 -- 2.6 Clock Jitter in SC-ΣΔMs 75 -- 2.7 Sources of Distortion in SC-ΣΔMs 76 -- 2.8 Nonidealities in Continuous-Time ΣΔ Modulators 80 -- 2.9 Clock Jitter in CT-ΣΔMs 81 -- 2.10 Excess Loop Delay in CT-ΣΔMs 85 -- 2.11 Quantizer Metastability in CT-ΣΔMs 88 -- 2.12 Finite Amplifier Gain in CT-ΣΔMs 89 -- 2.13 Time-Constant Error in CT-ΣΔMs 92 -- 2.14 Finite Integrator Dynamics in CT-ΣΔMs 94 -- 2.15 Circuit Noise in CT-ΣΔMs 95 -- 2.16 Sources of Distortion in CT-ΣΔMs 97 -- 2.17 Case Study: High-Level Sizing of a ΣΔM 99 -- 2.18 Summary 107 -- 3 Behavioral Modeling and High-Level Simulation 110 -- 3.1 Systematic Design Methodology of ΣΔ Modulators 110 -- 3.2 Simulation Approaches for the High-Level Evaluation of ΣΔMs 113 -- 3.3 Implementing ΣΔM Behavioral Models 118 -- 3.4 Efficient Behavioral Modeling of ΣΔM Building Blocks using C-MEX S-Functions 134 -- 3.5 SIMSIDES: A SIMULINK-Based Behavioral Simulator for ΣΔMs 159 -- 3.6 Using SIMSIDES for the High-Level Sizing and Verification of ΣΔMs 167 -- 3.7 Summary 183 -- 4 Circuit-Level Design, Implementation, and Verification 186 -- 4.1 Macromodeling ΣΔMs 186 -- 4.2 Including Noise in Transient Electrical Simulations of ΣΔMs 199 -- 4.3 Processing ΣΔM Output Results of Electrical Simulations 208.
4.4 Design Considerations and Simulation Test Benches of ΣΔM Basic Building Blocks 213 -- 4.5 Auxiliary ΣΔM Building Blocks 250 -- 4.6 Layout Design, Floorplanning, and Practical Issues 257 -- 4.7 Chip Package, Test PCB, and Experimental Set-Up 263 -- 4.8 Summary 270 -- 5 Frontiers of ΣΔ Modulators: Trends and Challenges 273 -- 5.1 Overview of the State of the Art on ΣΔMs 274 -- 5.2 Empirical and Statistical Analysis of State-of-the-Art ΣΔMs 291 -- 5.3 Cutting-Edge ΣΔM Architectures and Techniques 300 -- 5.4 Classification of State-of-the-Art References 319 -- 5.5 Summary 319 -- A SIMSIDES User Guide 334 -- A.1 Getting Started: Installing and Running SIMSIDES 334 -- A.2 Building and Editing ΣΔM Architectures in SIMSIDES 335 -- A.3 Analyzing ΣΔMs in SIMSIDES 337 -- A.4 Example 345 -- A.5 Getting Help 354 -- B SIMSIDES Block Libraries and Models 355 -- B.1 Overview of SIMSIDES Libraries 355 -- B.2 Ideal Libraries 355 -- B.3 Real SC Building-Block Libraries 361 -- B.4 Real SI Building-Block Libraries 364 -- B.5 Real CT Building-Block Libraries 371 -- B.6 Real Quantizers and Comparators 382 -- B.7 Real D/A Converters 382 -- B.8 Auxiliary Blocks 384 -- Index 389.
Record Nr. UNINA-9910139233103321
Rosa Josâe M. de la  
Hoboken [New Jersey] : , : Wiley-Blackwell, , 2013
Materiale a stampa
Lo trovi qui: Univ. Federico II
Opac: Controlla la disponibilità qui
CMOS sigma-delta converters : practical design guide / / Josâe M. de la Rosa and Rocâio del Râio
CMOS sigma-delta converters : practical design guide / / Josâe M. de la Rosa and Rocâio del Râio
Autore Rosa Josâe M. de la
Edizione [3rd ed.]
Pubbl/distr/stampa Hoboken [New Jersey] : , : Wiley-Blackwell, , 2013
Descrizione fisica 1 online resource (428 p.)
Disciplina 621.3815/9
Collana Wiley - IEEE
Soggetto topico Metal oxide semiconductors, Complementary - Design and construction
ISBN 1-118-56843-5
1-299-27753-5
1-118-56922-9
Formato Materiale a stampa
Livello bibliografico Monografia
Lingua di pubblicazione eng
Nota di contenuto List of Abbreviations xvii -- Preface xxi -- Acknowledgements xxvii -- 1 Introduction to ΣΔ Modulators: Basic Concepts and Fundamentals 1 -- 1.1 Basics of A/D Conversion 2 -- 1.2 Basics of Sigma-Delta Modulators 8 -- 1.3 Classification of ΣΔ Modulators 15 -- 1.4 Single-Loop ΣΔ Modulators 16 -- 1.5 Cascade ΣΔ Modulators 24 -- 1.6 Multibit ΣΔ Modulators 29 -- 1.7 Band-Pass ΣΔ Modulators 36 -- 1.8 Continuous-Time ΣΔ Modulators 41 -- 1.9 Summary 49 -- 2 Circuits and Errors: Systematic Analysis and Practical Design Issues 54 -- 2.1 Nonidealities in Switched-Capacitor ΣΔ Modulators 55 -- 2.2 Finite Amplifier Gain in SC-ΣΔMs 56 -- 2.3 Capacitor Mismatch in SC-ΣΔMs 60 -- 2.4 Integrator Settling Error in SC-ΣΔMs 62 -- 2.5 Circuit Noise in SC-ΣΔMs 71 -- 2.6 Clock Jitter in SC-ΣΔMs 75 -- 2.7 Sources of Distortion in SC-ΣΔMs 76 -- 2.8 Nonidealities in Continuous-Time ΣΔ Modulators 80 -- 2.9 Clock Jitter in CT-ΣΔMs 81 -- 2.10 Excess Loop Delay in CT-ΣΔMs 85 -- 2.11 Quantizer Metastability in CT-ΣΔMs 88 -- 2.12 Finite Amplifier Gain in CT-ΣΔMs 89 -- 2.13 Time-Constant Error in CT-ΣΔMs 92 -- 2.14 Finite Integrator Dynamics in CT-ΣΔMs 94 -- 2.15 Circuit Noise in CT-ΣΔMs 95 -- 2.16 Sources of Distortion in CT-ΣΔMs 97 -- 2.17 Case Study: High-Level Sizing of a ΣΔM 99 -- 2.18 Summary 107 -- 3 Behavioral Modeling and High-Level Simulation 110 -- 3.1 Systematic Design Methodology of ΣΔ Modulators 110 -- 3.2 Simulation Approaches for the High-Level Evaluation of ΣΔMs 113 -- 3.3 Implementing ΣΔM Behavioral Models 118 -- 3.4 Efficient Behavioral Modeling of ΣΔM Building Blocks using C-MEX S-Functions 134 -- 3.5 SIMSIDES: A SIMULINK-Based Behavioral Simulator for ΣΔMs 159 -- 3.6 Using SIMSIDES for the High-Level Sizing and Verification of ΣΔMs 167 -- 3.7 Summary 183 -- 4 Circuit-Level Design, Implementation, and Verification 186 -- 4.1 Macromodeling ΣΔMs 186 -- 4.2 Including Noise in Transient Electrical Simulations of ΣΔMs 199 -- 4.3 Processing ΣΔM Output Results of Electrical Simulations 208.
4.4 Design Considerations and Simulation Test Benches of ΣΔM Basic Building Blocks 213 -- 4.5 Auxiliary ΣΔM Building Blocks 250 -- 4.6 Layout Design, Floorplanning, and Practical Issues 257 -- 4.7 Chip Package, Test PCB, and Experimental Set-Up 263 -- 4.8 Summary 270 -- 5 Frontiers of ΣΔ Modulators: Trends and Challenges 273 -- 5.1 Overview of the State of the Art on ΣΔMs 274 -- 5.2 Empirical and Statistical Analysis of State-of-the-Art ΣΔMs 291 -- 5.3 Cutting-Edge ΣΔM Architectures and Techniques 300 -- 5.4 Classification of State-of-the-Art References 319 -- 5.5 Summary 319 -- A SIMSIDES User Guide 334 -- A.1 Getting Started: Installing and Running SIMSIDES 334 -- A.2 Building and Editing ΣΔM Architectures in SIMSIDES 335 -- A.3 Analyzing ΣΔMs in SIMSIDES 337 -- A.4 Example 345 -- A.5 Getting Help 354 -- B SIMSIDES Block Libraries and Models 355 -- B.1 Overview of SIMSIDES Libraries 355 -- B.2 Ideal Libraries 355 -- B.3 Real SC Building-Block Libraries 361 -- B.4 Real SI Building-Block Libraries 364 -- B.5 Real CT Building-Block Libraries 371 -- B.6 Real Quantizers and Comparators 382 -- B.7 Real D/A Converters 382 -- B.8 Auxiliary Blocks 384 -- Index 389.
Record Nr. UNINA-9910826636603321
Rosa Josâe M. de la  
Hoboken [New Jersey] : , : Wiley-Blackwell, , 2013
Materiale a stampa
Lo trovi qui: Univ. Federico II
Opac: Controlla la disponibilità qui
Data conversion handbook [[electronic resource] /] / Walter Kester, editor ; with the technical staff of Analog Devices
Data conversion handbook [[electronic resource] /] / Walter Kester, editor ; with the technical staff of Analog Devices
Pubbl/distr/stampa Amsterdam ; ; Boston, : Elsevier, : Newnes, c2005
Descrizione fisica 1 online resource (976 p.)
Disciplina 621.3815/9
621.38159
Altri autori (Persone) KesterWalt
Collana Analog Devices series
Soggetto topico Digital-to-analog converters
Analog-to-digital converters
Electronic circuit design
Soggetto genere / forma Electronic books.
ISBN 1-281-00999-7
9786611009991
1-4175-6598-5
0-08-047701-1
Formato Materiale a stampa
Livello bibliografico Monografia
Lingua di pubblicazione eng
Nota di contenuto Cover; Front matter; Half Title Page; Title Page; Copyright; Contents; Foreword; Preface; Acknowledgments; 1. Data Converter History; SECTION 1-1 Early History; SECTION 1-2 Data Converters of the 1950's and 1960's; SECTION 1-3 Data Converters of the 1970's; SECTION 1-4 Data Converters of the 1980's; SECTION 1-5 Data Converters of the 1990's; SECTION 1-6 Data Converters of the 2000's; 2. Fundamentals of Sampled Data Systems; SECTION 2-1 Coding and Quantizing; SECTION 2-2 Sampling Theory; SECTION 2-3 Data Converter AC Errors; SECTION 2-4 General Data Converter Specifications
SECTION 2-5 Defining the Specifications 3. Data Converter Architectures; SECTION 3-1 DAC Architectures; SECTION 3-2 ADC Architectures; SECTION 3-3 Sigma-Delta Converters; 4. Data Converter Process Technology; SECTION 4-1 Early Processes; SECTION 4-2 Modern Processes; SECTION 4-3 Smart Partitioning; 5. Testing Data Converters; SECTION 5-1 Testing DACs; SECTION 5-2 Testing ADCs; 6. Interfacing to Data Converters; SECTION 6-1 Driving ADC Analog Inputs; SECTION 6-2 ADC and DAC Digital Interfaces (and Related Issues); SECTION 6-3 Buffering DAC Analog Outputs
SECTION 6-4 Data Converter Voltage References SECTION 6-5 Sampling Clock Generation; 7. Data Converter Support Circuits; SECTION 7-1 Voltage References; SECTION 7-2 Low Dropout Linear Regulators; SECTION 7-3 Analog Switches and Multiplexers; SECTION 7-4 Sample-and-Hold Circuits; 8. Data Converter Applications; SECTION 8-1 Precision Measurement and Sensor Conditioning; SECTION 8-2 Multichannel Data Acquisition Systems; SECTION 8-3 Digital Potentiometers; SECTION 8-4 Digital Audio; SECTION 8-5 Digital Video and Display Electronics; SECTION 8-6 Software Radio and IF Sampling
SECTION 8-7 Direct Digital Synthesis (DDS)SECTION 8-8 Precision Analog Microcontrollers; 9. Hardware Design Techniques; SECTION 9-1 Passive Components; SECTION 9-2 PC Board Design Issues; SECTION 9-3 Analog Power Supply Systems; SECTION 9-4 Overvoltage Protection; SECTION 9-5 Thermal Management; SECTION 9-6 EMI/RFI Considerations; SECTION 9-7 Low Voltage Logic Interfacing; SECTION 9-8 Breadboarding and Prototyping; INDEX; SUBJECT INDEX
Record Nr. UNINA-9910457332603321
Amsterdam ; ; Boston, : Elsevier, : Newnes, c2005
Materiale a stampa
Lo trovi qui: Univ. Federico II
Opac: Controlla la disponibilità qui
Data conversion handbook [[electronic resource] /] / Walter Kester, editor ; with the technical staff of Analog Devices
Data conversion handbook [[electronic resource] /] / Walter Kester, editor ; with the technical staff of Analog Devices
Pubbl/distr/stampa Amsterdam ; ; Boston, : Elsevier, : Newnes, c2005
Descrizione fisica 1 online resource (976 p.)
Disciplina 621.3815/9
621.38159
Altri autori (Persone) KesterWalt
Collana Analog Devices series
Soggetto topico Digital-to-analog converters
Analog-to-digital converters
Electronic circuit design
ISBN 1-281-00999-7
9786611009991
1-4175-6598-5
0-08-047701-1
Formato Materiale a stampa
Livello bibliografico Monografia
Lingua di pubblicazione eng
Nota di contenuto Cover; Front matter; Half Title Page; Title Page; Copyright; Contents; Foreword; Preface; Acknowledgments; 1. Data Converter History; SECTION 1-1 Early History; SECTION 1-2 Data Converters of the 1950's and 1960's; SECTION 1-3 Data Converters of the 1970's; SECTION 1-4 Data Converters of the 1980's; SECTION 1-5 Data Converters of the 1990's; SECTION 1-6 Data Converters of the 2000's; 2. Fundamentals of Sampled Data Systems; SECTION 2-1 Coding and Quantizing; SECTION 2-2 Sampling Theory; SECTION 2-3 Data Converter AC Errors; SECTION 2-4 General Data Converter Specifications
SECTION 2-5 Defining the Specifications 3. Data Converter Architectures; SECTION 3-1 DAC Architectures; SECTION 3-2 ADC Architectures; SECTION 3-3 Sigma-Delta Converters; 4. Data Converter Process Technology; SECTION 4-1 Early Processes; SECTION 4-2 Modern Processes; SECTION 4-3 Smart Partitioning; 5. Testing Data Converters; SECTION 5-1 Testing DACs; SECTION 5-2 Testing ADCs; 6. Interfacing to Data Converters; SECTION 6-1 Driving ADC Analog Inputs; SECTION 6-2 ADC and DAC Digital Interfaces (and Related Issues); SECTION 6-3 Buffering DAC Analog Outputs
SECTION 6-4 Data Converter Voltage References SECTION 6-5 Sampling Clock Generation; 7. Data Converter Support Circuits; SECTION 7-1 Voltage References; SECTION 7-2 Low Dropout Linear Regulators; SECTION 7-3 Analog Switches and Multiplexers; SECTION 7-4 Sample-and-Hold Circuits; 8. Data Converter Applications; SECTION 8-1 Precision Measurement and Sensor Conditioning; SECTION 8-2 Multichannel Data Acquisition Systems; SECTION 8-3 Digital Potentiometers; SECTION 8-4 Digital Audio; SECTION 8-5 Digital Video and Display Electronics; SECTION 8-6 Software Radio and IF Sampling
SECTION 8-7 Direct Digital Synthesis (DDS)SECTION 8-8 Precision Analog Microcontrollers; 9. Hardware Design Techniques; SECTION 9-1 Passive Components; SECTION 9-2 PC Board Design Issues; SECTION 9-3 Analog Power Supply Systems; SECTION 9-4 Overvoltage Protection; SECTION 9-5 Thermal Management; SECTION 9-6 EMI/RFI Considerations; SECTION 9-7 Low Voltage Logic Interfacing; SECTION 9-8 Breadboarding and Prototyping; INDEX; SUBJECT INDEX
Record Nr. UNINA-9910784363803321
Amsterdam ; ; Boston, : Elsevier, : Newnes, c2005
Materiale a stampa
Lo trovi qui: Univ. Federico II
Opac: Controlla la disponibilità qui
Data conversion handbook / / Walter Kester, editor ; with the technical staff of Analog Devices
Data conversion handbook / / Walter Kester, editor ; with the technical staff of Analog Devices
Edizione [1st ed.]
Pubbl/distr/stampa Amsterdam ; ; Boston, : Elsevier, : Newnes, c2005
Descrizione fisica 1 online resource (976 p.)
Disciplina 621.3815/9
621.38159
Altri autori (Persone) KesterWalt
Collana Analog Devices series
Soggetto topico Digital-to-analog converters
Analog-to-digital converters
Electronic circuit design
ISBN 9786611009991
9781281009999
1281009997
9781417565986
1417565985
9780080477015
0080477011
Formato Materiale a stampa
Livello bibliografico Monografia
Lingua di pubblicazione eng
Nota di contenuto Cover; Front matter; Half Title Page; Title Page; Copyright; Contents; Foreword; Preface; Acknowledgments; 1. Data Converter History; SECTION 1-1 Early History; SECTION 1-2 Data Converters of the 1950's and 1960's; SECTION 1-3 Data Converters of the 1970's; SECTION 1-4 Data Converters of the 1980's; SECTION 1-5 Data Converters of the 1990's; SECTION 1-6 Data Converters of the 2000's; 2. Fundamentals of Sampled Data Systems; SECTION 2-1 Coding and Quantizing; SECTION 2-2 Sampling Theory; SECTION 2-3 Data Converter AC Errors; SECTION 2-4 General Data Converter Specifications
SECTION 2-5 Defining the Specifications 3. Data Converter Architectures; SECTION 3-1 DAC Architectures; SECTION 3-2 ADC Architectures; SECTION 3-3 Sigma-Delta Converters; 4. Data Converter Process Technology; SECTION 4-1 Early Processes; SECTION 4-2 Modern Processes; SECTION 4-3 Smart Partitioning; 5. Testing Data Converters; SECTION 5-1 Testing DACs; SECTION 5-2 Testing ADCs; 6. Interfacing to Data Converters; SECTION 6-1 Driving ADC Analog Inputs; SECTION 6-2 ADC and DAC Digital Interfaces (and Related Issues); SECTION 6-3 Buffering DAC Analog Outputs
SECTION 6-4 Data Converter Voltage References SECTION 6-5 Sampling Clock Generation; 7. Data Converter Support Circuits; SECTION 7-1 Voltage References; SECTION 7-2 Low Dropout Linear Regulators; SECTION 7-3 Analog Switches and Multiplexers; SECTION 7-4 Sample-and-Hold Circuits; 8. Data Converter Applications; SECTION 8-1 Precision Measurement and Sensor Conditioning; SECTION 8-2 Multichannel Data Acquisition Systems; SECTION 8-3 Digital Potentiometers; SECTION 8-4 Digital Audio; SECTION 8-5 Digital Video and Display Electronics; SECTION 8-6 Software Radio and IF Sampling
SECTION 8-7 Direct Digital Synthesis (DDS)SECTION 8-8 Precision Analog Microcontrollers; 9. Hardware Design Techniques; SECTION 9-1 Passive Components; SECTION 9-2 PC Board Design Issues; SECTION 9-3 Analog Power Supply Systems; SECTION 9-4 Overvoltage Protection; SECTION 9-5 Thermal Management; SECTION 9-6 EMI/RFI Considerations; SECTION 9-7 Low Voltage Logic Interfacing; SECTION 9-8 Breadboarding and Prototyping; INDEX; SUBJECT INDEX
Record Nr. UNINA-9911095095103321
Amsterdam ; ; Boston, : Elsevier, : Newnes, c2005
Materiale a stampa
Lo trovi qui: Univ. Federico II
Opac: Controlla la disponibilità qui
Data conversion handbook / / Walter Kester, editor ; with the technical staff of Analog Devices
Data conversion handbook / / Walter Kester, editor ; with the technical staff of Analog Devices
Edizione [1st ed.]
Pubbl/distr/stampa Amsterdam ; ; Boston, : Elsevier, : Newnes, c2005
Descrizione fisica 1 online resource (976 p.)
Disciplina 621.3815/9
621.38159
Altri autori (Persone) KesterWalt
Collana Analog Devices series
Soggetto topico Digital-to-analog converters
Analog-to-digital converters
Electronic circuit design
ISBN 9786611009991
9781281009999
1281009997
9781417565986
1417565985
9780080477015
0080477011
Formato Materiale a stampa
Livello bibliografico Monografia
Lingua di pubblicazione eng
Nota di contenuto Cover; Front matter; Half Title Page; Title Page; Copyright; Contents; Foreword; Preface; Acknowledgments; 1. Data Converter History; SECTION 1-1 Early History; SECTION 1-2 Data Converters of the 1950's and 1960's; SECTION 1-3 Data Converters of the 1970's; SECTION 1-4 Data Converters of the 1980's; SECTION 1-5 Data Converters of the 1990's; SECTION 1-6 Data Converters of the 2000's; 2. Fundamentals of Sampled Data Systems; SECTION 2-1 Coding and Quantizing; SECTION 2-2 Sampling Theory; SECTION 2-3 Data Converter AC Errors; SECTION 2-4 General Data Converter Specifications
SECTION 2-5 Defining the Specifications 3. Data Converter Architectures; SECTION 3-1 DAC Architectures; SECTION 3-2 ADC Architectures; SECTION 3-3 Sigma-Delta Converters; 4. Data Converter Process Technology; SECTION 4-1 Early Processes; SECTION 4-2 Modern Processes; SECTION 4-3 Smart Partitioning; 5. Testing Data Converters; SECTION 5-1 Testing DACs; SECTION 5-2 Testing ADCs; 6. Interfacing to Data Converters; SECTION 6-1 Driving ADC Analog Inputs; SECTION 6-2 ADC and DAC Digital Interfaces (and Related Issues); SECTION 6-3 Buffering DAC Analog Outputs
SECTION 6-4 Data Converter Voltage References SECTION 6-5 Sampling Clock Generation; 7. Data Converter Support Circuits; SECTION 7-1 Voltage References; SECTION 7-2 Low Dropout Linear Regulators; SECTION 7-3 Analog Switches and Multiplexers; SECTION 7-4 Sample-and-Hold Circuits; 8. Data Converter Applications; SECTION 8-1 Precision Measurement and Sensor Conditioning; SECTION 8-2 Multichannel Data Acquisition Systems; SECTION 8-3 Digital Potentiometers; SECTION 8-4 Digital Audio; SECTION 8-5 Digital Video and Display Electronics; SECTION 8-6 Software Radio and IF Sampling
SECTION 8-7 Direct Digital Synthesis (DDS)SECTION 8-8 Precision Analog Microcontrollers; 9. Hardware Design Techniques; SECTION 9-1 Passive Components; SECTION 9-2 PC Board Design Issues; SECTION 9-3 Analog Power Supply Systems; SECTION 9-4 Overvoltage Protection; SECTION 9-5 Thermal Management; SECTION 9-6 EMI/RFI Considerations; SECTION 9-7 Low Voltage Logic Interfacing; SECTION 9-8 Breadboarding and Prototyping; INDEX; SUBJECT INDEX
Record Nr. UNINA-9911138549803321
Amsterdam ; ; Boston, : Elsevier, : Newnes, c2005
Materiale a stampa
Lo trovi qui: Univ. Federico II
Opac: Controlla la disponibilità qui
Integrated converters : D to A and A to D architectures, analysis and simulation
Integrated converters : D to A and A to D architectures, analysis and simulation
Autore Jespers Paul G.
Pubbl/distr/stampa [Place of publication not identified], : Oxford University Press, 2001
Disciplina 621.3815/9
Soggetto topico Digital-to-analog converters
Analog-to-digital converters
Electrical & Computer Engineering
Engineering & Applied Sciences
Electrical Engineering
ISBN 1-68015-281-5
Formato Materiale a stampa
Livello bibliografico Monografia
Lingua di pubblicazione eng
Record Nr. UNINA-9911006984303321
Jespers Paul G.  
[Place of publication not identified], : Oxford University Press, 2001
Materiale a stampa
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