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Advanced phase-lock techniques / / James A. Crawford
| Advanced phase-lock techniques / / James A. Crawford |
| Autore | Crawford James A. |
| Pubbl/distr/stampa | Norwood, Massachusetts : , : Artech House, , ©2007 |
| Descrizione fisica | 1 online resource (533 p.) |
| Disciplina | 621.3815/364 |
| Collana | Artech House microwave library |
| Soggetto topico | Phase-locked loops |
| Soggetto genere / forma | Electronic books. |
| ISBN | 1-59693-141-8 |
| Formato | Materiale a stampa  |
| Livello bibliografico | Monografia |
| Lingua di pubblicazione | eng |
| Nota di contenuto |
Preface; CHAPTER 1 Phase-Locked Systems--A High-Level Perspective; 1.1 PHASE-LOCKED LOOP BASICS; 1.2 CONTINUOUS-TIME CONTROL SYSTEM PERSPECTIVE FOR PLLS (HIGH SNR); 1.3 TIME-SAMPLED PLL SYSTEMS (HIGH SNR); 1.4 ESTIMATION THEORETIC PERSPECTIVE (LOW SNR) FOR PLLS; 1.5 SUMMARY; References; CHAPTER 2 Design Notes; 2.1 SUMMARY OF CLASSIC CONTINUOUS-TIME TYPE-2 SECOND-ORDER PLL DESIGN EQUATIONS; 2.2 CONTINUOUS-TIME TYPE-2 FOURTH-ORDER PLLS; 2.3 DISCRETIZED PLLS; 2.4 HYBRID PLLS INCORPORATING SAMPLE-AND-HOLDS; 2.5 COMMUNICATION THEORY; 2.6 SPECTRAL RELATIONSHIPS; 2.7 TRIGONOMETRY.
2.8 LAPLACE TRANSFORMS2.9 Z-TRANSFORMS; 2.10 PROBABILITY AND STOCHASTIC PROCESSES; 2.11 NUMERICAL SIMULATION; 2.12 CALCULUS; 2.13 BUTTERWORTH LOWPASS FILTERS; 2.14 CHEBYSHEV LOWPASS FILTERS; 2.15 CONSTANTS; References; CHAPTER 3 Fundamental Limits; 3.1 PHASE MODULATION AND BESSEL FUNCTIONS; 3.2 HILBERT TRANSFORMS; 3.3 CAUCHY-SCHWARZ INEQUALITY; 3.4 RF FILTERING EFFECTS ON FREQUENCY STABILITY; 3.5 CHEBYSHEV INEQUALITY; 3.6 CHERNOFF BOUND; 3.7 CRAMER-RAO BOUND; 3.8 EIGENFILTERS (OPTIMAL FILTERS); 3.9 FANO BROADBAND MATCHING THEOREM; 3.10 LEESON-SCHERER PHASE NOISE MODEL. 3.11 THERMAL NOISE LIMITS3.12 NYQUIST SAMPLING THEOREM; 3.13 PALEY-WIENER CRITERION; 3.14 PARSEVAL'S THEOREM; 3.15 POISSON SUM; 3.16 TIME-BANDWIDTH PRODUCT; 3.17 MATCHED-FILTERS FOR DETERMINISTIC SIGNALS IN ADDITIVE WHITE GAUSSIAN NOISE (AWGN); 3.18 WEAK LAW OF LARGE NUMBERS; References; Appendix 3A: Maximum-Likelihood Frequency Estimator; Appendix 3B: Phase Probability Density Function for Sine Wave in AWGN; CHAPTER 4 Noise in PLL-Based Systems; 4.1 INTRODUCTION; 4.2 SOURCES OF NOISE; 4.3 POWER SPECTRAL DENSITY CONCEPT FOR CONTINUOUS-TIME STOCHASTIC SIGNALS. 4.4 POWER SPECTRAL DENSITY FOR DISCRETE-TIME SAMPLED SYSTEMS4.5 PHASE NOISE FIRST PRINCIPLES; 4.6 RANDOM PHASE NOISE; 4.7 NOISE IMPRESSION ON TIME AND FREQUENCY SOURCES; References; Appendix 4A: Review of Stochastic Random Processes; Appendix 4B: Accurate Noise Modeling for Computer Simulations; Appendix 4C: Creating Arbitrary Noise Spectra in a Digital Signal Processing Environment; Appendix 4D: Noise in Direct Digital Synthesizers; CHAPTER 5 System Performance; 5.1 SYSTEM PERFORMANCE OVERVIEW; 5.2 INTEGRATED PHASE NOISE; 5.3 LOCAL OSCILLATORS FOR RECEIVE SYSTEMS. 5.4 LOCAL OSCILLATORS FOR TRANSMIT SYSTEMS5.5 LOCAL OSCILLATOR PHASE NOISE IMPACT ON DIGITAL COMMUNICATION ERROR RATE PERFORMANCE; 5.6 PHASE NOISE EFFECTS ON OFDM SYSTEMS; 5.7 PHASE NOISE EFFECTS ON SPREAD-SPECTRUM SYSTEMS; 5.8 PHASE NOISE IMPACT FOR MORE ADVANCED MODULATION WAVEFORMS; 5.9 CLOCK NOISE IMPACT ON DAC PERFORMANCE; 5.10 CLOCK NOISE IMPACT ON ADC PERFORMANCE; References; Appendix 5A: Image Suppression and Error Vector Magnitude; Appendix 5B: Channel Capacity and Cutoff Rate; CHAPTER 6 Fundamental Concepts for Continuous-Time Systems; 6.1 CONTINUOUS VERSUS DISCRETE TIME. |
| Record Nr. | UNINA-9910455736403321 |
Crawford James A.
|
||
| Norwood, Massachusetts : , : Artech House, , ©2007 | ||
| Materiale a stampa | ||
| Lo trovi qui: Univ. Federico II | ||
| ||
Advanced phase-lock techniques / / James A. Crawford
| Advanced phase-lock techniques / / James A. Crawford |
| Autore | Crawford James A. |
| Pubbl/distr/stampa | Norwood, Massachusetts : , : Artech House, , ©2007 |
| Descrizione fisica | 1 online resource (533 p.) |
| Disciplina | 621.3815/364 |
| Collana | Artech House microwave library |
| Soggetto topico | Phase-locked loops |
| ISBN | 1-59693-141-8 |
| Formato | Materiale a stampa |
| Livello bibliografico | Monografia |
| Lingua di pubblicazione | eng |
| Nota di contenuto |
Preface; CHAPTER 1 Phase-Locked Systems--A High-Level Perspective; 1.1 PHASE-LOCKED LOOP BASICS; 1.2 CONTINUOUS-TIME CONTROL SYSTEM PERSPECTIVE FOR PLLS (HIGH SNR); 1.3 TIME-SAMPLED PLL SYSTEMS (HIGH SNR); 1.4 ESTIMATION THEORETIC PERSPECTIVE (LOW SNR) FOR PLLS; 1.5 SUMMARY; References; CHAPTER 2 Design Notes; 2.1 SUMMARY OF CLASSIC CONTINUOUS-TIME TYPE-2 SECOND-ORDER PLL DESIGN EQUATIONS; 2.2 CONTINUOUS-TIME TYPE-2 FOURTH-ORDER PLLS; 2.3 DISCRETIZED PLLS; 2.4 HYBRID PLLS INCORPORATING SAMPLE-AND-HOLDS; 2.5 COMMUNICATION THEORY; 2.6 SPECTRAL RELATIONSHIPS; 2.7 TRIGONOMETRY.
2.8 LAPLACE TRANSFORMS2.9 Z-TRANSFORMS; 2.10 PROBABILITY AND STOCHASTIC PROCESSES; 2.11 NUMERICAL SIMULATION; 2.12 CALCULUS; 2.13 BUTTERWORTH LOWPASS FILTERS; 2.14 CHEBYSHEV LOWPASS FILTERS; 2.15 CONSTANTS; References; CHAPTER 3 Fundamental Limits; 3.1 PHASE MODULATION AND BESSEL FUNCTIONS; 3.2 HILBERT TRANSFORMS; 3.3 CAUCHY-SCHWARZ INEQUALITY; 3.4 RF FILTERING EFFECTS ON FREQUENCY STABILITY; 3.5 CHEBYSHEV INEQUALITY; 3.6 CHERNOFF BOUND; 3.7 CRAMER-RAO BOUND; 3.8 EIGENFILTERS (OPTIMAL FILTERS); 3.9 FANO BROADBAND MATCHING THEOREM; 3.10 LEESON-SCHERER PHASE NOISE MODEL. 3.11 THERMAL NOISE LIMITS3.12 NYQUIST SAMPLING THEOREM; 3.13 PALEY-WIENER CRITERION; 3.14 PARSEVAL'S THEOREM; 3.15 POISSON SUM; 3.16 TIME-BANDWIDTH PRODUCT; 3.17 MATCHED-FILTERS FOR DETERMINISTIC SIGNALS IN ADDITIVE WHITE GAUSSIAN NOISE (AWGN); 3.18 WEAK LAW OF LARGE NUMBERS; References; Appendix 3A: Maximum-Likelihood Frequency Estimator; Appendix 3B: Phase Probability Density Function for Sine Wave in AWGN; CHAPTER 4 Noise in PLL-Based Systems; 4.1 INTRODUCTION; 4.2 SOURCES OF NOISE; 4.3 POWER SPECTRAL DENSITY CONCEPT FOR CONTINUOUS-TIME STOCHASTIC SIGNALS. 4.4 POWER SPECTRAL DENSITY FOR DISCRETE-TIME SAMPLED SYSTEMS4.5 PHASE NOISE FIRST PRINCIPLES; 4.6 RANDOM PHASE NOISE; 4.7 NOISE IMPRESSION ON TIME AND FREQUENCY SOURCES; References; Appendix 4A: Review of Stochastic Random Processes; Appendix 4B: Accurate Noise Modeling for Computer Simulations; Appendix 4C: Creating Arbitrary Noise Spectra in a Digital Signal Processing Environment; Appendix 4D: Noise in Direct Digital Synthesizers; CHAPTER 5 System Performance; 5.1 SYSTEM PERFORMANCE OVERVIEW; 5.2 INTEGRATED PHASE NOISE; 5.3 LOCAL OSCILLATORS FOR RECEIVE SYSTEMS. 5.4 LOCAL OSCILLATORS FOR TRANSMIT SYSTEMS5.5 LOCAL OSCILLATOR PHASE NOISE IMPACT ON DIGITAL COMMUNICATION ERROR RATE PERFORMANCE; 5.6 PHASE NOISE EFFECTS ON OFDM SYSTEMS; 5.7 PHASE NOISE EFFECTS ON SPREAD-SPECTRUM SYSTEMS; 5.8 PHASE NOISE IMPACT FOR MORE ADVANCED MODULATION WAVEFORMS; 5.9 CLOCK NOISE IMPACT ON DAC PERFORMANCE; 5.10 CLOCK NOISE IMPACT ON ADC PERFORMANCE; References; Appendix 5A: Image Suppression and Error Vector Magnitude; Appendix 5B: Channel Capacity and Cutoff Rate; CHAPTER 6 Fundamental Concepts for Continuous-Time Systems; 6.1 CONTINUOUS VERSUS DISCRETE TIME. |
| Record Nr. | UNINA-9910780748303321 |
|
Crawford James A.
|
||
| Norwood, Massachusetts : , : Artech House, , ©2007 | ||
| Materiale a stampa | ||
| Lo trovi qui: Univ. Federico II | ||
| ||
Advanced phase-lock techniques / / James A. Crawford
| Advanced phase-lock techniques / / James A. Crawford |
| Autore | Crawford James A |
| Edizione | [1st ed.] |
| Pubbl/distr/stampa | Boston, : Artech House, c2007 |
| Descrizione fisica | 1 online resource (533 p.) |
| Disciplina | 621.3815/364 |
| Collana | Artech House microwave library |
| Soggetto topico | Phase-locked loops |
| ISBN |
9781596931411
1596931418 |
| Formato | Materiale a stampa |
| Livello bibliografico | Monografia |
| Lingua di pubblicazione | eng |
| Nota di contenuto |
Preface; CHAPTER 1 Phase-Locked Systems--A High-Level Perspective; 1.1 PHASE-LOCKED LOOP BASICS; 1.2 CONTINUOUS-TIME CONTROL SYSTEM PERSPECTIVE FOR PLLS (HIGH SNR); 1.3 TIME-SAMPLED PLL SYSTEMS (HIGH SNR); 1.4 ESTIMATION THEORETIC PERSPECTIVE (LOW SNR) FOR PLLS; 1.5 SUMMARY; References; CHAPTER 2 Design Notes; 2.1 SUMMARY OF CLASSIC CONTINUOUS-TIME TYPE-2 SECOND-ORDER PLL DESIGN EQUATIONS; 2.2 CONTINUOUS-TIME TYPE-2 FOURTH-ORDER PLLS; 2.3 DISCRETIZED PLLS; 2.4 HYBRID PLLS INCORPORATING SAMPLE-AND-HOLDS; 2.5 COMMUNICATION THEORY; 2.6 SPECTRAL RELATIONSHIPS; 2.7 TRIGONOMETRY.
2.8 LAPLACE TRANSFORMS2.9 Z-TRANSFORMS; 2.10 PROBABILITY AND STOCHASTIC PROCESSES; 2.11 NUMERICAL SIMULATION; 2.12 CALCULUS; 2.13 BUTTERWORTH LOWPASS FILTERS; 2.14 CHEBYSHEV LOWPASS FILTERS; 2.15 CONSTANTS; References; CHAPTER 3 Fundamental Limits; 3.1 PHASE MODULATION AND BESSEL FUNCTIONS; 3.2 HILBERT TRANSFORMS; 3.3 CAUCHY-SCHWARZ INEQUALITY; 3.4 RF FILTERING EFFECTS ON FREQUENCY STABILITY; 3.5 CHEBYSHEV INEQUALITY; 3.6 CHERNOFF BOUND; 3.7 CRAMER-RAO BOUND; 3.8 EIGENFILTERS (OPTIMAL FILTERS); 3.9 FANO BROADBAND MATCHING THEOREM; 3.10 LEESON-SCHERER PHASE NOISE MODEL. 3.11 THERMAL NOISE LIMITS3.12 NYQUIST SAMPLING THEOREM; 3.13 PALEY-WIENER CRITERION; 3.14 PARSEVAL'S THEOREM; 3.15 POISSON SUM; 3.16 TIME-BANDWIDTH PRODUCT; 3.17 MATCHED-FILTERS FOR DETERMINISTIC SIGNALS IN ADDITIVE WHITE GAUSSIAN NOISE (AWGN); 3.18 WEAK LAW OF LARGE NUMBERS; References; Appendix 3A: Maximum-Likelihood Frequency Estimator; Appendix 3B: Phase Probability Density Function for Sine Wave in AWGN; CHAPTER 4 Noise in PLL-Based Systems; 4.1 INTRODUCTION; 4.2 SOURCES OF NOISE; 4.3 POWER SPECTRAL DENSITY CONCEPT FOR CONTINUOUS-TIME STOCHASTIC SIGNALS. 4.4 POWER SPECTRAL DENSITY FOR DISCRETE-TIME SAMPLED SYSTEMS4.5 PHASE NOISE FIRST PRINCIPLES; 4.6 RANDOM PHASE NOISE; 4.7 NOISE IMPRESSION ON TIME AND FREQUENCY SOURCES; References; Appendix 4A: Review of Stochastic Random Processes; Appendix 4B: Accurate Noise Modeling for Computer Simulations; Appendix 4C: Creating Arbitrary Noise Spectra in a Digital Signal Processing Environment; Appendix 4D: Noise in Direct Digital Synthesizers; CHAPTER 5 System Performance; 5.1 SYSTEM PERFORMANCE OVERVIEW; 5.2 INTEGRATED PHASE NOISE; 5.3 LOCAL OSCILLATORS FOR RECEIVE SYSTEMS. 5.4 LOCAL OSCILLATORS FOR TRANSMIT SYSTEMS5.5 LOCAL OSCILLATOR PHASE NOISE IMPACT ON DIGITAL COMMUNICATION ERROR RATE PERFORMANCE; 5.6 PHASE NOISE EFFECTS ON OFDM SYSTEMS; 5.7 PHASE NOISE EFFECTS ON SPREAD-SPECTRUM SYSTEMS; 5.8 PHASE NOISE IMPACT FOR MORE ADVANCED MODULATION WAVEFORMS; 5.9 CLOCK NOISE IMPACT ON DAC PERFORMANCE; 5.10 CLOCK NOISE IMPACT ON ADC PERFORMANCE; References; Appendix 5A: Image Suppression and Error Vector Magnitude; Appendix 5B: Channel Capacity and Cutoff Rate; CHAPTER 6 Fundamental Concepts for Continuous-Time Systems; 6.1 CONTINUOUS VERSUS DISCRETE TIME. |
| Record Nr. | UNINA-9910958841803321 |
|
Crawford James A
|
||
| Boston, : Artech House, c2007 | ||
| Materiale a stampa | ||
| Lo trovi qui: Univ. Federico II | ||
| ||
Design methodology for RF CMOS phase lock loops / / Carlos Quemada, Guillermo Bistue, Inigo Adin
| Design methodology for RF CMOS phase lock loops / / Carlos Quemada, Guillermo Bistue, Inigo Adin |
| Autore | Quemada Carlos |
| Edizione | [1st ed.] |
| Pubbl/distr/stampa | Boston ; ; London, : Artech House, c2009 |
| Descrizione fisica | 1 online resource (242 p.) |
| Disciplina | 621.3815/364 |
| Altri autori (Persone) |
AdinIInigoigo
BistuéGuillermo |
| Collana | Artech House microwave library |
| Soggetto topico |
Metal oxide semiconductors, Complementary - Design and construction
Phase-locked loops - Design and construction |
| ISBN |
9781596933842
1596933844 |
| Formato | Materiale a stampa |
| Livello bibliografico | Monografia |
| Lingua di pubblicazione | eng |
| Nota di contenuto | Design Methodology for RF CMOS Phase Locked Loops; Contents; Preface; 1 Approach to CMOS PLL Design; 2 PLL Fundamentals; 3 LC-Tank Integrated Oscillators; 4 Frequency Divider; 5 Phase Frequency Detector/Phase Detector; 6 Determination of Building Blocks Specifications; 7 Design of a 3.2-GHz CMOS VCO; 8 Design of a Frequency Divider; 9 Design of a Phase Frequency Detector; 10 Design of the Complete PLL; 11 PLL Characterization and Results; About the Authors; Index |
| Record Nr. | UNINA-9910966669803321 |
|
Quemada Carlos
|
||
| Boston ; ; London, : Artech House, c2009 | ||
| Materiale a stampa | ||
| Lo trovi qui: Univ. Federico II | ||
| ||
Design methodology for RF CMOS phase locked loops / / Carlos Quemada, Guillermo Bistué, Iänigo Adin
| Design methodology for RF CMOS phase locked loops / / Carlos Quemada, Guillermo Bistué, Iänigo Adin |
| Autore | Quemada Carlos |
| Pubbl/distr/stampa | Boston : , : Artech House, , ©2009 |
| Descrizione fisica | 1 online resource (242 p.) |
| Disciplina | 621.3815/364 |
| Altri autori (Persone) |
BistuéGuillermo
AdinIänigo |
| Collana | Artech House microwave library |
| Soggetto topico |
Metal oxide semiconductors, Complementary - Design and construction
Phase-locked loops - Design and construction |
| Soggetto genere / forma | Electronic books. |
| ISBN | 1-59693-384-4 |
| Formato | Materiale a stampa |
| Livello bibliografico | Monografia |
| Lingua di pubblicazione | eng |
| Nota di contenuto | Design Methodology for RF CMOS Phase Locked Loops; Contents; Preface; 1 Approach to CMOS PLL Design; 2 PLL Fundamentals; 3 LC-Tank Integrated Oscillators; 4 Frequency Divider; 5 Phase Frequency Detector/Phase Detector; 6 Determination of Building Blocks Specifications; 7 Design of a 3.2-GHz CMOS VCO; 8 Design of a Frequency Divider; 9 Design of a Phase Frequency Detector; 10 Design of the Complete PLL; 11 PLL Characterization and Results; About the Authors; Index |
| Record Nr. | UNINA-9910455172203321 |
|
Quemada Carlos
|
||
| Boston : , : Artech House, , ©2009 | ||
| Materiale a stampa | ||
| Lo trovi qui: Univ. Federico II | ||
| ||
Design methodology for RF CMOS phase locked loops / / Carlos Quemada, Guillermo Bistué, Iänigo Adin
| Design methodology for RF CMOS phase locked loops / / Carlos Quemada, Guillermo Bistué, Iänigo Adin |
| Autore | Quemada Carlos |
| Pubbl/distr/stampa | Boston : , : Artech House, , ©2009 |
| Descrizione fisica | 1 online resource (242 p.) |
| Disciplina | 621.3815/364 |
| Altri autori (Persone) |
BistuéGuillermo
AdinIänigo |
| Collana | Artech House microwave library |
| Soggetto topico |
Metal oxide semiconductors, Complementary - Design and construction
Phase-locked loops - Design and construction |
| ISBN | 1-59693-384-4 |
| Formato | Materiale a stampa |
| Livello bibliografico | Monografia |
| Lingua di pubblicazione | eng |
| Nota di contenuto | Design Methodology for RF CMOS Phase Locked Loops; Contents; Preface; 1 Approach to CMOS PLL Design; 2 PLL Fundamentals; 3 LC-Tank Integrated Oscillators; 4 Frequency Divider; 5 Phase Frequency Detector/Phase Detector; 6 Determination of Building Blocks Specifications; 7 Design of a 3.2-GHz CMOS VCO; 8 Design of a Frequency Divider; 9 Design of a Phase Frequency Detector; 10 Design of the Complete PLL; 11 PLL Characterization and Results; About the Authors; Index |
| Record Nr. | UNINA-9910778002203321 |
|
Quemada Carlos
|
||
| Boston : , : Artech House, , ©2009 | ||
| Materiale a stampa | ||
| Lo trovi qui: Univ. Federico II | ||
| ||
Phase lock loops and frequency synthesis [[electronic resource] /] / Věnceslav F. Kroupa
| Phase lock loops and frequency synthesis [[electronic resource] /] / Věnceslav F. Kroupa |
| Autore | Kroupa Věnceslav F. <1923-> |
| Pubbl/distr/stampa | New York, : J. Wiley, 2003 |
| Descrizione fisica | 1 online resource (336 p.) |
| Disciplina |
621.3815/364
621.3815364 621.382 |
| Soggetto topico |
Phase-locked loops
Frequency synthesizers |
| Soggetto genere / forma | Electronic books. |
| ISBN |
1-280-27201-5
9786610272013 0-470-29946-0 0-470-86512-1 0-470-01410-5 |
| Formato | Materiale a stampa |
| Livello bibliografico | Monografia |
| Lingua di pubblicazione | eng |
| Nota di contenuto |
Phase Lock Loops and Frequency Synthesis; Contents; Preface; 1 Basic Equations of the PLLs; 1.1 Introduction; 1.2 Basic Equations of the PLLs; 1.3 Solution of the Basic PLL Equation in the Time Domain; 1.3.1 Solution in the Closed Form; 1.3.2 Linearized Solution; 1.4 Solution of Basic PLL Equations in the Frequency Domain; 1.5 Order and Type of PLLs; 1.5.1 Order of PLLs; 1.5.2 Type of PLLs; 1.5.3 Steady State Errors; 1.6 Block Diagram Algebra; References; 2 PLLs of the First and Second Order; 2.1 PLLs of the First Order; 2.2 PLLs of the Second Order; 2.2.1 A Simple RC Filter
2.2.2 Phase Lag-lead RRC or RCC Filter2.3 PLLs of the Second Order of Type 2; 2.3.1 PLLs of the Second Order of Type 2 with Voltage Output PD; 2.3.2 PLLs of the Second Order of Type 2 with Current Output Phase Detector; 2.4 Second-order PLLs with Frequency Dividers in the Feedback Path; References; 3 PLLs of the Third and Higher Orders; 3.1 General Open-loop Transfer Function G(s); 3.1.1 Additional RC Section; 3.1.2 Two RC Sections; 3.1.3 Active Second-order Low-pass Filter; 3.1.4 Twin-T RC Filter; 3.1.5 PLLs with a Selective Filter in the Feedback Path; 3.1.6 Time Delays in PLLs 3.2 Higher-order Type 2 PLLs3.2.1 Third-order Loops: Lag-lead Filter with Additional RC Section; 3.2.2 Third-order Loop: Second-order Lag Filter Plus RC Section; 3.2.3 Fourth-order Loops; 3.2.4 Fifth-order Loops; 3.3 PLLs with Transmission Blocks in the Feedback Path; 3.3.1 Divider in the Feedback Path; 3.3.2 IF Filter in the Feedback Path; 3.3.3 IF Filter and Divider in the Feedback Path; 3.4 Sampled Higher-order Loops; 3.4.1 Third-order Loops with the Current Output Phase Detector; 3.5 Higher-order Loops of Type 3; 3.6 Computer Design of a Higher-order PLL; References 4 Stability of the PLL Systems4.1 Hurwitz Criterion of Stability; 4.2 Computation of the Roots of the Polynomial P(s); 4.3 Expansion of the Function 1/[1 + G(s)] into a Sum of Simple Fractions; 4.3.1 Polynomial S(s) Contains Simple Roots Only; 4.3.2 Polynomial S(s) Contains a Pair of Complex Roots; 4.3.3 Polynomial S(s) Contains Multiple-order Roots; 4.4 The Root-locus Method; 4.5 Frequency Analysis of the Transfer Functions - Bode Plots; 4.5.1 Bode Plots; 4.5.2 Polar Diagrams; 4.6 Nyquist Criterion of Stability; 4.7 The Effective Damping Factor; 4.8 Appendix; References; 5 Tracking 5.1 Transients in PLLs5.1.1 Transients in First-order PLLs; 5.1.2 Transients in Second-order PLLs; 5.1.3 Transients in Higher-order Loops; 5.2 Periodic Changes; 5.2.1 Phase Modulation of the Input Signal; 5.2.2 Frequency Modulation of the Input Signal; 5.3 Discrete Spurious Signals; 5.3.1 Small Discrete Spurious Signals at the Input; 5.3.2 Small Spurious Signals at the Output of the Phase Detector; 5.3.3 Small Spurious Signals at the Output of the PLLs; References; 6 Working Ranges of PLLs; 6.1 Hold-in Range; 6.1.1 Phase Detector with the Sine Wave Output; 6.1.2 The PD with Triangular Output 6.1.3 The PD with a Sawtooth Wave Output |
| Record Nr. | UNINA-9910143229003321 |
|
Kroupa Věnceslav F. <1923->
|
||
| New York, : J. Wiley, 2003 | ||
| Materiale a stampa | ||
| Lo trovi qui: Univ. Federico II | ||
| ||
Phase lock loops and frequency synthesis [[electronic resource] /] / Věnceslav F. Kroupa
| Phase lock loops and frequency synthesis [[electronic resource] /] / Věnceslav F. Kroupa |
| Autore | Kroupa Věnceslav F. <1923-> |
| Pubbl/distr/stampa | New York, : J. Wiley, 2003 |
| Descrizione fisica | 1 online resource (336 p.) |
| Disciplina |
621.3815/364
621.3815364 621.382 |
| Soggetto topico |
Phase-locked loops
Frequency synthesizers |
| ISBN |
1-280-27201-5
9786610272013 0-470-29946-0 0-470-86512-1 0-470-01410-5 |
| Formato | Materiale a stampa |
| Livello bibliografico | Monografia |
| Lingua di pubblicazione | eng |
| Nota di contenuto |
Phase Lock Loops and Frequency Synthesis; Contents; Preface; 1 Basic Equations of the PLLs; 1.1 Introduction; 1.2 Basic Equations of the PLLs; 1.3 Solution of the Basic PLL Equation in the Time Domain; 1.3.1 Solution in the Closed Form; 1.3.2 Linearized Solution; 1.4 Solution of Basic PLL Equations in the Frequency Domain; 1.5 Order and Type of PLLs; 1.5.1 Order of PLLs; 1.5.2 Type of PLLs; 1.5.3 Steady State Errors; 1.6 Block Diagram Algebra; References; 2 PLLs of the First and Second Order; 2.1 PLLs of the First Order; 2.2 PLLs of the Second Order; 2.2.1 A Simple RC Filter
2.2.2 Phase Lag-lead RRC or RCC Filter2.3 PLLs of the Second Order of Type 2; 2.3.1 PLLs of the Second Order of Type 2 with Voltage Output PD; 2.3.2 PLLs of the Second Order of Type 2 with Current Output Phase Detector; 2.4 Second-order PLLs with Frequency Dividers in the Feedback Path; References; 3 PLLs of the Third and Higher Orders; 3.1 General Open-loop Transfer Function G(s); 3.1.1 Additional RC Section; 3.1.2 Two RC Sections; 3.1.3 Active Second-order Low-pass Filter; 3.1.4 Twin-T RC Filter; 3.1.5 PLLs with a Selective Filter in the Feedback Path; 3.1.6 Time Delays in PLLs 3.2 Higher-order Type 2 PLLs3.2.1 Third-order Loops: Lag-lead Filter with Additional RC Section; 3.2.2 Third-order Loop: Second-order Lag Filter Plus RC Section; 3.2.3 Fourth-order Loops; 3.2.4 Fifth-order Loops; 3.3 PLLs with Transmission Blocks in the Feedback Path; 3.3.1 Divider in the Feedback Path; 3.3.2 IF Filter in the Feedback Path; 3.3.3 IF Filter and Divider in the Feedback Path; 3.4 Sampled Higher-order Loops; 3.4.1 Third-order Loops with the Current Output Phase Detector; 3.5 Higher-order Loops of Type 3; 3.6 Computer Design of a Higher-order PLL; References 4 Stability of the PLL Systems4.1 Hurwitz Criterion of Stability; 4.2 Computation of the Roots of the Polynomial P(s); 4.3 Expansion of the Function 1/[1 + G(s)] into a Sum of Simple Fractions; 4.3.1 Polynomial S(s) Contains Simple Roots Only; 4.3.2 Polynomial S(s) Contains a Pair of Complex Roots; 4.3.3 Polynomial S(s) Contains Multiple-order Roots; 4.4 The Root-locus Method; 4.5 Frequency Analysis of the Transfer Functions - Bode Plots; 4.5.1 Bode Plots; 4.5.2 Polar Diagrams; 4.6 Nyquist Criterion of Stability; 4.7 The Effective Damping Factor; 4.8 Appendix; References; 5 Tracking 5.1 Transients in PLLs5.1.1 Transients in First-order PLLs; 5.1.2 Transients in Second-order PLLs; 5.1.3 Transients in Higher-order Loops; 5.2 Periodic Changes; 5.2.1 Phase Modulation of the Input Signal; 5.2.2 Frequency Modulation of the Input Signal; 5.3 Discrete Spurious Signals; 5.3.1 Small Discrete Spurious Signals at the Input; 5.3.2 Small Spurious Signals at the Output of the Phase Detector; 5.3.3 Small Spurious Signals at the Output of the PLLs; References; 6 Working Ranges of PLLs; 6.1 Hold-in Range; 6.1.1 Phase Detector with the Sine Wave Output; 6.1.2 The PD with Triangular Output 6.1.3 The PD with a Sawtooth Wave Output |
| Record Nr. | UNINA-9910829852303321 |
|
Kroupa Věnceslav F. <1923->
|
||
| New York, : J. Wiley, 2003 | ||
| Materiale a stampa | ||
| Lo trovi qui: Univ. Federico II | ||
| ||
Phase lock loops and frequency synthesis / / Venceslav F. Kroupa
| Phase lock loops and frequency synthesis / / Venceslav F. Kroupa |
| Autore | Kroupa Věnceslav F. <1923-> |
| Pubbl/distr/stampa | New York, : J. Wiley, 2003 |
| Descrizione fisica | 1 online resource (336 p.) |
| Disciplina | 621.3815/364 |
| Soggetto topico |
Phase-locked loops
Frequency synthesizers |
| ISBN |
9786610272013
9781280272011 1280272015 9780470299463 0470299460 9780470865125 0470865121 9780470014103 0470014105 |
| Formato | Materiale a stampa |
| Livello bibliografico | Monografia |
| Lingua di pubblicazione | eng |
| Nota di contenuto |
Phase Lock Loops and Frequency Synthesis; Contents; Preface; 1 Basic Equations of the PLLs; 1.1 Introduction; 1.2 Basic Equations of the PLLs; 1.3 Solution of the Basic PLL Equation in the Time Domain; 1.3.1 Solution in the Closed Form; 1.3.2 Linearized Solution; 1.4 Solution of Basic PLL Equations in the Frequency Domain; 1.5 Order and Type of PLLs; 1.5.1 Order of PLLs; 1.5.2 Type of PLLs; 1.5.3 Steady State Errors; 1.6 Block Diagram Algebra; References; 2 PLLs of the First and Second Order; 2.1 PLLs of the First Order; 2.2 PLLs of the Second Order; 2.2.1 A Simple RC Filter
2.2.2 Phase Lag-lead RRC or RCC Filter2.3 PLLs of the Second Order of Type 2; 2.3.1 PLLs of the Second Order of Type 2 with Voltage Output PD; 2.3.2 PLLs of the Second Order of Type 2 with Current Output Phase Detector; 2.4 Second-order PLLs with Frequency Dividers in the Feedback Path; References; 3 PLLs of the Third and Higher Orders; 3.1 General Open-loop Transfer Function G(s); 3.1.1 Additional RC Section; 3.1.2 Two RC Sections; 3.1.3 Active Second-order Low-pass Filter; 3.1.4 Twin-T RC Filter; 3.1.5 PLLs with a Selective Filter in the Feedback Path; 3.1.6 Time Delays in PLLs 3.2 Higher-order Type 2 PLLs3.2.1 Third-order Loops: Lag-lead Filter with Additional RC Section; 3.2.2 Third-order Loop: Second-order Lag Filter Plus RC Section; 3.2.3 Fourth-order Loops; 3.2.4 Fifth-order Loops; 3.3 PLLs with Transmission Blocks in the Feedback Path; 3.3.1 Divider in the Feedback Path; 3.3.2 IF Filter in the Feedback Path; 3.3.3 IF Filter and Divider in the Feedback Path; 3.4 Sampled Higher-order Loops; 3.4.1 Third-order Loops with the Current Output Phase Detector; 3.5 Higher-order Loops of Type 3; 3.6 Computer Design of a Higher-order PLL; References 4 Stability of the PLL Systems4.1 Hurwitz Criterion of Stability; 4.2 Computation of the Roots of the Polynomial P(s); 4.3 Expansion of the Function 1/[1 + G(s)] into a Sum of Simple Fractions; 4.3.1 Polynomial S(s) Contains Simple Roots Only; 4.3.2 Polynomial S(s) Contains a Pair of Complex Roots; 4.3.3 Polynomial S(s) Contains Multiple-order Roots; 4.4 The Root-locus Method; 4.5 Frequency Analysis of the Transfer Functions - Bode Plots; 4.5.1 Bode Plots; 4.5.2 Polar Diagrams; 4.6 Nyquist Criterion of Stability; 4.7 The Effective Damping Factor; 4.8 Appendix; References; 5 Tracking 5.1 Transients in PLLs5.1.1 Transients in First-order PLLs; 5.1.2 Transients in Second-order PLLs; 5.1.3 Transients in Higher-order Loops; 5.2 Periodic Changes; 5.2.1 Phase Modulation of the Input Signal; 5.2.2 Frequency Modulation of the Input Signal; 5.3 Discrete Spurious Signals; 5.3.1 Small Discrete Spurious Signals at the Input; 5.3.2 Small Spurious Signals at the Output of the Phase Detector; 5.3.3 Small Spurious Signals at the Output of the PLLs; References; 6 Working Ranges of PLLs; 6.1 Hold-in Range; 6.1.1 Phase Detector with the Sine Wave Output; 6.1.2 The PD with Triangular Output 6.1.3 The PD with a Sawtooth Wave Output |
| Record Nr. | UNINA-9911018797603321 |
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Kroupa Věnceslav F. <1923->
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| New York, : J. Wiley, 2003 | ||
| Materiale a stampa | ||
| Lo trovi qui: Univ. Federico II | ||
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Phase-lock basics / / William F. Egan
| Phase-lock basics / / William F. Egan |
| Autore | Egan William F |
| Edizione | [2nd ed.] |
| Pubbl/distr/stampa | Hoboken, N.J., : Wiley-Interscience |
| Descrizione fisica | 1 online resource (473 p.) |
| Disciplina | 621.3815/364 |
| Soggetto topico |
Phase-locked loops
Nuclear engineering |
| ISBN |
9786611094157
9781281094155 1281094153 9780470178737 0470178736 9780470178713 047017871X |
| Formato | Materiale a stampa |
| Livello bibliografico | Monografia |
| Lingua di pubblicazione | eng |
| Nota di contenuto | Pt. 1. Phase Lock Without Noise. -- 1. Introduction (p. 3) -- 2. The Basic Loop (p. 15) -- 3. Loop Components (p. 29) -- 4. Loop Response (p. 59) -- 5. Loop Stability (p. 71) -- 6. Transient Response (p. 87) -- 7. Modulation Response (p. 111) -- 8. Acquisition (p. 137) -- 9. Acquisition Aids (p. 171) -- 10. Applications a Extensions (p. 189) -- Pt. 2. Phase Lock in Noise. -- 11. Phase Modulation By Noise (p. 233) -- 12. Response to Phase Noise (p. 251) -- 13. Representation of Additive Noise (p. 271) -- 14. Loop Response to Additive Noise (p. 287) -- 15. Phase-Locked Loop as a Demodulator (p. 297) -- 16. Parameter Variation Due to Noise (p. 319) -- 17. Cycle Skipping Due to Noise (p. 335) -- 18. Nonlinear Operation in a Locked Loop (p. 359) -- 19. Acquisition Aids in the Presence of Noise (p. 377) -- 20. Bandlimited Noise (p. 395) -- 21. Further Information (p. 415) |
| Record Nr. | UNINA-9911019398103321 |
|
Egan William F
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||
| Hoboken, N.J., : Wiley-Interscience | ||
| Materiale a stampa | ||
| Lo trovi qui: Univ. Federico II | ||
| ||
