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10th IEEE Workshop on Signal Propagation on Interconnects : May 09-12, 2006, "Dorint Sofitel Schweizerhof Berlin", Berlin, Germany : proceedings / / co-sponsored by IEEE Components, Packaging and Manufacturing Technology Society (CPMT), Technical Committee on Electrical Design, Modeling and Simulation (TC-EMDS) [i.e. TC-EDMS], and by IEEE Computer Society, Test Technology Technical Council (TTTC)
10th IEEE Workshop on Signal Propagation on Interconnects : May 09-12, 2006, "Dorint Sofitel Schweizerhof Berlin", Berlin, Germany : proceedings / / co-sponsored by IEEE Components, Packaging and Manufacturing Technology Society (CPMT), Technical Committee on Electrical Design, Modeling and Simulation (TC-EMDS) [i.e. TC-EDMS], and by IEEE Computer Society, Test Technology Technical Council (TTTC)
Pubbl/distr/stampa IEEE
Disciplina 621.3815/31
Soggetto topico Printed circuits
Interconnects (Integrated circuit technology)
Signal theory (Telecommunication)
ISBN 1-5090-9224-2
Formato Materiale a stampa
Livello bibliografico Monografia
Lingua di pubblicazione eng
Altri titoli varianti 2006 IEEE Workship on Signal Propagation on Interconnects
Systems, Man and Cybernetics
Record Nr. UNISA-996279698403316
IEEE
Materiale a stampa
Lo trovi qui: Univ. di Salerno
Opac: Controlla la disponibilità qui
10th IEEE Workshop on Signal Propagation on Interconnects : May 09-12, 2006, "Dorint Sofitel Schweizerhof Berlin", Berlin, Germany : proceedings / / co-sponsored by IEEE Components, Packaging and Manufacturing Technology Society (CPMT), Technical Committee on Electrical Design, Modeling and Simulation (TC-EMDS) [i.e. TC-EDMS], and by IEEE Computer Society, Test Technology Technical Council (TTTC)
10th IEEE Workshop on Signal Propagation on Interconnects : May 09-12, 2006, "Dorint Sofitel Schweizerhof Berlin", Berlin, Germany : proceedings / / co-sponsored by IEEE Components, Packaging and Manufacturing Technology Society (CPMT), Technical Committee on Electrical Design, Modeling and Simulation (TC-EMDS) [i.e. TC-EDMS], and by IEEE Computer Society, Test Technology Technical Council (TTTC)
Pubbl/distr/stampa IEEE
Disciplina 621.3815/31
Soggetto topico Printed circuits
Interconnects (Integrated circuit technology)
Signal theory (Telecommunication)
ISBN 1-5090-9224-2
Formato Materiale a stampa
Livello bibliografico Monografia
Lingua di pubblicazione eng
Altri titoli varianti 2006 IEEE Workship on Signal Propagation on Interconnects
Systems, Man and Cybernetics
Record Nr. UNINA-9910142665303321
IEEE
Materiale a stampa
Lo trovi qui: Univ. Federico II
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8th IEEE Workshop on Signal Propagation on Interconnects : proceedings : May 9-12, 2004, Hotel "Crowne Plaza", Heidelberg, Germany
8th IEEE Workshop on Signal Propagation on Interconnects : proceedings : May 9-12, 2004, Hotel "Crowne Plaza", Heidelberg, Germany
Pubbl/distr/stampa [Place of publication not identified], : IEEE, 2004
Disciplina 621.3815/31
Soggetto topico Printed circuits
Signal theory (Telecommunication)
Electrical Engineering
Electrical & Computer Engineering
Engineering & Applied Sciences
Formato Materiale a stampa
Livello bibliografico Monografia
Lingua di pubblicazione eng
Record Nr. UNISA-996202109703316
[Place of publication not identified], : IEEE, 2004
Materiale a stampa
Lo trovi qui: Univ. di Salerno
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9th IEEE Workshop on Signal Propagation on Interconnects proceedings : May 10-13, 2005, Hotel "Dorint", Garmisch-Partenkirchen, Germany
9th IEEE Workshop on Signal Propagation on Interconnects proceedings : May 10-13, 2005, Hotel "Dorint", Garmisch-Partenkirchen, Germany
Pubbl/distr/stampa Piscataway N J, : IEEE, 2005
Disciplina 621.3815/31
Soggetto topico Printed circuits
Signal theory (Telecommunication)
ISBN 1-5090-9883-6
Formato Materiale a stampa
Livello bibliografico Monografia
Lingua di pubblicazione eng
Record Nr. UNISA-996204067203316
Piscataway N J, : IEEE, 2005
Materiale a stampa
Lo trovi qui: Univ. di Salerno
Opac: Controlla la disponibilità qui
9th IEEE Workshop on Signal Propagation on Interconnects proceedings : May 10-13, 2005, Hotel "Dorint", Garmisch-Partenkirchen, Germany
9th IEEE Workshop on Signal Propagation on Interconnects proceedings : May 10-13, 2005, Hotel "Dorint", Garmisch-Partenkirchen, Germany
Pubbl/distr/stampa Piscataway N J, : IEEE, 2005
Disciplina 621.3815/31
Soggetto topico Printed circuits
Signal theory (Telecommunication)
ISBN 1-5090-9883-6
Formato Materiale a stampa
Livello bibliografico Monografia
Lingua di pubblicazione eng
Record Nr. UNINA-9910146829103321
Piscataway N J, : IEEE, 2005
Materiale a stampa
Lo trovi qui: Univ. Federico II
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Communicating embedded systems [[electronic resource] ] : network applications / / edited by Francine Krief
Communicating embedded systems [[electronic resource] ] : network applications / / edited by Francine Krief
Pubbl/distr/stampa London, : ISTE
Descrizione fisica 1 online resource (348 p.)
Disciplina 621.3815/31
621.381531
621.39
Altri autori (Persone) KriefFrancine
Collana ISTE
Soggetto topico Networks on a chip
Soggetto genere / forma Electronic books.
ISBN 1-118-55762-X
1-299-31539-9
1-118-61851-3
Classificazione ST 153
Formato Materiale a stampa
Livello bibliografico Monografia
Lingua di pubblicazione eng
Nota di contenuto Cover; Communicating Embedded Systems; Title Page; Copyright Page; Table of Contents; General Introduction; Chapter 1. Introduction to Embedded Systems; 1.1. Introduction; 1.2. Embedded system: a definition; 1.3. Properties of an embedded system; 1.4. The significance of Moore's Law; 1.5. Embedded systems and the system on silicon; 1.6. Embedded systems and communications; 1.7. Embedded systems and security; 1.8. Embedded systems and time constraints; 1.9. Embedded systems and free software; 1.10. Embedded systems and their design; 1.11. An example of multimedia embedded system design
1.12. Conclusion1.13. Bibliography; Chapter 2. Quality-of-Service Routing in Mobile Ad Hoc Networks; 2.1. Introduction; 2.2. Mobile ad hoc networks: concepts, characteristics, challenges; 2.2.1. Concepts and basic principles; 2.2.2. Limits and challenges; 2.2.3. MAC protocols for ad hoc networks; 2.2.4. Node mobility and location; 2.3. QoS routing: general considerations; 2.3.1. Functions of routing protocols; 2.3.2. Classification of routing protocols; 2.3.3. Expected routing protocol properties; 2.3.4. QoS routing problems; 2.4. Best-effort routing protocols in MANETs
2.4.1. Criteria for routing protocol classification2.4.2. Presentation of routing protocols; 2.5. QoS routing in MANETs; 2.5.1. Approaches for QoS routing; 2.5.2. Resource reservation; 2.5.3. Examples of reservation methods; 2.5.4. Estimation models; 2.5.5. Presentation of the main QoS routing protocols; 2.6. Conclusion; 2.7. Bibliography; Chapter 3. Self-Management of Ad Hoc Sensor Networks; 3.1. Introduction; 3.2. Wireless sensor networks; 3.2.1. Fields of application for sensor networks; 3.2.2. The principal components in a sensor; 3.2.3. Importance of energy in sensor networks
3.2.4. Transmission technologies3.2.5. Routing algorithms; 3.2.6. Main commercial offerings; 3.2.7. Key issues; 3.2.8. Projects on sensor networks; 3.3. Autonomic sensor networks; 3.3.1. Autonomic networking; 3.3.2. Self-configuration of sensor networks; 3.3.3. Self-healing of sensor networks; 3.3.4. Self-optimization of sensor networks; 3.3.5. Self-protection of sensor networks; 3.3.6. Projects relating to autonomy in sensor networks; 3.4. An example of self-configuration; 3.4.1. Energy optimization and automatic classification; 3.4.2. The LEA2C energy optimization algorithm
3.4.3. Performance evaluation of the LEA2C algorithm3.4.4. Improvements to the LEA2C algorithm; 3.5. Conclusion; 3.6. Bibliography; Chapter 4. RFID Technology; 4.1. Introduction; 4.2. Automatic identification systems; 4.2.1. Barcodes; 4.2.2. Optical character recognition (OCR) systems; 4.2.3. Biometric identification; 4.2.4. Microchip cards; 4.2.5. RFID systems; 4.3. The components of an RFID system; 4.4. The different types of RFID systems; 4.4.1. Bottom of the range RFID systems; 4.4.2. Mid-range RFID systems; 4.4.3. Top of the range RFID systems; 4.5. RF ranges; 4.6. Information security
4.6.1. Symmetric mutual authentication
Record Nr. UNINA-9910139247003321
London, : ISTE
Materiale a stampa
Lo trovi qui: Univ. Federico II
Opac: Controlla la disponibilità qui
Communicating embedded systems [[electronic resource] ] : network applications / / edited by Francine Krief
Communicating embedded systems [[electronic resource] ] : network applications / / edited by Francine Krief
Pubbl/distr/stampa London, : ISTE
Descrizione fisica 1 online resource (348 p.)
Disciplina 621.3815/31
621.381531
621.39
Altri autori (Persone) KriefFrancine
Collana ISTE
Soggetto topico Networks on a chip
ISBN 1-118-55762-X
1-299-31539-9
1-118-61851-3
Classificazione ST 153
Formato Materiale a stampa
Livello bibliografico Monografia
Lingua di pubblicazione eng
Nota di contenuto Cover; Communicating Embedded Systems; Title Page; Copyright Page; Table of Contents; General Introduction; Chapter 1. Introduction to Embedded Systems; 1.1. Introduction; 1.2. Embedded system: a definition; 1.3. Properties of an embedded system; 1.4. The significance of Moore's Law; 1.5. Embedded systems and the system on silicon; 1.6. Embedded systems and communications; 1.7. Embedded systems and security; 1.8. Embedded systems and time constraints; 1.9. Embedded systems and free software; 1.10. Embedded systems and their design; 1.11. An example of multimedia embedded system design
1.12. Conclusion1.13. Bibliography; Chapter 2. Quality-of-Service Routing in Mobile Ad Hoc Networks; 2.1. Introduction; 2.2. Mobile ad hoc networks: concepts, characteristics, challenges; 2.2.1. Concepts and basic principles; 2.2.2. Limits and challenges; 2.2.3. MAC protocols for ad hoc networks; 2.2.4. Node mobility and location; 2.3. QoS routing: general considerations; 2.3.1. Functions of routing protocols; 2.3.2. Classification of routing protocols; 2.3.3. Expected routing protocol properties; 2.3.4. QoS routing problems; 2.4. Best-effort routing protocols in MANETs
2.4.1. Criteria for routing protocol classification2.4.2. Presentation of routing protocols; 2.5. QoS routing in MANETs; 2.5.1. Approaches for QoS routing; 2.5.2. Resource reservation; 2.5.3. Examples of reservation methods; 2.5.4. Estimation models; 2.5.5. Presentation of the main QoS routing protocols; 2.6. Conclusion; 2.7. Bibliography; Chapter 3. Self-Management of Ad Hoc Sensor Networks; 3.1. Introduction; 3.2. Wireless sensor networks; 3.2.1. Fields of application for sensor networks; 3.2.2. The principal components in a sensor; 3.2.3. Importance of energy in sensor networks
3.2.4. Transmission technologies3.2.5. Routing algorithms; 3.2.6. Main commercial offerings; 3.2.7. Key issues; 3.2.8. Projects on sensor networks; 3.3. Autonomic sensor networks; 3.3.1. Autonomic networking; 3.3.2. Self-configuration of sensor networks; 3.3.3. Self-healing of sensor networks; 3.3.4. Self-optimization of sensor networks; 3.3.5. Self-protection of sensor networks; 3.3.6. Projects relating to autonomy in sensor networks; 3.4. An example of self-configuration; 3.4.1. Energy optimization and automatic classification; 3.4.2. The LEA2C energy optimization algorithm
3.4.3. Performance evaluation of the LEA2C algorithm3.4.4. Improvements to the LEA2C algorithm; 3.5. Conclusion; 3.6. Bibliography; Chapter 4. RFID Technology; 4.1. Introduction; 4.2. Automatic identification systems; 4.2.1. Barcodes; 4.2.2. Optical character recognition (OCR) systems; 4.2.3. Biometric identification; 4.2.4. Microchip cards; 4.2.5. RFID systems; 4.3. The components of an RFID system; 4.4. The different types of RFID systems; 4.4.1. Bottom of the range RFID systems; 4.4.2. Mid-range RFID systems; 4.4.3. Top of the range RFID systems; 4.5. RF ranges; 4.6. Information security
4.6.1. Symmetric mutual authentication
Record Nr. UNINA-9910830381103321
London, : ISTE
Materiale a stampa
Lo trovi qui: Univ. Federico II
Opac: Controlla la disponibilità qui
Communicating embedded systems [[electronic resource] ] : network applications / / edited by Francine Krief
Communicating embedded systems [[electronic resource] ] : network applications / / edited by Francine Krief
Pubbl/distr/stampa London, : ISTE
Descrizione fisica 1 online resource (348 p.)
Disciplina 621.3815/31
621.381531
621.39
Altri autori (Persone) KriefFrancine
Collana ISTE
Soggetto topico Networks on a chip
ISBN 1-118-55762-X
1-299-31539-9
1-118-61851-3
Classificazione ST 153
Formato Materiale a stampa
Livello bibliografico Monografia
Lingua di pubblicazione eng
Nota di contenuto Cover; Communicating Embedded Systems; Title Page; Copyright Page; Table of Contents; General Introduction; Chapter 1. Introduction to Embedded Systems; 1.1. Introduction; 1.2. Embedded system: a definition; 1.3. Properties of an embedded system; 1.4. The significance of Moore's Law; 1.5. Embedded systems and the system on silicon; 1.6. Embedded systems and communications; 1.7. Embedded systems and security; 1.8. Embedded systems and time constraints; 1.9. Embedded systems and free software; 1.10. Embedded systems and their design; 1.11. An example of multimedia embedded system design
1.12. Conclusion1.13. Bibliography; Chapter 2. Quality-of-Service Routing in Mobile Ad Hoc Networks; 2.1. Introduction; 2.2. Mobile ad hoc networks: concepts, characteristics, challenges; 2.2.1. Concepts and basic principles; 2.2.2. Limits and challenges; 2.2.3. MAC protocols for ad hoc networks; 2.2.4. Node mobility and location; 2.3. QoS routing: general considerations; 2.3.1. Functions of routing protocols; 2.3.2. Classification of routing protocols; 2.3.3. Expected routing protocol properties; 2.3.4. QoS routing problems; 2.4. Best-effort routing protocols in MANETs
2.4.1. Criteria for routing protocol classification2.4.2. Presentation of routing protocols; 2.5. QoS routing in MANETs; 2.5.1. Approaches for QoS routing; 2.5.2. Resource reservation; 2.5.3. Examples of reservation methods; 2.5.4. Estimation models; 2.5.5. Presentation of the main QoS routing protocols; 2.6. Conclusion; 2.7. Bibliography; Chapter 3. Self-Management of Ad Hoc Sensor Networks; 3.1. Introduction; 3.2. Wireless sensor networks; 3.2.1. Fields of application for sensor networks; 3.2.2. The principal components in a sensor; 3.2.3. Importance of energy in sensor networks
3.2.4. Transmission technologies3.2.5. Routing algorithms; 3.2.6. Main commercial offerings; 3.2.7. Key issues; 3.2.8. Projects on sensor networks; 3.3. Autonomic sensor networks; 3.3.1. Autonomic networking; 3.3.2. Self-configuration of sensor networks; 3.3.3. Self-healing of sensor networks; 3.3.4. Self-optimization of sensor networks; 3.3.5. Self-protection of sensor networks; 3.3.6. Projects relating to autonomy in sensor networks; 3.4. An example of self-configuration; 3.4.1. Energy optimization and automatic classification; 3.4.2. The LEA2C energy optimization algorithm
3.4.3. Performance evaluation of the LEA2C algorithm3.4.4. Improvements to the LEA2C algorithm; 3.5. Conclusion; 3.6. Bibliography; Chapter 4. RFID Technology; 4.1. Introduction; 4.2. Automatic identification systems; 4.2.1. Barcodes; 4.2.2. Optical character recognition (OCR) systems; 4.2.3. Biometric identification; 4.2.4. Microchip cards; 4.2.5. RFID systems; 4.3. The components of an RFID system; 4.4. The different types of RFID systems; 4.4.1. Bottom of the range RFID systems; 4.4.2. Mid-range RFID systems; 4.4.3. Top of the range RFID systems; 4.5. RF ranges; 4.6. Information security
4.6.1. Symmetric mutual authentication
Record Nr. UNINA-9910840899303321
London, : ISTE
Materiale a stampa
Lo trovi qui: Univ. Federico II
Opac: Controlla la disponibilità qui
Complete PCB design using OrCad capture and layout [[electronic resource] /] / by Kraig Mitzner
Complete PCB design using OrCad capture and layout [[electronic resource] /] / by Kraig Mitzner
Autore Mitzner Kraig
Pubbl/distr/stampa Amsterdam ; ; Boston, : Elsevier/Newnes, c2007
Descrizione fisica 1 online resource (529 p.)
Disciplina 621.3815/31
Soggetto topico Printed circuits - Design and construction
Soggetto genere / forma Electronic books.
ISBN 1-281-01934-8
9786611019341
0-08-054920-9
Formato Materiale a stampa
Livello bibliografico Monografia
Lingua di pubblicazione eng
Nota di contenuto FRONT COVER; COMPLETE PCB DESIGN USING ORCAD CAPTURE AND LAYOUT; COPYRIGHT PAGE; TABLE OF CONTENTS; INTRODUCTION; ACKNOWLEDGMENTS; CHAPTER 1: INTRODUCTION TO PCB DESIGN AND CAD; Computer-Aided Design and the OrCAD Design Suite; Printed Circuit Board Fabrication; PCB cores and layer stack-up; PCB fabrication process; Photolithography and chemical etching; Mechanical milling; Layer registration; Function of OrCAD Layout in the PCB Design Process; Design Files Created by Layout; Layout format files (.MAX); Postprocess (Gerber) files; PCB assembly layers and files
CHAPTER 2: INTRODUCTION TO THE PCB DESIGN FLOW BY EXAMPLEOverview of the Design Flow; Creating a Circuit Design with Capture; Starting a new project; Placing parts; Wiring (connecting) the parts; Creating the Layout netlist in Capture; Designing the PCB with Layout; Starting Layout and importing the netlist; Making a board outline; Placing the parts; Autorouting the board; Manual routing; Cleanup; Locking traces; Performing a design rule check; Postprocessing the board design for manufacturing; CHAPTER 3: PROJECT STRUCTURES AND THE LAYOUT TOOL SET; Project Setup and Schematic Entry Details
Capture projects explainedCapture part libraries explained; Understanding the Layout Environment and Tool Set; Board technology files; The AutoECO utility; The session frame and Design window; The toolbar; Controlling the autorouter; Postprocessing and layer details; CHAPTER 4: INTRODUCTION TO INDUSTRY STANDARDS; Introduction to the Standards Organizations; Institute for Printed Circuits (IPC-Association Connecting Electronics Industries); Electronic Industries Alliance (EIA); Joint Electron Device Engineering Council (JEDEC); International Engineering Consortium (IEC); Military Standards
American National Standards Institute (ANSI)Institute of Electrical and Electronics Engineers (IEEE); Classes and Types of PCBs; Performance classes; Producibility levels; Fabrication types and assembly subclasses; OrCAD Layout design complexity levels-IPC performance classes; IPC land pattern density levels; Introduction to Standard Fabrication Allowances; Registration tolerances; Breakout and annular ring control; PCB Dimensions and Tolerances; Standard panel sizes; Tooling area allowances and effective panel usage; Standard finished PCB thickness; Core thickness; Prepreg thickness
Copper thickness for PTHs and viasCopper cladding/foil thickness; Copper Trace and Etching Tolerances; Standard Hole Dimensions; Soldermask Tolerance; End Note; Suggested reading; Other items of interest; CHAPTER 5: INTRODUCTION TO DESIGN FOR MANUFACTURING; Introduction to PCB Assembly and Soldering Processes; Assembly Processes; Manual assembly processes; Automated assembly processes (pick and place); Soldering Processes; Manual soldering; Wave soldering; Reflow soldering; Component Placement and Orientation Guide; Component Spacing for Through-hole Devices; Discrete THDs
Integrated circuit through-hole devices
Record Nr. UNINA-9910458571503321
Mitzner Kraig  
Amsterdam ; ; Boston, : Elsevier/Newnes, c2007
Materiale a stampa
Lo trovi qui: Univ. Federico II
Opac: Controlla la disponibilità qui
Complete PCB design using OrCad capture and layout [[electronic resource] /] / by Kraig Mitzner
Complete PCB design using OrCad capture and layout [[electronic resource] /] / by Kraig Mitzner
Autore Mitzner Kraig
Pubbl/distr/stampa Amsterdam ; ; Boston, : Elsevier/Newnes, c2007
Descrizione fisica 1 online resource (529 p.)
Disciplina 621.3815/31
Soggetto topico Printed circuits - Design and construction
ISBN 1-281-01934-8
9786611019341
0-08-054920-9
Formato Materiale a stampa
Livello bibliografico Monografia
Lingua di pubblicazione eng
Nota di contenuto FRONT COVER; COMPLETE PCB DESIGN USING ORCAD CAPTURE AND LAYOUT; COPYRIGHT PAGE; TABLE OF CONTENTS; INTRODUCTION; ACKNOWLEDGMENTS; CHAPTER 1: INTRODUCTION TO PCB DESIGN AND CAD; Computer-Aided Design and the OrCAD Design Suite; Printed Circuit Board Fabrication; PCB cores and layer stack-up; PCB fabrication process; Photolithography and chemical etching; Mechanical milling; Layer registration; Function of OrCAD Layout in the PCB Design Process; Design Files Created by Layout; Layout format files (.MAX); Postprocess (Gerber) files; PCB assembly layers and files
CHAPTER 2: INTRODUCTION TO THE PCB DESIGN FLOW BY EXAMPLEOverview of the Design Flow; Creating a Circuit Design with Capture; Starting a new project; Placing parts; Wiring (connecting) the parts; Creating the Layout netlist in Capture; Designing the PCB with Layout; Starting Layout and importing the netlist; Making a board outline; Placing the parts; Autorouting the board; Manual routing; Cleanup; Locking traces; Performing a design rule check; Postprocessing the board design for manufacturing; CHAPTER 3: PROJECT STRUCTURES AND THE LAYOUT TOOL SET; Project Setup and Schematic Entry Details
Capture projects explainedCapture part libraries explained; Understanding the Layout Environment and Tool Set; Board technology files; The AutoECO utility; The session frame and Design window; The toolbar; Controlling the autorouter; Postprocessing and layer details; CHAPTER 4: INTRODUCTION TO INDUSTRY STANDARDS; Introduction to the Standards Organizations; Institute for Printed Circuits (IPC-Association Connecting Electronics Industries); Electronic Industries Alliance (EIA); Joint Electron Device Engineering Council (JEDEC); International Engineering Consortium (IEC); Military Standards
American National Standards Institute (ANSI)Institute of Electrical and Electronics Engineers (IEEE); Classes and Types of PCBs; Performance classes; Producibility levels; Fabrication types and assembly subclasses; OrCAD Layout design complexity levels-IPC performance classes; IPC land pattern density levels; Introduction to Standard Fabrication Allowances; Registration tolerances; Breakout and annular ring control; PCB Dimensions and Tolerances; Standard panel sizes; Tooling area allowances and effective panel usage; Standard finished PCB thickness; Core thickness; Prepreg thickness
Copper thickness for PTHs and viasCopper cladding/foil thickness; Copper Trace and Etching Tolerances; Standard Hole Dimensions; Soldermask Tolerance; End Note; Suggested reading; Other items of interest; CHAPTER 5: INTRODUCTION TO DESIGN FOR MANUFACTURING; Introduction to PCB Assembly and Soldering Processes; Assembly Processes; Manual assembly processes; Automated assembly processes (pick and place); Soldering Processes; Manual soldering; Wave soldering; Reflow soldering; Component Placement and Orientation Guide; Component Spacing for Through-hole Devices; Discrete THDs
Integrated circuit through-hole devices
Record Nr. UNINA-9910784614803321
Mitzner Kraig  
Amsterdam ; ; Boston, : Elsevier/Newnes, c2007
Materiale a stampa
Lo trovi qui: Univ. Federico II
Opac: Controlla la disponibilità qui