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Guide to state-of-the-art electron devices / / edited by Joachim N. Burghartz
Guide to state-of-the-art electron devices / / edited by Joachim N. Burghartz
Pubbl/distr/stampa Chichester, West Sussex, U.K. : , : John Wiley & Sons Inc., , 2013
Descrizione fisica 1 online resource (324 p.)
Disciplina 621.3815/28
Altri autori (Persone) BurghartzJoachim N
Collana Wiley - IEEE
Soggetto topico Electronic apparatus and appliances
ISBN 1-118-51753-9
1-118-51754-7
1-299-24258-8
1-118-51751-2
Classificazione TEC008010
Formato Materiale a stampa
Livello bibliografico Monografia
Lingua di pubblicazione eng
Nota di contenuto Foreword xi -- Preface xiii -- Contributors xvii -- Acknowledgments xix -- Introduction: Historic Timeline xxi -- PART I BASIC ELECTRON DEVICES -- 1 Bipolar Transistors 3 / John D. Cressler and Katsuyoshi Washio -- 1.1 Motivation 3 -- 1.2 The pn Junction and its Electronic Applications 5 -- 1.3 The Bipolar Junction Transistor and its Electronic Applications 10 -- 1.4 Optimization of Bipolar Transistors 15 -- 1.5 Silicon-Germanium Heterojunction Bipolar Transistors 17 -- References 19 -- 2 MOSFETs 21 / Hiroshi Iwai, Simon Min Sze, Yuan Taur and Hei Wong -- 2.1 Introduction 21 -- 2.2 MOSFET Basics 21 -- 2.3 The Evolution of MOSFETs 27 -- 2.4 Closing Remarks 31 -- References 31 -- 3 Memory Devices 37 / Kinam Kim and Dong Jin Jung -- 3.1 Introduction 37 -- 3.2 Volatile Memories 39 -- 3.3 Non-Volatile Memories 41 -- 3.4 Future Perspectives of MOS Memories 43 -- 3.5 Closing Remarks 45 -- References 46 -- 4 Passive Components 49 / Joachim N. Burghartz and Colin C. McAndrew -- 4.1 Discrete and Integrated Passive Components 49 -- 4.2 Application in Analog ICs and DRAM 52 -- 4.3 The Planar Spiral Inductor-A Case Study 54 -- 4.4 Parasitics in Integrated Circuits 57 -- References 57 -- 5 Emerging Devices 59 / Supriyo Bandyopadhyay, Marc Cahay and Avik W. Ghosh -- 5.1 Non-Charge-Based Switching 59 -- 5.2 Carbon as a Replacement for Silicon and the Rise of Grpahene Electronics and Moletronics 63 -- 5.3 Closing Remarks 66 -- References 67 -- PART II ASPECTS OF DEVICE AND IC MANUFACTURING -- 6 Electronic Materials 71 / James C. Sturm, Ken Rim, James S. Harris and Chung-Chih Wu -- 6.1 Introduction 71 -- 6.2 Silicon Device Technology 71 -- 6.3 Compound Semiconductor Devices 75 -- 6.4 Electronic Displays 79 -- 6.5 Closing Remarks 82 -- References 83 -- 7 Compact Modeling 85 / Colin C. McAndrew and Laurence W. Nagel -- 7.1 The Role of Compact Models 85 -- 7.2 Bipolar Transistor Compact Modeling 87 -- 7.3 MOS Transistor Compact Modeling 89 -- 7.4 Compact Modeling of Passive Components 92.
7.5 Benchmarking and Implementation 94 -- References 94 -- 8 Technology Computer Aided Design 97 / David Esseni, Christoph Jungemann, JŠ urgen Lorenz, Pierpaolo Palestri, Enrico Sangiorgi and Luca Selmi -- 8.1 Introduction 97 -- 8.2 Drift-Diffusion Model 98 -- 8.3 Microscopic Transport Models 100 -- 8.4 Quantum Transport Models 101 -- 8.5 Process and Equipment Simulation 102 -- References 105 -- 9 Reliability of Electron Devices, Interconnects and Circuits 107 / Anthony S. Oates, Richard C. Blish, Gennadi Bersuker and Lu Kasprzak -- 9.1 Introduction and Background 107 -- 9.2 Device Reliability Issues 109 -- 9.3 Circuit-Level Reliability Issues 114 -- 9.4 Microscopic Approaches to Assuring Reliability of ICs 117 -- References 117 -- 10 Semiconductor Manufacturing 121 / Rajendra Singh, Luigi Colombo, Klaus Schuegraf, Robert Doering and Alain Diebold -- 10.1 Introduction 121 -- 10.2 Substrates 122 -- 10.3 Lithography and Etching 122 -- 10.4 Front-End Processing 124 -- 10.5 Back-End Processing 125 -- 10.6 Process Control 128 -- 10.7 Assembly and Test 129 -- 10.8 Future Directions 131 -- References 131 -- PART III APPLICATIONS BASED ON ELECTRON DEVICES -- 11 VLSI Technology and Circuits 135 / Kaustav Banerjee and Shuji Ikeda -- 11.1 Introduction 135 -- 11.2 MOSFET Scaling Trends 136 -- 11.3 Low-Power and High-Speed Logic Design 137 -- 11.4 Scaling Driven Technology Enhancements 139 -- 11.5 Ultra-Low Voltage Transistors 144 -- 11.6 Interconnects 144 -- 11.7 Memory Design 148 -- 11.8 System Integration 150 -- References 152 -- 12 Mixed-Signal Technologies and Integrated Circuits 157 / Bin Zhao and James A. Hutchby -- 12.1 Introduction 157 -- 12.2 Analog/Mixed-Signal Technologies in Scaled CMOS 159 -- 12.3 Data Converter ICs 161 -- 12.4 Mixed-Signal Circuits for Low Power Displays 164 -- 12.5 Image Sensor Technologies and Circuits 166 -- References 168 -- 13 Memory Technologies 171 / Stephen Parke, Kristy A. Campbell and Chandra Mouli -- 13.1 Semiconductor Memory History 171.
13.2 State of Mainstream Semiconductor Memory Today 178 -- 13.3 Emerging Memory Technologies 183 -- 13.4 Closing Remarks 185 -- References 186 -- 14 RF and Microwave Semiconductor Technologies 189 / Giovanni Ghione, Fabrizio Bonani, Ruediger Quay and Erich Kasper -- 14.1 III-V-Based: GaAs and InP 189 -- 14.2 Si and SiGe 194 -- 14.3 Wide Bandgap Devices (Group-III Nitrides, SiC and Diamond) 197 -- References 199 -- 15 Power Devices and ICs 203 / Richard K. Williams, Mohamed N. Darwish, Theodore J. Letavic and Mikael OŠ stling -- 15.1 Overview of Power Devices and ICs 203 -- 15.2 Two-Carrier and High-Power Devices 205 -- 15.3 Power MOSFET Devices 206 -- 15.4 High-Voltage and Power ICs 209 -- 15.5 Wide Bandgap Power Devices 210 -- References 211 -- 16 Photovoltaic Devices 213 / Steven A. Ringel, Timothy J. Anderson, Martin A. Green, Rajendra Singh and Robert J. Walters -- 16.1 Introduction 213 -- 16.2 Silicon Photovoltaics 215 -- 16.3 Polycrystalline Thin-Film Photovoltaics 218 -- 16.4 III-V Compound Photovoltaics 219 -- 16.5 Future Concepts in Photovoltaics 220 -- References 222 -- 17 Large Area Electronics 225 / Arokia Nathan, Arman Ahnood, Jackson Lai and Xiaojun Guo -- 17.1 Thin-Film Solar Cells 225 -- 17.2 Large Area Imaging 229 -- 17.3 Flat Panel Displays 233 -- References 235 -- 18 Microelectromechanical Systems (MEMS) 239 / Darrin J. Young and Hanseup Kim -- 18.1 Introduction 239 -- 18.2 The 1960s - First Micromachined Structures Envisioned 239 -- 18.3 The 1970s - Integrated Sensors Started 240 -- 18.4 The 1980s - Surface Micromachining Emerged 241 -- 18.5 The 1990s - MEMS Impacted Various Fields 244 -- 18.6 The 2000s - Diversified Sophisticated Systems Enabled by MEMS 247 -- 18.7 Future Outlook 248 -- References 248 -- 19 Vacuum Device Applications 251 / David K. Abe, Baruch Levush, Carter M. Armstrong, Thomas Grant and William L. Menninger -- 19.1 Introduction 251 -- 19.2 Traveling-Wave Devices 252 -- 19.3 Klystrons 255 -- 19.4 Inductive Output Tubes 258.
19.5 Crossed-Field Devices 259 -- 19.6 Gyro-Devices 260 -- References 262 -- 20 Optoelectronic Devices 265 / Leda Lunardi, Sudha Mokkapati and Chennupati Jagadish -- 20.1 Introduction 265 -- 20.2 Light Emission in Semiconductors 266 -- 20.3 Photodetectors 268 -- 20.4 Integrated Optoelectronics 269 -- 20.5 Optical Interconnects 271 -- 20.6 Closing Remarks 271 -- References 271 -- 21 Devices for the Post CMOS Era 275 / Wilfried Haensch -- 21.1 Introduction 275 -- 21.2 Devices for the 8-nm Node with Conventional Materials 277 -- 21.3 New Channel Materials and Devices 282 -- 21.4 Closing Remarks 287 -- References 287 -- Index 291.
Record Nr. UNINA-9910139235303321
Chichester, West Sussex, U.K. : , : John Wiley & Sons Inc., , 2013
Materiale a stampa
Lo trovi qui: Univ. Federico II
Opac: Controlla la disponibilità qui
Guide to state-of-the-art electron devices / / edited by Joachim N. Burghartz
Guide to state-of-the-art electron devices / / edited by Joachim N. Burghartz
Pubbl/distr/stampa Chichester, West Sussex, U.K. : , : John Wiley & Sons Inc., , 2013
Descrizione fisica 1 online resource (324 pages)
Disciplina 621.3815/28
Altri autori (Persone) BurghartzJoachim N
Collana Wiley - IEEE
Soggetto topico Electronic apparatus and appliances
ISBN 1-118-51753-9
1-118-51754-7
1-299-24258-8
1-118-51751-2
Classificazione TEC008010
Formato Materiale a stampa
Livello bibliografico Monografia
Lingua di pubblicazione eng
Nota di contenuto Foreword xi -- Preface xiii -- Contributors xvii -- Acknowledgments xix -- Introduction: Historic Timeline xxi -- PART I BASIC ELECTRON DEVICES -- 1 Bipolar Transistors 3 / John D. Cressler and Katsuyoshi Washio -- 1.1 Motivation 3 -- 1.2 The pn Junction and its Electronic Applications 5 -- 1.3 The Bipolar Junction Transistor and its Electronic Applications 10 -- 1.4 Optimization of Bipolar Transistors 15 -- 1.5 Silicon-Germanium Heterojunction Bipolar Transistors 17 -- References 19 -- 2 MOSFETs 21 / Hiroshi Iwai, Simon Min Sze, Yuan Taur and Hei Wong -- 2.1 Introduction 21 -- 2.2 MOSFET Basics 21 -- 2.3 The Evolution of MOSFETs 27 -- 2.4 Closing Remarks 31 -- References 31 -- 3 Memory Devices 37 / Kinam Kim and Dong Jin Jung -- 3.1 Introduction 37 -- 3.2 Volatile Memories 39 -- 3.3 Non-Volatile Memories 41 -- 3.4 Future Perspectives of MOS Memories 43 -- 3.5 Closing Remarks 45 -- References 46 -- 4 Passive Components 49 / Joachim N. Burghartz and Colin C. McAndrew -- 4.1 Discrete and Integrated Passive Components 49 -- 4.2 Application in Analog ICs and DRAM 52 -- 4.3 The Planar Spiral Inductor-A Case Study 54 -- 4.4 Parasitics in Integrated Circuits 57 -- References 57 -- 5 Emerging Devices 59 / Supriyo Bandyopadhyay, Marc Cahay and Avik W. Ghosh -- 5.1 Non-Charge-Based Switching 59 -- 5.2 Carbon as a Replacement for Silicon and the Rise of Grpahene Electronics and Moletronics 63 -- 5.3 Closing Remarks 66 -- References 67 -- PART II ASPECTS OF DEVICE AND IC MANUFACTURING -- 6 Electronic Materials 71 / James C. Sturm, Ken Rim, James S. Harris and Chung-Chih Wu -- 6.1 Introduction 71 -- 6.2 Silicon Device Technology 71 -- 6.3 Compound Semiconductor Devices 75 -- 6.4 Electronic Displays 79 -- 6.5 Closing Remarks 82 -- References 83 -- 7 Compact Modeling 85 / Colin C. McAndrew and Laurence W. Nagel -- 7.1 The Role of Compact Models 85 -- 7.2 Bipolar Transistor Compact Modeling 87 -- 7.3 MOS Transistor Compact Modeling 89 -- 7.4 Compact Modeling of Passive Components 92.
7.5 Benchmarking and Implementation 94 -- References 94 -- 8 Technology Computer Aided Design 97 / David Esseni, Christoph Jungemann, JŠ urgen Lorenz, Pierpaolo Palestri, Enrico Sangiorgi and Luca Selmi -- 8.1 Introduction 97 -- 8.2 Drift-Diffusion Model 98 -- 8.3 Microscopic Transport Models 100 -- 8.4 Quantum Transport Models 101 -- 8.5 Process and Equipment Simulation 102 -- References 105 -- 9 Reliability of Electron Devices, Interconnects and Circuits 107 / Anthony S. Oates, Richard C. Blish, Gennadi Bersuker and Lu Kasprzak -- 9.1 Introduction and Background 107 -- 9.2 Device Reliability Issues 109 -- 9.3 Circuit-Level Reliability Issues 114 -- 9.4 Microscopic Approaches to Assuring Reliability of ICs 117 -- References 117 -- 10 Semiconductor Manufacturing 121 / Rajendra Singh, Luigi Colombo, Klaus Schuegraf, Robert Doering and Alain Diebold -- 10.1 Introduction 121 -- 10.2 Substrates 122 -- 10.3 Lithography and Etching 122 -- 10.4 Front-End Processing 124 -- 10.5 Back-End Processing 125 -- 10.6 Process Control 128 -- 10.7 Assembly and Test 129 -- 10.8 Future Directions 131 -- References 131 -- PART III APPLICATIONS BASED ON ELECTRON DEVICES -- 11 VLSI Technology and Circuits 135 / Kaustav Banerjee and Shuji Ikeda -- 11.1 Introduction 135 -- 11.2 MOSFET Scaling Trends 136 -- 11.3 Low-Power and High-Speed Logic Design 137 -- 11.4 Scaling Driven Technology Enhancements 139 -- 11.5 Ultra-Low Voltage Transistors 144 -- 11.6 Interconnects 144 -- 11.7 Memory Design 148 -- 11.8 System Integration 150 -- References 152 -- 12 Mixed-Signal Technologies and Integrated Circuits 157 / Bin Zhao and James A. Hutchby -- 12.1 Introduction 157 -- 12.2 Analog/Mixed-Signal Technologies in Scaled CMOS 159 -- 12.3 Data Converter ICs 161 -- 12.4 Mixed-Signal Circuits for Low Power Displays 164 -- 12.5 Image Sensor Technologies and Circuits 166 -- References 168 -- 13 Memory Technologies 171 / Stephen Parke, Kristy A. Campbell and Chandra Mouli -- 13.1 Semiconductor Memory History 171.
13.2 State of Mainstream Semiconductor Memory Today 178 -- 13.3 Emerging Memory Technologies 183 -- 13.4 Closing Remarks 185 -- References 186 -- 14 RF and Microwave Semiconductor Technologies 189 / Giovanni Ghione, Fabrizio Bonani, Ruediger Quay and Erich Kasper -- 14.1 III-V-Based: GaAs and InP 189 -- 14.2 Si and SiGe 194 -- 14.3 Wide Bandgap Devices (Group-III Nitrides, SiC and Diamond) 197 -- References 199 -- 15 Power Devices and ICs 203 / Richard K. Williams, Mohamed N. Darwish, Theodore J. Letavic and Mikael OŠ stling -- 15.1 Overview of Power Devices and ICs 203 -- 15.2 Two-Carrier and High-Power Devices 205 -- 15.3 Power MOSFET Devices 206 -- 15.4 High-Voltage and Power ICs 209 -- 15.5 Wide Bandgap Power Devices 210 -- References 211 -- 16 Photovoltaic Devices 213 / Steven A. Ringel, Timothy J. Anderson, Martin A. Green, Rajendra Singh and Robert J. Walters -- 16.1 Introduction 213 -- 16.2 Silicon Photovoltaics 215 -- 16.3 Polycrystalline Thin-Film Photovoltaics 218 -- 16.4 III-V Compound Photovoltaics 219 -- 16.5 Future Concepts in Photovoltaics 220 -- References 222 -- 17 Large Area Electronics 225 / Arokia Nathan, Arman Ahnood, Jackson Lai and Xiaojun Guo -- 17.1 Thin-Film Solar Cells 225 -- 17.2 Large Area Imaging 229 -- 17.3 Flat Panel Displays 233 -- References 235 -- 18 Microelectromechanical Systems (MEMS) 239 / Darrin J. Young and Hanseup Kim -- 18.1 Introduction 239 -- 18.2 The 1960s - First Micromachined Structures Envisioned 239 -- 18.3 The 1970s - Integrated Sensors Started 240 -- 18.4 The 1980s - Surface Micromachining Emerged 241 -- 18.5 The 1990s - MEMS Impacted Various Fields 244 -- 18.6 The 2000s - Diversified Sophisticated Systems Enabled by MEMS 247 -- 18.7 Future Outlook 248 -- References 248 -- 19 Vacuum Device Applications 251 / David K. Abe, Baruch Levush, Carter M. Armstrong, Thomas Grant and William L. Menninger -- 19.1 Introduction 251 -- 19.2 Traveling-Wave Devices 252 -- 19.3 Klystrons 255 -- 19.4 Inductive Output Tubes 258.
19.5 Crossed-Field Devices 259 -- 19.6 Gyro-Devices 260 -- References 262 -- 20 Optoelectronic Devices 265 / Leda Lunardi, Sudha Mokkapati and Chennupati Jagadish -- 20.1 Introduction 265 -- 20.2 Light Emission in Semiconductors 266 -- 20.3 Photodetectors 268 -- 20.4 Integrated Optoelectronics 269 -- 20.5 Optical Interconnects 271 -- 20.6 Closing Remarks 271 -- References 271 -- 21 Devices for the Post CMOS Era 275 / Wilfried Haensch -- 21.1 Introduction 275 -- 21.2 Devices for the 8-nm Node with Conventional Materials 277 -- 21.3 New Channel Materials and Devices 282 -- 21.4 Closing Remarks 287 -- References 287 -- Index 291.
Record Nr. UNINA-9910820568203321
Chichester, West Sussex, U.K. : , : John Wiley & Sons Inc., , 2013
Materiale a stampa
Lo trovi qui: Univ. Federico II
Opac: Controlla la disponibilità qui
Heterojunction bipolar transistors for circuit design : microwave modelling and parameter extraction / / Jianjun Gao
Heterojunction bipolar transistors for circuit design : microwave modelling and parameter extraction / / Jianjun Gao
Autore Gao Jianjun <1968->
Pubbl/distr/stampa Singapore : , : John Wiley and Sons, Incorporated, , 2015
Descrizione fisica 1 online resource (278 p.)
Disciplina 621.3815/28
Soggetto topico Bipolar transistors
Heterojunctions
Electronic circuit design
Microwave measurements
ISBN 1-118-92153-4
1-118-92155-0
Formato Materiale a stampa
Livello bibliografico Monografia
Lingua di pubblicazione eng
Nota di contenuto Title Page; Copyright Page; Contents; About the Author; Preface; Acknowledgments; Nomenclature; Chapter 1 Introduction; 1.1 Overview of Heterojunction Bipolar Transistors; 1.2 Modeling and Measurement for HBT; 1.3 Organization of This Book; References; Chapter 2 Basic Concept of Microwave Device Modeling; 2.1 Signal Parameters; 2.1.1 Low-Frequency Parameters; 2.1.2 S-Parameters; 2.2 Representation of Noisy Two-Port Network; 2.2.1 Noise Matrix; 2.2.2 Noise Parameters; 2.3 Basic Circuit Elements; 2.3.1 Resistance; 2.3.2 Capacitance; 2.3.3 Inductance; 2.3.4 Controlled Sources
2.3.5 Ideal Transmission Line2.4 π- and T-Type Networks; 2.4.1 T-Type Network; 2.4.2 π-Type Network; 2.4.3 Relationship between π- and T-Type Networks; 2.5 Deembedding Method; 2.5.1 Parallel Deembedding; 2.5.2 Series Deembedding; 2.5.3 Cascading Deembedding; 2.6 Basic Methods of Parameter Extraction; 2.6.1 Determination of Capacitance; 2.6.2 Determination of Inductance; 2.6.3 Determination of Resistance; 2.7 Summary; References; Chapter 3 Modeling and Parameter Extraction Methods of Bipolar Junction Transistor; 3.1 PN Junction; 3.2 PN Junction Diode; 3.2.1 Basic Concept
3.2.2 Equivalent Circuit Model3.2.3 Determination of Model Parameters; 3.3 BJT Physical Operation; 3.3.1 Device Structure; 3.3.2 The Modes of Operation; 3.3.3 Base-Width Modulation; 3.3.4 High Injection and Current Crowding; 3.4 Equivalent Circuit Model; 3.4.1 E-M Model; 3.4.2 G-P Model; 3.4.3 Noise Model; 3.5 Microwave Performance; 3.5.1 Transition Frequency; 3.5.2 Common-Emitter Configuration; 3.5.3 Common-Base Configuration; 3.5.4 Common-Collector Configuration; 3.5.5 Summary and Comparisons; 3.6 Summary; References; Chapter 4 Basic Principle of HBT; 4.1 Semiconductor Heterojunction
4.2 HBT Device4.2.1 GaAs HBT; 4.2.2 InP HBT; 4.3 Summary; References; Chapter 5 Small-Signal Modeling and Parameter Extraction of HBT; 5.1 Small-Signal Circuit Model; 5.1.1 Pad Structure; 5.1.2 T-Type Circuit Model; 5.1.3 π-Type Circuit Model; 5.1.4 Unilateral Power Gain; 5.1.5 fT and fmax; 5.2 HBT Device Structure; 5.3 Extraction Method of PAD Capacitances; 5.3.1 Open Test Structure Method; 5.3.2 Pinch-Off Method; 5.4 Extraction Method of Extrinsic Inductances; 5.4.1 Short Test Structure Method; 5.4.2 Open-Collector Method; 5.5 Extraction Method of Extrinsic Resistance
5.5.1 Z Parameter Method5.5.2 Cold-HBT Method; 5.5.3 Open-Collector Method; 5.6 Extraction Method of Intrinsic Resistance; 5.6.1 Direct Extraction Method; 5.6.2 Hybrid Method; 5.7 Semianalysis Method; 5.8 Summary; References; Chapter 6 Large-Signal Equivalent Circuit Modeling of HBT; 6.1 Linear and Nonlinear; 6.1.1 Definition; 6.1.2 Nonlinear Lumped Elements; 6.2 Large Signal and Small Signal; 6.3 Thermal Resistance; 6.3.1 Definition; 6.3.2 Equivalent Circuit Model; 6.3.3 Determination of Thermal Resistance; 6.4 Nonlinear HBT Modeling; 6.4.1 VBIC Model; 6.4.2 Agilent Model
6.4.3 Macromodeling Method
Record Nr. UNINA-9910140452403321
Gao Jianjun <1968->  
Singapore : , : John Wiley and Sons, Incorporated, , 2015
Materiale a stampa
Lo trovi qui: Univ. Federico II
Opac: Controlla la disponibilità qui
Heterojunction bipolar transistors for circuit design : microwave modelling and parameter extraction / / Jianjun Gao
Heterojunction bipolar transistors for circuit design : microwave modelling and parameter extraction / / Jianjun Gao
Autore Gao Jianjun <1968->
Pubbl/distr/stampa Singapore : , : John Wiley and Sons, Incorporated, , 2015
Descrizione fisica 1 online resource (278 p.)
Disciplina 621.3815/28
Soggetto topico Bipolar transistors
Heterojunctions
Electronic circuit design
Microwave measurements
ISBN 1-118-92153-4
1-118-92155-0
Formato Materiale a stampa
Livello bibliografico Monografia
Lingua di pubblicazione eng
Nota di contenuto Title Page; Copyright Page; Contents; About the Author; Preface; Acknowledgments; Nomenclature; Chapter 1 Introduction; 1.1 Overview of Heterojunction Bipolar Transistors; 1.2 Modeling and Measurement for HBT; 1.3 Organization of This Book; References; Chapter 2 Basic Concept of Microwave Device Modeling; 2.1 Signal Parameters; 2.1.1 Low-Frequency Parameters; 2.1.2 S-Parameters; 2.2 Representation of Noisy Two-Port Network; 2.2.1 Noise Matrix; 2.2.2 Noise Parameters; 2.3 Basic Circuit Elements; 2.3.1 Resistance; 2.3.2 Capacitance; 2.3.3 Inductance; 2.3.4 Controlled Sources
2.3.5 Ideal Transmission Line2.4 π- and T-Type Networks; 2.4.1 T-Type Network; 2.4.2 π-Type Network; 2.4.3 Relationship between π- and T-Type Networks; 2.5 Deembedding Method; 2.5.1 Parallel Deembedding; 2.5.2 Series Deembedding; 2.5.3 Cascading Deembedding; 2.6 Basic Methods of Parameter Extraction; 2.6.1 Determination of Capacitance; 2.6.2 Determination of Inductance; 2.6.3 Determination of Resistance; 2.7 Summary; References; Chapter 3 Modeling and Parameter Extraction Methods of Bipolar Junction Transistor; 3.1 PN Junction; 3.2 PN Junction Diode; 3.2.1 Basic Concept
3.2.2 Equivalent Circuit Model3.2.3 Determination of Model Parameters; 3.3 BJT Physical Operation; 3.3.1 Device Structure; 3.3.2 The Modes of Operation; 3.3.3 Base-Width Modulation; 3.3.4 High Injection and Current Crowding; 3.4 Equivalent Circuit Model; 3.4.1 E-M Model; 3.4.2 G-P Model; 3.4.3 Noise Model; 3.5 Microwave Performance; 3.5.1 Transition Frequency; 3.5.2 Common-Emitter Configuration; 3.5.3 Common-Base Configuration; 3.5.4 Common-Collector Configuration; 3.5.5 Summary and Comparisons; 3.6 Summary; References; Chapter 4 Basic Principle of HBT; 4.1 Semiconductor Heterojunction
4.2 HBT Device4.2.1 GaAs HBT; 4.2.2 InP HBT; 4.3 Summary; References; Chapter 5 Small-Signal Modeling and Parameter Extraction of HBT; 5.1 Small-Signal Circuit Model; 5.1.1 Pad Structure; 5.1.2 T-Type Circuit Model; 5.1.3 π-Type Circuit Model; 5.1.4 Unilateral Power Gain; 5.1.5 fT and fmax; 5.2 HBT Device Structure; 5.3 Extraction Method of PAD Capacitances; 5.3.1 Open Test Structure Method; 5.3.2 Pinch-Off Method; 5.4 Extraction Method of Extrinsic Inductances; 5.4.1 Short Test Structure Method; 5.4.2 Open-Collector Method; 5.5 Extraction Method of Extrinsic Resistance
5.5.1 Z Parameter Method5.5.2 Cold-HBT Method; 5.5.3 Open-Collector Method; 5.6 Extraction Method of Intrinsic Resistance; 5.6.1 Direct Extraction Method; 5.6.2 Hybrid Method; 5.7 Semianalysis Method; 5.8 Summary; References; Chapter 6 Large-Signal Equivalent Circuit Modeling of HBT; 6.1 Linear and Nonlinear; 6.1.1 Definition; 6.1.2 Nonlinear Lumped Elements; 6.2 Large Signal and Small Signal; 6.3 Thermal Resistance; 6.3.1 Definition; 6.3.2 Equivalent Circuit Model; 6.3.3 Determination of Thermal Resistance; 6.4 Nonlinear HBT Modeling; 6.4.1 VBIC Model; 6.4.2 Agilent Model
6.4.3 Macromodeling Method
Record Nr. UNINA-9910822337003321
Gao Jianjun <1968->  
Singapore : , : John Wiley and Sons, Incorporated, , 2015
Materiale a stampa
Lo trovi qui: Univ. Federico II
Opac: Controlla la disponibilità qui
Nonlinear transistor model parameter extraction techniques / / edited by Matthias Rudolph, Christian Fager, David E. Root [[electronic resource]]
Nonlinear transistor model parameter extraction techniques / / edited by Matthias Rudolph, Christian Fager, David E. Root [[electronic resource]]
Pubbl/distr/stampa Cambridge : , : Cambridge University Press, , 2012
Descrizione fisica 1 online resource (xiv, 352 pages) : digital, PDF file(s)
Disciplina 621.3815/28
Collana The Cambridge RF and microwave engineering series
Soggetto topico Transistors - Mathematical models
Electronic circuit design
ISBN 1-107-22467-5
1-283-34235-9
1-139-16026-5
9786613342355
1-139-15465-6
1-139-16126-1
1-139-15569-5
1-139-15744-2
1-139-15921-6
1-139-01496-X
Formato Materiale a stampa
Livello bibliografico Monografia
Lingua di pubblicazione eng
Nota di contenuto Cover; Nonlinear Transistor Model Parameter Extraction Techniques; The Cambridge RF and Microwave Engineering Series; Title; Copyright; Contents; List of contributors; Preface; 1 Introduction; 1.1 Model extraction challenges; 1.1.1 Accuracy; 1.1.1.1 Circuit application; 1.1.1.2 Measurement uncertainty; 1.1.1.3 Process variations; 1.1.2 Numerical convergence; 1.1.2.1 Breakdown; 1.1.2.2 Self-heating; 1.1.3 Choice of the modeling transistor; 1.2 Model extraction workflow; References; 2 DC and thermal modeling: III--V FETs and HBTs; 2.1 Introduction; 2.2 Basic DC characteristics
2.3 FET DC parameters and modeling2.4 HBT DC parameters and modeling; 2.5 Process control monitoring; 2.6 Thermal modeling overview; 2.7 Physics-based thermal scaling model for HBTs; 2.8 Measurement-based thermal model for FETs; 2.9 Transistor reliability evaluation; Acknowledgments; References; 3 Extrinsic parameter and parasitic elements in III--V HBT and HEMT modeling; 3.1 Introduction; 3.2 Test structures with calibration and de-embedding; 3.3 Methods for extrinsic parameter extraction used in HBTs; 3.3.1 Equivalent circuit topology
3.3.2 Physical description of contact resistances and overlap capacitances3.3.3 Extrinsic resistance and inductance extraction; 3.4 Methods for extrinsic parameter extraction used in HEMTs; 3.4.1 Cold FET technique; 3.4.2 Unbiased technique; 3.4.3 GaN HEMTs exceptions; 3.5 Scaling for multicell arrays; References; 4 Uncertainties in small-signal equivalent circuit modeling; 4.1 Introduction; 4.1.1 Sources of uncertainty in modeling; 4.1.2 Measurement uncertainty; 4.2 Uncertainties in direct extraction methods; 4.2.1 Simple direct extraction example; 4.2.1.1 Example circuit and measurements
4.2.1.2 Uncertainty analysis4.2.1.3 Parameter estimation; 4.2.1.4 Parameter correlations; 4.2.2 Results using transistor measurements; 4.2.2.1 Uncertainty contributions; 4.2.2.2 Intrinsic model parameter sensitivities; 4.2.2.3 Intrinsic model parameter uncertainties; 4.2.2.4 Multibias extraction results; 4.3 Optimizer-based estimation techniques; 4.3.1 Maximum likelihood estimation; 4.3.1.1 Simple example; 4.3.1.2 MLE uncertainty; 4.3.2 MLE of small-signal transistor model parameters; 4.3.2.1 Parasitic parameter estimation; 4.3.2.2 Application to parasitic FET model extraction
4.3.2.3 MLE of intrinsic model parameters4.3.2.4 Application to intrinsic FET model extraction; 4.3.3 Comparison between MLE and the direct extraction method; 4.3.4 Application of MLE in RF-CMOS de-embedding; 4.3.4.1 Method description; 4.3.4.2 Example using 130 nm RF-CMOS measurements; 4.3.4.3 Comparison between different de-embedding methods; 4.3.5 Discussion; 4.4 Complexity versus uncertainty in equivalent circuit modeling; 4.4.1 Finding an optimum model topology; 4.4.2 An illustrative example; 4.4.2.1 MSE estimation procedure; 4.4.2.2 Results; 4.5 Summary and discussion; References
5 The large-signal model: theoretical foundations, practical considerations, and recent trends
Record Nr. UNINA-9910457508703321
Cambridge : , : Cambridge University Press, , 2012
Materiale a stampa
Lo trovi qui: Univ. Federico II
Opac: Controlla la disponibilità qui
Nonlinear transistor model parameter extraction techniques / / edited by Matthias Rudolph, Christian Fager, David E. Root [[electronic resource]]
Nonlinear transistor model parameter extraction techniques / / edited by Matthias Rudolph, Christian Fager, David E. Root [[electronic resource]]
Pubbl/distr/stampa Cambridge : , : Cambridge University Press, , 2012
Descrizione fisica 1 online resource (xiv, 352 pages) : digital, PDF file(s)
Disciplina 621.3815/28
Collana The Cambridge RF and microwave engineering series
Soggetto topico Transistors - Mathematical models
Electronic circuit design
ISBN 1-107-22467-5
1-283-34235-9
1-139-16026-5
9786613342355
1-139-15465-6
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Nota di contenuto Cover; Nonlinear Transistor Model Parameter Extraction Techniques; The Cambridge RF and Microwave Engineering Series; Title; Copyright; Contents; List of contributors; Preface; 1 Introduction; 1.1 Model extraction challenges; 1.1.1 Accuracy; 1.1.1.1 Circuit application; 1.1.1.2 Measurement uncertainty; 1.1.1.3 Process variations; 1.1.2 Numerical convergence; 1.1.2.1 Breakdown; 1.1.2.2 Self-heating; 1.1.3 Choice of the modeling transistor; 1.2 Model extraction workflow; References; 2 DC and thermal modeling: III--V FETs and HBTs; 2.1 Introduction; 2.2 Basic DC characteristics
2.3 FET DC parameters and modeling2.4 HBT DC parameters and modeling; 2.5 Process control monitoring; 2.6 Thermal modeling overview; 2.7 Physics-based thermal scaling model for HBTs; 2.8 Measurement-based thermal model for FETs; 2.9 Transistor reliability evaluation; Acknowledgments; References; 3 Extrinsic parameter and parasitic elements in III--V HBT and HEMT modeling; 3.1 Introduction; 3.2 Test structures with calibration and de-embedding; 3.3 Methods for extrinsic parameter extraction used in HBTs; 3.3.1 Equivalent circuit topology
3.3.2 Physical description of contact resistances and overlap capacitances3.3.3 Extrinsic resistance and inductance extraction; 3.4 Methods for extrinsic parameter extraction used in HEMTs; 3.4.1 Cold FET technique; 3.4.2 Unbiased technique; 3.4.3 GaN HEMTs exceptions; 3.5 Scaling for multicell arrays; References; 4 Uncertainties in small-signal equivalent circuit modeling; 4.1 Introduction; 4.1.1 Sources of uncertainty in modeling; 4.1.2 Measurement uncertainty; 4.2 Uncertainties in direct extraction methods; 4.2.1 Simple direct extraction example; 4.2.1.1 Example circuit and measurements
4.2.1.2 Uncertainty analysis4.2.1.3 Parameter estimation; 4.2.1.4 Parameter correlations; 4.2.2 Results using transistor measurements; 4.2.2.1 Uncertainty contributions; 4.2.2.2 Intrinsic model parameter sensitivities; 4.2.2.3 Intrinsic model parameter uncertainties; 4.2.2.4 Multibias extraction results; 4.3 Optimizer-based estimation techniques; 4.3.1 Maximum likelihood estimation; 4.3.1.1 Simple example; 4.3.1.2 MLE uncertainty; 4.3.2 MLE of small-signal transistor model parameters; 4.3.2.1 Parasitic parameter estimation; 4.3.2.2 Application to parasitic FET model extraction
4.3.2.3 MLE of intrinsic model parameters4.3.2.4 Application to intrinsic FET model extraction; 4.3.3 Comparison between MLE and the direct extraction method; 4.3.4 Application of MLE in RF-CMOS de-embedding; 4.3.4.1 Method description; 4.3.4.2 Example using 130 nm RF-CMOS measurements; 4.3.4.3 Comparison between different de-embedding methods; 4.3.5 Discussion; 4.4 Complexity versus uncertainty in equivalent circuit modeling; 4.4.1 Finding an optimum model topology; 4.4.2 An illustrative example; 4.4.2.1 MSE estimation procedure; 4.4.2.2 Results; 4.5 Summary and discussion; References
5 The large-signal model: theoretical foundations, practical considerations, and recent trends
Record Nr. UNINA-9910781864603321
Cambridge : , : Cambridge University Press, , 2012
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Nonlinear transistor model parameter extraction techniques / / edited by Matthias Rudolph, Christian Fager, David E. Root [[electronic resource]]
Nonlinear transistor model parameter extraction techniques / / edited by Matthias Rudolph, Christian Fager, David E. Root [[electronic resource]]
Pubbl/distr/stampa Cambridge : , : Cambridge University Press, , 2012
Descrizione fisica 1 online resource (xiv, 352 pages) : digital, PDF file(s)
Disciplina 621.3815/28
Collana The Cambridge RF and microwave engineering series
Soggetto topico Transistors - Mathematical models
Electronic circuit design
ISBN 1-107-22467-5
1-283-34235-9
1-139-16026-5
9786613342355
1-139-15465-6
1-139-16126-1
1-139-15569-5
1-139-15744-2
1-139-15921-6
1-139-01496-X
Formato Materiale a stampa
Livello bibliografico Monografia
Lingua di pubblicazione eng
Nota di contenuto Cover; Nonlinear Transistor Model Parameter Extraction Techniques; The Cambridge RF and Microwave Engineering Series; Title; Copyright; Contents; List of contributors; Preface; 1 Introduction; 1.1 Model extraction challenges; 1.1.1 Accuracy; 1.1.1.1 Circuit application; 1.1.1.2 Measurement uncertainty; 1.1.1.3 Process variations; 1.1.2 Numerical convergence; 1.1.2.1 Breakdown; 1.1.2.2 Self-heating; 1.1.3 Choice of the modeling transistor; 1.2 Model extraction workflow; References; 2 DC and thermal modeling: III--V FETs and HBTs; 2.1 Introduction; 2.2 Basic DC characteristics
2.3 FET DC parameters and modeling2.4 HBT DC parameters and modeling; 2.5 Process control monitoring; 2.6 Thermal modeling overview; 2.7 Physics-based thermal scaling model for HBTs; 2.8 Measurement-based thermal model for FETs; 2.9 Transistor reliability evaluation; Acknowledgments; References; 3 Extrinsic parameter and parasitic elements in III--V HBT and HEMT modeling; 3.1 Introduction; 3.2 Test structures with calibration and de-embedding; 3.3 Methods for extrinsic parameter extraction used in HBTs; 3.3.1 Equivalent circuit topology
3.3.2 Physical description of contact resistances and overlap capacitances3.3.3 Extrinsic resistance and inductance extraction; 3.4 Methods for extrinsic parameter extraction used in HEMTs; 3.4.1 Cold FET technique; 3.4.2 Unbiased technique; 3.4.3 GaN HEMTs exceptions; 3.5 Scaling for multicell arrays; References; 4 Uncertainties in small-signal equivalent circuit modeling; 4.1 Introduction; 4.1.1 Sources of uncertainty in modeling; 4.1.2 Measurement uncertainty; 4.2 Uncertainties in direct extraction methods; 4.2.1 Simple direct extraction example; 4.2.1.1 Example circuit and measurements
4.2.1.2 Uncertainty analysis4.2.1.3 Parameter estimation; 4.2.1.4 Parameter correlations; 4.2.2 Results using transistor measurements; 4.2.2.1 Uncertainty contributions; 4.2.2.2 Intrinsic model parameter sensitivities; 4.2.2.3 Intrinsic model parameter uncertainties; 4.2.2.4 Multibias extraction results; 4.3 Optimizer-based estimation techniques; 4.3.1 Maximum likelihood estimation; 4.3.1.1 Simple example; 4.3.1.2 MLE uncertainty; 4.3.2 MLE of small-signal transistor model parameters; 4.3.2.1 Parasitic parameter estimation; 4.3.2.2 Application to parasitic FET model extraction
4.3.2.3 MLE of intrinsic model parameters4.3.2.4 Application to intrinsic FET model extraction; 4.3.3 Comparison between MLE and the direct extraction method; 4.3.4 Application of MLE in RF-CMOS de-embedding; 4.3.4.1 Method description; 4.3.4.2 Example using 130 nm RF-CMOS measurements; 4.3.4.3 Comparison between different de-embedding methods; 4.3.5 Discussion; 4.4 Complexity versus uncertainty in equivalent circuit modeling; 4.4.1 Finding an optimum model topology; 4.4.2 An illustrative example; 4.4.2.1 MSE estimation procedure; 4.4.2.2 Results; 4.5 Summary and discussion; References
5 The large-signal model: theoretical foundations, practical considerations, and recent trends
Record Nr. UNINA-9910827953503321
Cambridge : , : Cambridge University Press, , 2012
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Organic light-emitting transistors : towards the next generation display technology / / Michele Muccini, Stefano Toffanin
Organic light-emitting transistors : towards the next generation display technology / / Michele Muccini, Stefano Toffanin
Autore Muccini Michele
Pubbl/distr/stampa Hoboken, New Jersey : , : Wiley, , 2016
Descrizione fisica 1 online resource (290 p.)
Disciplina 621.3815/28
Collana A Wiley-Science Wise Co-Publication
Soggetto topico Electroluminescent devices - Materials
Transistors
Light emitting diodes
Organic semiconductors
Information display systems - Materials
ISBN 1-119-19011-8
1-119-19016-9
Formato Materiale a stampa
Livello bibliografico Monografia
Lingua di pubblicazione eng
Nota di contenuto Organic light-emitting diodes -- Organic light-emitting transistors : concept, structure and optoelectronic characteristics -- Key building-blocks of OLETs -- Charge transport and photophysical processes in OLETs -- Photonic properties of OLETs -- Applications of organic light-emitting transistors.
Record Nr. UNINA-9910136821203321
Muccini Michele  
Hoboken, New Jersey : , : Wiley, , 2016
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Organic light-emitting transistors : towards the next generation display technology / / Michele Muccini, Stefano Toffanin
Organic light-emitting transistors : towards the next generation display technology / / Michele Muccini, Stefano Toffanin
Autore Muccini Michele
Pubbl/distr/stampa Hoboken, New Jersey : , : Wiley, , 2016
Descrizione fisica 1 online resource (290 p.)
Disciplina 621.3815/28
Collana A Wiley-Science Wise Co-Publication
Soggetto topico Electroluminescent devices - Materials
Transistors
Light emitting diodes
Organic semiconductors
Information display systems - Materials
ISBN 1-119-19011-8
1-119-19016-9
Formato Materiale a stampa
Livello bibliografico Monografia
Lingua di pubblicazione eng
Nota di contenuto Organic light-emitting diodes -- Organic light-emitting transistors : concept, structure and optoelectronic characteristics -- Key building-blocks of OLETs -- Charge transport and photophysical processes in OLETs -- Photonic properties of OLETs -- Applications of organic light-emitting transistors.
Record Nr. UNINA-9910817143503321
Muccini Michele  
Hoboken, New Jersey : , : Wiley, , 2016
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SOI lubistors : lateral, unidirectional, bipolar-type insulated-gate transistors / / Yasuhisa Omura
SOI lubistors : lateral, unidirectional, bipolar-type insulated-gate transistors / / Yasuhisa Omura
Autore Omura Y (Yasuhisa)
Pubbl/distr/stampa [Hoboken, New Jersey] : , : Wiley, , 2013
Descrizione fisica 1 online resource (319 p.)
Disciplina 621.3815/28
Soggetto topico Insulated gate bipolar transistors
Silicon-on-insulator technology
ISBN 1-118-48793-1
1-118-48791-5
1-118-48792-3
Formato Materiale a stampa
Livello bibliografico Monografia
Lingua di pubblicazione eng
Nota di contenuto Preface xiii -- Acknowledgements xv -- Introduction to an Exotic Device World xvii -- Part One BRIEF REVIEWAND MODERN APPLICATIONS OF PN-JUNCTION DEVICES -- 1 Concept of an Ideal pn Junction 3 -- References 4 -- 2 Understanding the Non-ideal pn Junction - Theoretical Reconsideration 7 -- 2.1 Introduction 7 -- 2.2 Bulk pn-Junction Diode 8 -- 2.2.1 Assumptions 8 -- 2.2.2 Model A - Low Doping Case 9 -- 2.2.3 Model B - High Doping Case 18 -- 2.3 Bulk pn-Junction Diode - Reverse Bias 24 -- 2.3.1 Model A - Low Doping Case 24 -- 2.3.2 Model B - High Doping Case 25 -- 2.4 The Insulated-Gate pn Junction of the SOI Lubistor - Forward Bias 32 -- 2.4.1 The Positive Gate Voltage Condition 32 -- 2.4.2 The Negative Gate Voltage Condition 35 -- 2.5 The Insulated-Gate pn Junction of the -- SOI Lubistor - Reverse Bias 35 -- References 37 -- 3 Modern Applications of the pn Junction 39 -- References 40 -- Part Two PHYSICS AND MODELING OF SOI LUBISTORS - THICK-FILM DEVICES -- 4 Proposal of the Lateral, Unidirectional, Bipolar-Type Insulated-Gate Transistor (Lubistor) 43 -- 4.1 Introduction 43 -- 4.2 Device Structure and Parameters 43 -- 4.3 Discussion of Current-Voltage Characteristics 45 -- 4.4 Summary 47 -- References 47 -- 5 Experimental Consideration for Modeling of Lubistor Operation 49 -- 5.1 Introduction 49 -- 5.2 Experimental Apparatus 49 -- 5.3 Current-Voltage Characteristics of Lubistors 52 -- 5.4 Lubistor Potential Profiles and Features 56 -- 5.5 Discussion 57 -- 5.5.1 Simplified Analysis of Lubistor Operation 57 -- 5.5.2 On the Design of Lubistors 60 -- 5.6 Summary 61 -- References 61 -- 6 Modeling of Lubistor Operation Without an EFS Layer for Circuit Simulations 63 -- 6.1 Introduction 63 -- 6.2 Device Structure and Measurement System 63 -- 6.3 Equivalent Circuit Models of an SOI Lubistor 65 -- 6.3.1 Device Simulation 65 -- 6.3.2 Equivalent Circuit Models 68 -- 6.4 Summary 72 -- References 73 -- 7 Noise Characteristics and Modeling of Lubistor 75 -- 7.1 Introduction 75 -- 7.2 Experiments 75.
7.2.1 Device Structure 75 -- 7.2.2 Measurement System 77 -- 7.3 Results and Discussion 77 -- 7.3.1 I-V Characteristics of an SOI Lubistor and a Simple Analytical Model 77 -- 7.3.2 Noise Spectral Density of SOI Lubistors and Their Feature 81 -- 7.3.3 Advanced Analysis of Anode Noise Spectral Density 83 -- 7.4 Summary 86 -- References 86 -- 8 Supplementary Study on Buried Oxide Characterization 89 -- 8.1 Introduction 89 -- 8.2 Physical Model for the Transition Layer 90 -- 8.3 Capacitance Simulation 93 -- 8.3.1 A Structure to Evaluate Capacitance 93 -- 8.3.2 Numerical Simulation Technique 94 -- 8.4 Device Fabrication 95 -- 8.5 Results and Discussion 96 -- 8.5.1 Electrode-to-Electrode Capacitance Dependence on Frequency 96 -- 8.5.2 Drain-to-Substrate Capacitance Dependence on Bias 98 -- 8.5.3 Electrode-to-Electrode Capacitance Dependence on Transition Layer Thickness 101 -- 8.6 Summary 101 -- References 102 -- Part Three PHYSICS AND MODELING OF SOI LUBISTORS - THIN-FILM DEVICES -- 9 Negative Conductance Properties in Extremely Thin SOI Lubistors 105 -- 9.1 Introduction 105 -- 9.2 Device Fabrication and Measurements 105 -- 9.3 Results and Discussion 106 -- 9.4 Summary 109 -- References 109 -- 10 Two-Dimensionally Confined Injection Phenomena at Low Temperatures in Sub-10-nm-Thick SOI Lubistors 111 -- 10.1 Introduction 111 -- 10.2 Experiments 111 -- 10.2.1 Anode Common Configuration 113 -- 10.2.2 Cathode Common Configuration 113 -- 10.3 Physical Models and Simulations 114 -- 10.3.1 Fundamental Models 114 -- 10.3.2 Theoretical Simulations 118 -- 10.3.3 Influences on Characteristics of Extremely Ultra-Thin SOI MOSFET Devices 122 -- 10.4 Summary 122 -- Appendix 10A: Intrinsic Carrier Concentration (niq) and the Fermi Level in 2DSS 122 -- Appendix 10B: Calculation of Electron and Hole Densities in 2DSS 125 -- References 125 -- 11 Two-Dimensional Quantization Effect on Indirect Tunneling in SOI Lubistors with a Thin Silicon Layer 127 -- 11.1 Introduction 127 -- 11.2 Experimental Results 128.
11.2.1 Junction Current Dependence on Anode Voltage 128 -- 11.2.2 Junction Current Dependence on Gate Voltage 132 -- 11.3 Theoretical Discussion 134 -- 11.3.1 Qualitative Consideration of the Low-Dimensional Indirect Tunneling Process 134 -- 11.3.2 Theoretical Formulations of Tunneling Current and Discussion 134 -- 11.4 Summary 140 -- Appendix 11A: Wave Function Coupling Effect in the Lateral Two-Dimensional-System-to-Three-Dimensional-System (2D-to-3D) Tunneling Process 141 -- References 141 -- 12 Experimental Study of Two-Dimensional Confinement Effects on Reverse-Biased Current Characteristics of Ultra-Thin SOI Lubistors 143 -- 12.1 Introduction 143 -- 12.2 Device Structures and Experimental Apparatus 144 -- 12.3 Results and Discussion 145 -- 12.3.1 I-V Characteristics under the Reverse-Biased Condition 145 -- 12.4 Summary 151 -- Appendix 12A: Derivation of Equations (12.6) and (12.9) 151 -- References 153 -- 13 Supplementary Consideration of I-V Characteristics of Forward-Biased Ultra-Thin Lubistors 155 -- 13.1 Introduction 155 -- 13.2 Device Structures and Bias Configuration 155 -- 13.3 Results and Discussion 156 -- 13.4 Summary 157 -- References 158 -- 14 Gate-Controlled Bipolar Action in the Ultra-Thin Dynamic Threshold SOI MOSFET 159 -- 14.1 Introduction 159 -- 14.2 Device and Experiments 159 -- 14.3 Results and Discussion 159 -- 14.3.1 ID-VG and IG-VG Characteristics of the Ultra-Thin-Body DT-MOSFET 159 -- 14.3.2 Control of Bipolar Action by the MOS Gate 162 -- 14.4 Channel Polarity Dependence of Bipolar Action 162 -- 14.4.1 ID-VG and gm-VG Characteristics of the Ultra-Thin-Body DT-MOSFET 162 -- 14.4.2 Difference of Bipolar Operation between the n-Channel DT-MOS and the p-Channel DT-MOS 163 -- 14.4.3 Impact of Body Thickness on Bipolar Operation 164 -- 14.5 Summary 166 -- References 166 -- 15 Supplementary Study on Gate-Controlled Bipolar Action in the Ultra-Thin Dynamic Threshold SOI MOSFET 167 -- 15.1 Introduction 167 -- 15.2 Device Structures and Parameters 167.
15.3 Results and Discussion 169 -- 15.3.1 SOI MOSFET Mode and DT-MOSFET Mode 169 -- 15.3.2 Temperature Evolution of Transconductance (gm) Characteristics and Impact of Channel Length on gm Characteristics 170 -- 15.3.3 Impact of SOI Layer Thickness on gm Characteristics 173 -- 15.4 Summary 173 -- References 174 -- Part Four CIRCUIT APPLICATIONS -- 16 Subcircuit Models of SOI Lubistors for Electrostatic Discharge Protection Circuit Design and Their Applications 179 -- 16.1 Introduction 179 -- 16.2 Equivalent Circuit Models of SOI Lubistors and their Applications 180 -- 16.2.1 Device Structure and Device Simulation 180 -- 16.2.2 Equivalent Circuit Models 183 -- 16.3 ESD Protection Circuit 183 -- 16.4 Direct Current Characteristics of the ESD Protection Devices and Their SPICE Models 186 -- 16.5 ESD Event and Performance Evaluation of an ESD Protection Circuit 189 -- 16.6 Summary 196 -- References 196 -- 17 A New Basic Element for Neural Logic Functions and Capability in Circuit Applications 199 -- 17.1 Introduction 199 -- 17.2 Device Structure, Model, and Proposal of a New Logic Element 199 -- 17.2.1 Device Structure and Fundamental Characteristics 199 -- 17.2.2 Device Model for the Lubistor 201 -- 17.2.3 Proposal of a New Logic Element 203 -- 17.3 Circuit Applications and Discussion 206 -- 17.3.1 Examples of Fundamental Elements for Circuit Applications 206 -- 17.3.2 On the Further Improvement of Functions of the Basic Logic Element 211 -- 17.4 Summary 211 -- References 211 -- 18 Sub-1-V Voltage Reference Circuit Technology as an Analog Circuit Application 213 -- 18.1 Review of Bandgap Reference 213 -- 18.2 Challenging Study of Sub-1-V Voltage Reference 214 -- References 215 -- 19 Possible Implementation of SOI Lubistors into Conventional Logic Circuits 217 -- References 218 -- Part Five OPTICAL DEVICE APPLICATIONS OF SOI LUBISTORS -- 20 Potentiality of Electro-Optic Modulator Based on the SOI Waveguide 223 -- 20.1 Introduction 223 -- 20.2 Characterization of the Quasi-One-Dimensional Photonic Crystal Waveguide 224.
20.3 Electro-Optic Modulator Based on the SOI Waveguide 230 -- 20.4 Summary 233 -- References 234 -- Part Six SOI LUBISTOR AS A TESTING TOOL -- 21 Principles of Parameter Extraction 237 -- References 239 -- 22 Charge Pumping Technique 241 -- 22.1 Introduction 241 -- 22.2 Experimental and Simulation Details 241 -- 22.3 Results and Discussion 243 -- 22.4 Summary 246 -- References 246 -- Part Seven FUTURE PROSPECTS -- 23 Overview 249 -- 23.1 Introduction 249 -- 23.2 i-MOS Transistor 249 -- 23.3 Tunnel FET 251 -- 23.4 Feedback FET 254 -- 23.5 Potential of Offset-Gate Lubistor 256 -- 23.6 Si Fin LED with a Multi-quantum Well 258 -- 23.7 Future of the pn Junction 258 -- References 259 -- 24 Feasibility of the Lubistor-Based Avalanche Phototransistor 261 -- 24.1 Introduction 261 -- 24.2 Theoretical Formulation of the Avalanche Phenomenon in Direct-Bandgap Semiconductors 261 -- 24.3 Theoretical Formulation of the Avalanche Phenomenon in Indirect-Bandgap Semiconductors 264 -- 24.4 Theoretical Consideration of the Avalanche Phenomenon in a One-Dimensional Wire pn Junction 265 -- 24.5 Summary 269 -- References 269 -- Part Eight SUMMARY OF PHYSICS FOR SEMICONDUCTOR DEVICES AND MATHEMATICS FOR DEVICE ANALYSES -- 25 Physics of Semiconductor Devices for Analysis 273 -- 25.1 Free Carrier Concentration and the Fermi Level in Semiconductors 273 -- 25.2 Impurity Doping in Semiconductors 275 -- 25.3 Drift and Diffusion of Carriers and Current Continuity in Semiconductors 275 -- 25.4 Stationary-State SchrÈodinger Equation to Analyze Quantum-Mechanical Effects in Semiconductors 276 -- 25.5 Time-dependent SchrÈodinger Equation to Analyze Dynamics in Semiconductors 277 -- 25.6 Quantum Size Effects in Nano-Scale Semiconductors 278 -- 25.7 Tunneling through Energy Barriers in Semiconductors 281 -- 25.8 Low-Dimensional Tunneling in Nano-Scale Semiconductors 282 -- 25.9 Photon Absorption and Electronic Transitions 284 -- 25.9.1 Fundamental Formulations 284 -- 25.9.2 Interband Transition - Direct Bandgap 285.
25.9.3 Interband Transition - Indirect Bandgap 286 -- References 287 -- 26 Mathematics Applicable to the Analysis of Device Physics 289 -- 26.1 Linear Differential Equation 289 -- 26.2 Operator Method 290 -- 26.3 Klein-Gordon-Type Differential Equation 291 -- References 292 -- Bibliography 293 -- Index 295.
Altri titoli varianti Lubistors
Silicon-on-insulator lubistors
Record Nr. UNINA-9910139014703321
Omura Y (Yasuhisa)  
[Hoboken, New Jersey] : , : Wiley, , 2013
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