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High speed digital design : design of high speed interconnects and signaling / / Hanqiao Zhang, Steve Krooswyk, Jeff Ou
| High speed digital design : design of high speed interconnects and signaling / / Hanqiao Zhang, Steve Krooswyk, Jeff Ou |
| Autore | Zhang Hanqiao |
| Edizione | [First edition.] |
| Pubbl/distr/stampa | Waltham, MA : , : Elsevier, , [2015] |
| Descrizione fisica | 1 online resource (268 p.) |
| Disciplina | 621.398 |
| Soggetto topico |
Digital electronics
Logic design |
| Soggetto genere / forma | Electronic books. |
| ISBN |
0-12-418667-X
0-12-418663-7 |
| Formato | Materiale a stampa  |
| Livello bibliografico | Monografia |
| Lingua di pubblicazione | eng |
| Nota di contenuto |
Front Cover; High Speed Digital Design; Copyright Page; Contents; About the Authors/Contributors; 1 Transmission line fundamentals; Basic Electromagnetics; Electromagnetics Field Theory; Maxwell's equations; Ampere's law; Faraday's law; Gauss's law; Gauss's law for magnetism; Propagation of Plane Waves; Uniform plane wave; Uniform plane wave in conductive media; Power flow and the Poynting vector; Transmission Line Theory; Wave Equations on Lossless Transmission Lines; Lossless transmission line; Wave propagation on a lossless transmission line; Incident waves and reflected waves
Impedance, Reflection Coefficient, and Power Flow on a Lossless Transmission LineInput impedance and reflection coefficient; Power flow on a lossless transmission line; Traveling and Standing Waves on a Transmission Line; Traveling waves; Standing waves; Transmission Line Structures; Stripline; Microstrip; Coplanar Waveguides; Novel Transmission Lines; References; 2 PCB design for signal integrity; Differential Signaling; Impedance; Time Domain Analysis; Eye Diagram; Jitter; Jitter components and budget; Jitter amplification example; Frequency Domain Analysis; Spectral Content; Insertion Loss Integrated Insertion Loss NoiseReturn Loss; S11 nulls; Crosstalk; Crosstalk sum; Integrated Crosstalk; Signal-to-Noise Ratio; Stack-Up Design; Impedance Target (Routing Impedance); Optimal routing impedance; PCB Losses; Dielectric Loss; Lower loss dielectrics; Hybrid stackups; Conductor Loss; Surface roughness; Crosstalk Mitigation through StackUp; Stripline dielectric; Solder mask; Dual Stripline; PCB stackup; Angled routing; Parallelism; Densely Broadside Coupled Dual Stripline; Via Stub Mitigation; Impedance optimization; U-turn via; Back-drilling; Blind and buried via PCB Layout OptimizationLength Matching; Fiber Weave Effect; Crosstalk Reduction; Interleaving; Guard trace; Signal-to-ground ratio; Ground placement; Orthogonal placement; Component (vertical to horizontal) cancellation; Non-Ideal Return Path; Power Integrity; Repeaters; Introduction to re-timers; Introduction to re-drivers; Modeling and simulation; PCIe considerations; References; 3 Channel modeling and simulation; Transmission Lines; Causality; Checking for Model Causality; Causal Frequency-Dependent Model; Copper Surface Roughness; Modified Hammerstad model; Huray model; Conductivity Environmental ImpactHumidity; Conductivity; Temperature; Model and simulation; Model Geometries; Stripline structures; Microstrip structures; Corner Models; Iterative corner model; Monte Carlo corner model; Ideal Assumptions: Homogeneous Impedance; Ideal Assumptions: Crosstalk Aggressors; Transmitters; IBIS Models; Spice Voltage Source Model; Linearity test; 3D Modeling; Ports/Terminals; Wave ports; Lumped ports; Model Analysis Settings; Discrete or interpolating solutions; Frequency range and step size; Port order; Normalize result to 50ohms; Plated-Through-Hole Via; Model Techniques Pre-Layout Approximation |
| Record Nr. | UNISA-996426329103316 |
Zhang Hanqiao
|
||
| Waltham, MA : , : Elsevier, , [2015] | ||
| Materiale a stampa | ||
| Lo trovi qui: Univ. di Salerno | ||
| ||
High speed digital design : design of high speed interconnects and signaling / / Hanqiao Zhang, Steve Krooswyk, Jeff Ou
| High speed digital design : design of high speed interconnects and signaling / / Hanqiao Zhang, Steve Krooswyk, Jeff Ou |
| Autore | Zhang Hanqiao |
| Edizione | [First edition.] |
| Pubbl/distr/stampa | Waltham, MA : , : Elsevier, , [2015] |
| Descrizione fisica | 1 online resource (268 p.) |
| Disciplina | 621.398 |
| Soggetto topico |
Digital electronics
Logic design |
| ISBN |
0-12-418667-X
0-12-418663-7 |
| Formato | Materiale a stampa |
| Livello bibliografico | Monografia |
| Lingua di pubblicazione | eng |
| Nota di contenuto |
Front Cover; High Speed Digital Design; Copyright Page; Contents; About the Authors/Contributors; 1 Transmission line fundamentals; Basic Electromagnetics; Electromagnetics Field Theory; Maxwell's equations; Ampere's law; Faraday's law; Gauss's law; Gauss's law for magnetism; Propagation of Plane Waves; Uniform plane wave; Uniform plane wave in conductive media; Power flow and the Poynting vector; Transmission Line Theory; Wave Equations on Lossless Transmission Lines; Lossless transmission line; Wave propagation on a lossless transmission line; Incident waves and reflected waves
Impedance, Reflection Coefficient, and Power Flow on a Lossless Transmission LineInput impedance and reflection coefficient; Power flow on a lossless transmission line; Traveling and Standing Waves on a Transmission Line; Traveling waves; Standing waves; Transmission Line Structures; Stripline; Microstrip; Coplanar Waveguides; Novel Transmission Lines; References; 2 PCB design for signal integrity; Differential Signaling; Impedance; Time Domain Analysis; Eye Diagram; Jitter; Jitter components and budget; Jitter amplification example; Frequency Domain Analysis; Spectral Content; Insertion Loss Integrated Insertion Loss NoiseReturn Loss; S11 nulls; Crosstalk; Crosstalk sum; Integrated Crosstalk; Signal-to-Noise Ratio; Stack-Up Design; Impedance Target (Routing Impedance); Optimal routing impedance; PCB Losses; Dielectric Loss; Lower loss dielectrics; Hybrid stackups; Conductor Loss; Surface roughness; Crosstalk Mitigation through StackUp; Stripline dielectric; Solder mask; Dual Stripline; PCB stackup; Angled routing; Parallelism; Densely Broadside Coupled Dual Stripline; Via Stub Mitigation; Impedance optimization; U-turn via; Back-drilling; Blind and buried via PCB Layout OptimizationLength Matching; Fiber Weave Effect; Crosstalk Reduction; Interleaving; Guard trace; Signal-to-ground ratio; Ground placement; Orthogonal placement; Component (vertical to horizontal) cancellation; Non-Ideal Return Path; Power Integrity; Repeaters; Introduction to re-timers; Introduction to re-drivers; Modeling and simulation; PCIe considerations; References; 3 Channel modeling and simulation; Transmission Lines; Causality; Checking for Model Causality; Causal Frequency-Dependent Model; Copper Surface Roughness; Modified Hammerstad model; Huray model; Conductivity Environmental ImpactHumidity; Conductivity; Temperature; Model and simulation; Model Geometries; Stripline structures; Microstrip structures; Corner Models; Iterative corner model; Monte Carlo corner model; Ideal Assumptions: Homogeneous Impedance; Ideal Assumptions: Crosstalk Aggressors; Transmitters; IBIS Models; Spice Voltage Source Model; Linearity test; 3D Modeling; Ports/Terminals; Wave ports; Lumped ports; Model Analysis Settings; Discrete or interpolating solutions; Frequency range and step size; Port order; Normalize result to 50ohms; Plated-Through-Hole Via; Model Techniques Pre-Layout Approximation |
| Record Nr. | UNINA-9910797582903321 |
|
Zhang Hanqiao
|
||
| Waltham, MA : , : Elsevier, , [2015] | ||
| Materiale a stampa | ||
| Lo trovi qui: Univ. Federico II | ||
| ||
High speed digital design : design of high speed interconnects and signaling / / Hanqiao Zhang, Steve Krooswyk, Jeff Ou
| High speed digital design : design of high speed interconnects and signaling / / Hanqiao Zhang, Steve Krooswyk, Jeff Ou |
| Autore | Zhang Hanqiao |
| Edizione | [First edition.] |
| Pubbl/distr/stampa | Waltham, MA : , : Elsevier, , [2015] |
| Descrizione fisica | 1 online resource (268 p.) |
| Disciplina | 621.398 |
| Soggetto topico |
Digital electronics
Logic design |
| ISBN |
0-12-418667-X
0-12-418663-7 |
| Formato | Materiale a stampa |
| Livello bibliografico | Monografia |
| Lingua di pubblicazione | eng |
| Nota di contenuto |
Front Cover; High Speed Digital Design; Copyright Page; Contents; About the Authors/Contributors; 1 Transmission line fundamentals; Basic Electromagnetics; Electromagnetics Field Theory; Maxwell's equations; Ampere's law; Faraday's law; Gauss's law; Gauss's law for magnetism; Propagation of Plane Waves; Uniform plane wave; Uniform plane wave in conductive media; Power flow and the Poynting vector; Transmission Line Theory; Wave Equations on Lossless Transmission Lines; Lossless transmission line; Wave propagation on a lossless transmission line; Incident waves and reflected waves
Impedance, Reflection Coefficient, and Power Flow on a Lossless Transmission LineInput impedance and reflection coefficient; Power flow on a lossless transmission line; Traveling and Standing Waves on a Transmission Line; Traveling waves; Standing waves; Transmission Line Structures; Stripline; Microstrip; Coplanar Waveguides; Novel Transmission Lines; References; 2 PCB design for signal integrity; Differential Signaling; Impedance; Time Domain Analysis; Eye Diagram; Jitter; Jitter components and budget; Jitter amplification example; Frequency Domain Analysis; Spectral Content; Insertion Loss Integrated Insertion Loss NoiseReturn Loss; S11 nulls; Crosstalk; Crosstalk sum; Integrated Crosstalk; Signal-to-Noise Ratio; Stack-Up Design; Impedance Target (Routing Impedance); Optimal routing impedance; PCB Losses; Dielectric Loss; Lower loss dielectrics; Hybrid stackups; Conductor Loss; Surface roughness; Crosstalk Mitigation through StackUp; Stripline dielectric; Solder mask; Dual Stripline; PCB stackup; Angled routing; Parallelism; Densely Broadside Coupled Dual Stripline; Via Stub Mitigation; Impedance optimization; U-turn via; Back-drilling; Blind and buried via PCB Layout OptimizationLength Matching; Fiber Weave Effect; Crosstalk Reduction; Interleaving; Guard trace; Signal-to-ground ratio; Ground placement; Orthogonal placement; Component (vertical to horizontal) cancellation; Non-Ideal Return Path; Power Integrity; Repeaters; Introduction to re-timers; Introduction to re-drivers; Modeling and simulation; PCIe considerations; References; 3 Channel modeling and simulation; Transmission Lines; Causality; Checking for Model Causality; Causal Frequency-Dependent Model; Copper Surface Roughness; Modified Hammerstad model; Huray model; Conductivity Environmental ImpactHumidity; Conductivity; Temperature; Model and simulation; Model Geometries; Stripline structures; Microstrip structures; Corner Models; Iterative corner model; Monte Carlo corner model; Ideal Assumptions: Homogeneous Impedance; Ideal Assumptions: Crosstalk Aggressors; Transmitters; IBIS Models; Spice Voltage Source Model; Linearity test; 3D Modeling; Ports/Terminals; Wave ports; Lumped ports; Model Analysis Settings; Discrete or interpolating solutions; Frequency range and step size; Port order; Normalize result to 50ohms; Plated-Through-Hole Via; Model Techniques Pre-Layout Approximation |
| Record Nr. | UNINA-9910825865203321 |
|
Zhang Hanqiao
|
||
| Waltham, MA : , : Elsevier, , [2015] | ||
| Materiale a stampa | ||
| Lo trovi qui: Univ. Federico II | ||
| ||