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Hardware and software, verification and testing : third International Haifa Verification Conference, HVC 2007, Haifa, Israel, October 23-25, 2007 : proceedings / / Karen Yorav (editor)
| Hardware and software, verification and testing : third International Haifa Verification Conference, HVC 2007, Haifa, Israel, October 23-25, 2007 : proceedings / / Karen Yorav (editor) |
| Edizione | [1st ed. 2008.] |
| Pubbl/distr/stampa | Berlin, Germany : , : Springer, , [2008] |
| Descrizione fisica | 1 online resource (XII, 267 p.) |
| Disciplina | 004.24 |
| Collana | Programming and Software Engineering |
| Soggetto topico |
Computer input-output equipment
Software architecture Computer programs - Verification |
| Soggetto non controllato |
Verification
Hardware Software |
| ISBN | 3-540-77966-3 |
| Formato | Materiale a stampa  |
| Livello bibliografico | Monografia |
| Lingua di pubblicazione | eng |
| Nota di contenuto | Invited Talks -- Simulation vs. Formal: Absorb What Is Useful; Reject What Is Useless -- Scaling Commercial Verification to Larger Systems -- From Hardware Verification to Software Verification: Re-use and Re-learn -- Where Do Bugs Come from? -- HVC Award -- Symbolic Execution and Model Checking for Testing -- Hardware Verification -- On the Characterization of Until as a Fixed Point Under Clocked Semantics -- Reactivity in SystemC Transaction-Level Models -- Model Checking -- Verifying Parametrised Hardware Designs Via Counter Automata -- How Fast and Fat Is Your Probabilistic Model Checker? An Experimental Performance Comparison -- Dynamic Hardware Verification -- Constraint Patterns and Search Procedures for CP-Based Random Test Generation -- Using Virtual Coverage to Hit Hard-To-Reach Events -- Merging Formal and Testing -- Test Case Generation for Ultimately Periodic Paths -- Dynamic Testing Via Automata Learning -- Formal Verification for Software -- On the Architecture of System Verification Environments -- Exploiting Shared Structure in Software Verification Conditions -- Delayed Nondeterminism in Model Checking Embedded Systems Assembly Code -- A Complete Bounded Model Checking Algorithm for Pushdown Systems -- Software Testing -- Locating Regression Bugs -- The Advantages of Post-Link Code Coverage -- GenUTest: A Unit Test and Mock Aspect Generation Tool. |
| Record Nr. | UNINA-9910483947603321 |
| Berlin, Germany : , : Springer, , [2008] | ||
| Materiale a stampa | ||
| Lo trovi qui: Univ. Federico II | ||
| ||
Hardware and software, verification and testing : third International Haifa Verification Conference, HVC 2007, Haifa, Israel, October 23-25, 2007 : proceedings / / Karen Yorav (editor)
| Hardware and software, verification and testing : third International Haifa Verification Conference, HVC 2007, Haifa, Israel, October 23-25, 2007 : proceedings / / Karen Yorav (editor) |
| Edizione | [1st ed. 2008.] |
| Pubbl/distr/stampa | Berlin, Germany : , : Springer, , [2008] |
| Descrizione fisica | 1 online resource (XII, 267 p.) |
| Disciplina | 004.24 |
| Collana | Programming and Software Engineering |
| Soggetto topico |
Computer input-output equipment
Software architecture Computer programs - Verification |
| Soggetto non controllato |
Verification
Hardware Software |
| ISBN | 3-540-77966-3 |
| Formato | Materiale a stampa |
| Livello bibliografico | Monografia |
| Lingua di pubblicazione | eng |
| Nota di contenuto | Invited Talks -- Simulation vs. Formal: Absorb What Is Useful; Reject What Is Useless -- Scaling Commercial Verification to Larger Systems -- From Hardware Verification to Software Verification: Re-use and Re-learn -- Where Do Bugs Come from? -- HVC Award -- Symbolic Execution and Model Checking for Testing -- Hardware Verification -- On the Characterization of Until as a Fixed Point Under Clocked Semantics -- Reactivity in SystemC Transaction-Level Models -- Model Checking -- Verifying Parametrised Hardware Designs Via Counter Automata -- How Fast and Fat Is Your Probabilistic Model Checker? An Experimental Performance Comparison -- Dynamic Hardware Verification -- Constraint Patterns and Search Procedures for CP-Based Random Test Generation -- Using Virtual Coverage to Hit Hard-To-Reach Events -- Merging Formal and Testing -- Test Case Generation for Ultimately Periodic Paths -- Dynamic Testing Via Automata Learning -- Formal Verification for Software -- On the Architecture of System Verification Environments -- Exploiting Shared Structure in Software Verification Conditions -- Delayed Nondeterminism in Model Checking Embedded Systems Assembly Code -- A Complete Bounded Model Checking Algorithm for Pushdown Systems -- Software Testing -- Locating Regression Bugs -- The Advantages of Post-Link Code Coverage -- GenUTest: A Unit Test and Mock Aspect Generation Tool. |
| Record Nr. | UNISA-996466044003316 |
| Berlin, Germany : , : Springer, , [2008] | ||
| Materiale a stampa | ||
| Lo trovi qui: Univ. di Salerno | ||
| ||