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High Performance Computing [[electronic resource] ] : Third International Symposium, ISHPC 2000 Tokyo, Japan, October 16-18, 2000 Proceedings / / edited by Mateo Valero, Kazuki Joe, Masaru Kitsuregawa, Hidehiko Tanaka
High Performance Computing [[electronic resource] ] : Third International Symposium, ISHPC 2000 Tokyo, Japan, October 16-18, 2000 Proceedings / / edited by Mateo Valero, Kazuki Joe, Masaru Kitsuregawa, Hidehiko Tanaka
Edizione [1st ed. 2000.]
Pubbl/distr/stampa Berlin, Heidelberg : , : Springer Berlin Heidelberg : , : Imprint : Springer, , 2000
Descrizione fisica 1 online resource (XV, 598 p.)
Disciplina 004.3
Collana Lecture Notes in Computer Science
Soggetto topico Microprocessors
Software engineering
Computer programming
Programming languages (Electronic computers)
Algorithms
Computer science—Mathematics
Processor Architectures
Software Engineering/Programming and Operating Systems
Programming Techniques
Programming Languages, Compilers, Interpreters
Algorithm Analysis and Problem Complexity
Mathematics of Computing
ISBN 3-540-39999-2
Formato Materiale a stampa
Livello bibliografico Monografia
Lingua di pubblicazione eng
Nota di contenuto Invited Papers -- Instruction Level Distributed Processing: Adapting to Future Technology -- Macroservers: An Object-Based Programming and Execution Model for Processor-in-Memory Arrays -- The New DRAM Interfaces: SDRAM, RDRAM and Variants -- Blue Gene -- Earth Simulator Project in Japan -- Compilers, Architectures and Evaluation -- Limits of Task-based Parallelism in Irregular Applications -- The Case for Speculative Multithreading on SMT Processors -- Loop Termination Prediction -- Compiler-Directed Cache Assist Adaptivity -- Skewed Data Partition and Alignment Techniques for Compiling Programs on Distributed Memory Multicomputers -- Processor Mechanisms for Software Shard Memory -- An Evaluation of Page Aggregation Technique on Different DSM Systems -- Nanothreads vs. Fibers for the Support of Fine Grain Parallelism on Windows NT/2000 Platforms -- Algorithms, Models and Applications -- Partitioned Parallel Radix Sort -- Transonic Wing Shape Optimization Based on Evolutionary Algorithms -- A Common CFD Platform UPACS -- On Performance Modeling for HPF Applications with ASL -- A “Generalized k-Tree-Based Model to Sub-system Allocation” for Partitionable Multi-dimensional Mesh-Connected Architectures -- An Analytic Model or Communication Latency in Wormhole-Switched k -Ary n -Cube Interconnection Networks with Digit-Reversal Traffic -- Performance Sensitivity of Routing Algorithms to Failures in Networks of Workstations -- Short Papers -- Decentralized Load Balancing in Multi-node Broadcast Schemes for Hypercubes -- Design and Implementation of an Efficient Thread Partitioning Algorithm -- A Flexible Routing Scheme for Networks of Workstations -- Java Bytecode Optimization with Advanced Instruction Folding Mechanism -- Performance Evaluation of a Java Based Chat System -- Multi-node Broadcasting in All-Ported 3-D Wormhole-Routed Torus Using Aggregation-then-Distribution Strategy -- On the Influence of the Selection Function on the Performance of Networks of Workstations -- Combining In-Transit Buffers with Optimized Routing Schemes to Boost the Performance of Networks with Source Routing -- A Comparison of Locality-Based and Recency-Based Replacement Policies -- The Filter Data Cache: A Tour Management Comparison with Related Split Data Cache Schemes Sensitive to Data Localities -- Global Magneto-Hydrodynamic Simulations of Differentially Rotating Accretion Disk by Astrophysical Rotational Plasma Simulator -- Exploring Multi-level Parallelism in Cellular Automata Networks -- Orgel: An Parallel Programming Language with Declarative Communication Streams -- BS?ppp: Functional BSP Programs on Enumerated Vectors -- Ability of Classes of Dataow Schemata with Timing Dependency -- A New Model of Parallel Distributed Genetic Algorithms for Cluster Systems: Dual Individual DGAs -- International Workshop on OpenMP: Experiences and Implementations (WOMPEI) -- An Introduction to OpenMP 2.0 -- Implementation and Evaluation of OpenMP for Hitachi SR8000 -- Performance Evaluation of the Omni OpenMP Compiler -- Leveraging Transparent Data Distribution in OpenMP via User-Level Dynamic Page Migration -- Formalizing OpenMP Performance Properties with ASL -- Automatic Generation of OpenMP Directives and Its Application to Computational Fluid Dynamics Codes -- Coarse-grain Task Parallel Processing Using the OpenMP Backend of the OSCAR Multigrain Parallelizing Compiler -- Impact of OpenMP Optimizations for the MGCG Method -- Quantifying Differences between OpenMP and MPI Using a Large-Scale Application Suite -- International Workshop on Simulation and Visualization (IWSV) -- Large Scale Parallel Direct Numerical Simulation of a Separating Turbulent Boundary Layer Flow over a Flat Plate Using NAL Numerical Wind Tunnel -- Characterization of Disorderd Networks in Vitreous SiO2 and Its Rigidity by Molecular-Dynamics Simulations on Parallel Computers -- Direct Numerical Simulation of Coherent Structure in Turbulent Open-Channel Flows with Heat Transfer -- High Reynolds Number Computation for Turbulent Heat Transfer in a Pipe Flow -- Large-Scale Simulation System and Advanced Photon Research -- Parallelization, Vectorization and Visualization of Large Scale Plasma Particle Simulations and Its Application to Studies of Intense Laser Interactions -- Fast LIC Image Generation Based on Significance Map -- Fast Isosurface Generation Using the Cell-Edge Centered Propagation Algorithm -- Fast Ray-Casting for Irregular Volumes -- A Study on the Effect of Air on the Dynamic Motion of a MEMS Device and Its Shape Optimization -- A Distributed Rendering System “On Demand Rendering System”.
Record Nr. UNISA-996466033603316
Berlin, Heidelberg : , : Springer Berlin Heidelberg : , : Imprint : Springer, , 2000
Materiale a stampa
Lo trovi qui: Univ. di Salerno
Opac: Controlla la disponibilità qui
High Performance Computing : Third International Symposium, ISHPC 2000 Tokyo, Japan, October 16-18, 2000 Proceedings / / edited by Mateo Valero, Kazuki Joe, Masaru Kitsuregawa, Hidehiko Tanaka
High Performance Computing : Third International Symposium, ISHPC 2000 Tokyo, Japan, October 16-18, 2000 Proceedings / / edited by Mateo Valero, Kazuki Joe, Masaru Kitsuregawa, Hidehiko Tanaka
Edizione [1st ed. 2000.]
Pubbl/distr/stampa Berlin, Heidelberg : , : Springer Berlin Heidelberg : , : Imprint : Springer, , 2000
Descrizione fisica 1 online resource (XV, 598 p.)
Disciplina 004.3
Collana Lecture Notes in Computer Science
Soggetto topico Microprocessors
Software engineering
Computer programming
Programming languages (Electronic computers)
Algorithms
Computer science—Mathematics
Processor Architectures
Software Engineering/Programming and Operating Systems
Programming Techniques
Programming Languages, Compilers, Interpreters
Algorithm Analysis and Problem Complexity
Mathematics of Computing
ISBN 3-540-39999-2
Formato Materiale a stampa
Livello bibliografico Monografia
Lingua di pubblicazione eng
Nota di contenuto Invited Papers -- Instruction Level Distributed Processing: Adapting to Future Technology -- Macroservers: An Object-Based Programming and Execution Model for Processor-in-Memory Arrays -- The New DRAM Interfaces: SDRAM, RDRAM and Variants -- Blue Gene -- Earth Simulator Project in Japan -- Compilers, Architectures and Evaluation -- Limits of Task-based Parallelism in Irregular Applications -- The Case for Speculative Multithreading on SMT Processors -- Loop Termination Prediction -- Compiler-Directed Cache Assist Adaptivity -- Skewed Data Partition and Alignment Techniques for Compiling Programs on Distributed Memory Multicomputers -- Processor Mechanisms for Software Shard Memory -- An Evaluation of Page Aggregation Technique on Different DSM Systems -- Nanothreads vs. Fibers for the Support of Fine Grain Parallelism on Windows NT/2000 Platforms -- Algorithms, Models and Applications -- Partitioned Parallel Radix Sort -- Transonic Wing Shape Optimization Based on Evolutionary Algorithms -- A Common CFD Platform UPACS -- On Performance Modeling for HPF Applications with ASL -- A “Generalized k-Tree-Based Model to Sub-system Allocation” for Partitionable Multi-dimensional Mesh-Connected Architectures -- An Analytic Model or Communication Latency in Wormhole-Switched k -Ary n -Cube Interconnection Networks with Digit-Reversal Traffic -- Performance Sensitivity of Routing Algorithms to Failures in Networks of Workstations -- Short Papers -- Decentralized Load Balancing in Multi-node Broadcast Schemes for Hypercubes -- Design and Implementation of an Efficient Thread Partitioning Algorithm -- A Flexible Routing Scheme for Networks of Workstations -- Java Bytecode Optimization with Advanced Instruction Folding Mechanism -- Performance Evaluation of a Java Based Chat System -- Multi-node Broadcasting in All-Ported 3-D Wormhole-Routed Torus Using Aggregation-then-Distribution Strategy -- On the Influence of the Selection Function on the Performance of Networks of Workstations -- Combining In-Transit Buffers with Optimized Routing Schemes to Boost the Performance of Networks with Source Routing -- A Comparison of Locality-Based and Recency-Based Replacement Policies -- The Filter Data Cache: A Tour Management Comparison with Related Split Data Cache Schemes Sensitive to Data Localities -- Global Magneto-Hydrodynamic Simulations of Differentially Rotating Accretion Disk by Astrophysical Rotational Plasma Simulator -- Exploring Multi-level Parallelism in Cellular Automata Networks -- Orgel: An Parallel Programming Language with Declarative Communication Streams -- BS?ppp: Functional BSP Programs on Enumerated Vectors -- Ability of Classes of Dataow Schemata with Timing Dependency -- A New Model of Parallel Distributed Genetic Algorithms for Cluster Systems: Dual Individual DGAs -- International Workshop on OpenMP: Experiences and Implementations (WOMPEI) -- An Introduction to OpenMP 2.0 -- Implementation and Evaluation of OpenMP for Hitachi SR8000 -- Performance Evaluation of the Omni OpenMP Compiler -- Leveraging Transparent Data Distribution in OpenMP via User-Level Dynamic Page Migration -- Formalizing OpenMP Performance Properties with ASL -- Automatic Generation of OpenMP Directives and Its Application to Computational Fluid Dynamics Codes -- Coarse-grain Task Parallel Processing Using the OpenMP Backend of the OSCAR Multigrain Parallelizing Compiler -- Impact of OpenMP Optimizations for the MGCG Method -- Quantifying Differences between OpenMP and MPI Using a Large-Scale Application Suite -- International Workshop on Simulation and Visualization (IWSV) -- Large Scale Parallel Direct Numerical Simulation of a Separating Turbulent Boundary Layer Flow over a Flat Plate Using NAL Numerical Wind Tunnel -- Characterization of Disorderd Networks in Vitreous SiO2 and Its Rigidity by Molecular-Dynamics Simulations on Parallel Computers -- Direct Numerical Simulation of Coherent Structure in Turbulent Open-Channel Flows with Heat Transfer -- High Reynolds Number Computation for Turbulent Heat Transfer in a Pipe Flow -- Large-Scale Simulation System and Advanced Photon Research -- Parallelization, Vectorization and Visualization of Large Scale Plasma Particle Simulations and Its Application to Studies of Intense Laser Interactions -- Fast LIC Image Generation Based on Significance Map -- Fast Isosurface Generation Using the Cell-Edge Centered Propagation Algorithm -- Fast Ray-Casting for Irregular Volumes -- A Study on the Effect of Air on the Dynamic Motion of a MEMS Device and Its Shape Optimization -- A Distributed Rendering System “On Demand Rendering System”.
Record Nr. UNINA-9910143606603321
Berlin, Heidelberg : , : Springer Berlin Heidelberg : , : Imprint : Springer, , 2000
Materiale a stampa
Lo trovi qui: Univ. Federico II
Opac: Controlla la disponibilità qui
High Performance Computing - HiPC 2000 [[electronic resource] ] : 7th International Conference Bangalore, India, December 17-20, 2000 Proceedings / / edited by Mateo Valero, Viktor K. Prasanna, Sriram Vajapeyam
High Performance Computing - HiPC 2000 [[electronic resource] ] : 7th International Conference Bangalore, India, December 17-20, 2000 Proceedings / / edited by Mateo Valero, Viktor K. Prasanna, Sriram Vajapeyam
Edizione [1st ed. 2000.]
Pubbl/distr/stampa Berlin, Heidelberg : , : Springer Berlin Heidelberg : , : Imprint : Springer, , 2000
Descrizione fisica 1 online resource (XVIII, 574 p.)
Disciplina 004.3
Collana Lecture Notes in Computer Science
Soggetto topico Microprocessors
Software engineering
Computer organization
Algorithms
Computers
Computer science—Mathematics
Processor Architectures
Software Engineering/Programming and Operating Systems
Computer Systems Organization and Communication Networks
Algorithm Analysis and Problem Complexity
Computation by Abstract Devices
Mathematics of Computing
ISBN 3-540-44467-X
Formato Materiale a stampa
Livello bibliografico Monografia
Lingua di pubblicazione eng
Nota di contenuto System Software -- Charon Message-Passing Toolkit for Scientific Computations -- Dynamic Slicing of Concurrent Programs -- An Efficient Run-Time Scheme for Exploiting Parallelism on Multiprocessor Systems -- Characterization and Enhancement of Static Mapping Heuristics for Heterogeneous Systems -- Algorithms -- Optimal Segmented Scan and Simulation of Reconfigurable Architectures on Fixed Connection Networks -- Reducing False Causality in Causal Message Ordering -- Working-Set Based Adaptive Protocol for Software Distributed Shared Memory -- Evaluation of the Optimal Causal Message Ordering Algorithm -- Register Efficient Mergesorting -- High-Performance Middleware -- Applying Patterns to Improve the Performance of Fault Tolerant CORBA -- Design, Implementation and Performance Evaluation of a High Performance CORBA Group Membership Protocol -- Analyzing the Behavior of Event Dispatching Systems through Simulation -- ParAgent: A Domain-Specific Semi-automatic Parallelization Tool -- Practical Experiences with Java Compilation -- Applications -- Performance Prediction and Analysis of Parallel Out-of-Core Matrix Factorization -- Integration of Task and Data Parallelism: A Coordination-Based Approach -- Parallel and Distributed Computational Fluid Dynamics: Experimental Results and Challenges -- Parallel Congruent Regions on a Mesh-Connected Computer -- Can Scatter Communication Take Advantage of Multidestination Message Passing? -- INVITED SESSION -- Power: A First Class Design Constraint for Future Architectures -- Embedded Computing: New Directions in Architecture and Automation -- Instruction Level Distributed Processing -- Speculative Multithreaded Processors -- Cluster Computing and Its Applications -- A Fast Tree-Based Barrier Synchronization on Switch-Based Irregular Networks -- Experiments with the CHIME Parallel Processing System -- Meta-data Management System for High-Performance Large-Scale Scientific Data Access -- Parallel Sorting Algorithms with Sampling Techniques on Clusters with Processors Running at Different Speeds -- Evaluation of an Adaptive Scheduling Strategy for Master-Worker Applications on Clusters of Workstations -- Architecture -- Multi-dimensional Selection Techniques for Minimizing Memory Bandwidth in High-Throughput Embedded Systems -- Energy-Aware Instruction Scheduling -- On Message-Dependent Deadlocks in Multiprocessor/Multicomputer Systems -- Memory Consistency and Process Coordination for SPARC Multiprocessors -- Improving Offset Assignment on Embedded Processors Using Transformations -- Applied Parallel Processing -- Improving Parallelism in Asynchronous Reading of an Entire Database -- A Parallel Framework for Explicit FEM -- Analyzing the Parallel Scalability of an Implicit Unstructured Mesh CFD Code -- Process Interconnection Structures in Dynamically Changing Topologies -- Conservative Circuit Simulation on Multiprocessor Machines -- Networks -- Exact Evaluation of Multi-traffic for Wireless PCS Networks with Multi-channel -- Distributed Quality of Service Routing -- Partitioning PCS Networks for Distributed Simulation -- Providing Differentiated Reliable Connections for Real Time Communication in Multihop Networks -- A Multicast Synchronization Protocol for Multiple Distributed Multimedia Streams -- Wireless and Mobile Communciation Systems -- Improving Mobile Computing Performance by Using an Adaptive Distribution Framework -- Optimal Algorithms for Routing in LEO Satellite Networks with ISL -- Data Organization and Retrieval on Parallel Air Channels -- A Weight Based Distributed Clustering Algorithm for Mobile ad hoc Networks -- Large-Scale Data Mining -- A Scalable Approach to Balanced, High-Dimensional Clustering of Market-Baskets -- Dynamic Integration of Decision Committees -- Incremental Mining of Constrained Associations -- Scalable, Distributed and Dynamic Mining of Association Rules.
Record Nr. UNISA-996466178003316
Berlin, Heidelberg : , : Springer Berlin Heidelberg : , : Imprint : Springer, , 2000
Materiale a stampa
Lo trovi qui: Univ. di Salerno
Opac: Controlla la disponibilità qui
High Performance Computing - HiPC 2000 : 7th International Conference Bangalore, India, December 17-20, 2000 Proceedings / / edited by Mateo Valero, Viktor K. Prasanna, Sriram Vajapeyam
High Performance Computing - HiPC 2000 : 7th International Conference Bangalore, India, December 17-20, 2000 Proceedings / / edited by Mateo Valero, Viktor K. Prasanna, Sriram Vajapeyam
Edizione [1st ed. 2000.]
Pubbl/distr/stampa Berlin, Heidelberg : , : Springer Berlin Heidelberg : , : Imprint : Springer, , 2000
Descrizione fisica 1 online resource (XVIII, 574 p.)
Disciplina 004.3
Collana Lecture Notes in Computer Science
Soggetto topico Microprocessors
Software engineering
Computer organization
Algorithms
Computers
Computer science—Mathematics
Processor Architectures
Software Engineering/Programming and Operating Systems
Computer Systems Organization and Communication Networks
Algorithm Analysis and Problem Complexity
Computation by Abstract Devices
Mathematics of Computing
ISBN 3-540-44467-X
Formato Materiale a stampa
Livello bibliografico Monografia
Lingua di pubblicazione eng
Nota di contenuto System Software -- Charon Message-Passing Toolkit for Scientific Computations -- Dynamic Slicing of Concurrent Programs -- An Efficient Run-Time Scheme for Exploiting Parallelism on Multiprocessor Systems -- Characterization and Enhancement of Static Mapping Heuristics for Heterogeneous Systems -- Algorithms -- Optimal Segmented Scan and Simulation of Reconfigurable Architectures on Fixed Connection Networks -- Reducing False Causality in Causal Message Ordering -- Working-Set Based Adaptive Protocol for Software Distributed Shared Memory -- Evaluation of the Optimal Causal Message Ordering Algorithm -- Register Efficient Mergesorting -- High-Performance Middleware -- Applying Patterns to Improve the Performance of Fault Tolerant CORBA -- Design, Implementation and Performance Evaluation of a High Performance CORBA Group Membership Protocol -- Analyzing the Behavior of Event Dispatching Systems through Simulation -- ParAgent: A Domain-Specific Semi-automatic Parallelization Tool -- Practical Experiences with Java Compilation -- Applications -- Performance Prediction and Analysis of Parallel Out-of-Core Matrix Factorization -- Integration of Task and Data Parallelism: A Coordination-Based Approach -- Parallel and Distributed Computational Fluid Dynamics: Experimental Results and Challenges -- Parallel Congruent Regions on a Mesh-Connected Computer -- Can Scatter Communication Take Advantage of Multidestination Message Passing? -- INVITED SESSION -- Power: A First Class Design Constraint for Future Architectures -- Embedded Computing: New Directions in Architecture and Automation -- Instruction Level Distributed Processing -- Speculative Multithreaded Processors -- Cluster Computing and Its Applications -- A Fast Tree-Based Barrier Synchronization on Switch-Based Irregular Networks -- Experiments with the CHIME Parallel Processing System -- Meta-data Management System for High-Performance Large-Scale Scientific Data Access -- Parallel Sorting Algorithms with Sampling Techniques on Clusters with Processors Running at Different Speeds -- Evaluation of an Adaptive Scheduling Strategy for Master-Worker Applications on Clusters of Workstations -- Architecture -- Multi-dimensional Selection Techniques for Minimizing Memory Bandwidth in High-Throughput Embedded Systems -- Energy-Aware Instruction Scheduling -- On Message-Dependent Deadlocks in Multiprocessor/Multicomputer Systems -- Memory Consistency and Process Coordination for SPARC Multiprocessors -- Improving Offset Assignment on Embedded Processors Using Transformations -- Applied Parallel Processing -- Improving Parallelism in Asynchronous Reading of an Entire Database -- A Parallel Framework for Explicit FEM -- Analyzing the Parallel Scalability of an Implicit Unstructured Mesh CFD Code -- Process Interconnection Structures in Dynamically Changing Topologies -- Conservative Circuit Simulation on Multiprocessor Machines -- Networks -- Exact Evaluation of Multi-traffic for Wireless PCS Networks with Multi-channel -- Distributed Quality of Service Routing -- Partitioning PCS Networks for Distributed Simulation -- Providing Differentiated Reliable Connections for Real Time Communication in Multihop Networks -- A Multicast Synchronization Protocol for Multiple Distributed Multimedia Streams -- Wireless and Mobile Communciation Systems -- Improving Mobile Computing Performance by Using an Adaptive Distribution Framework -- Optimal Algorithms for Routing in LEO Satellite Networks with ISL -- Data Organization and Retrieval on Parallel Air Channels -- A Weight Based Distributed Clustering Algorithm for Mobile ad hoc Networks -- Large-Scale Data Mining -- A Scalable Approach to Balanced, High-Dimensional Clustering of Market-Baskets -- Dynamic Integration of Decision Committees -- Incremental Mining of Constrained Associations -- Scalable, Distributed and Dynamic Mining of Association Rules.
Record Nr. UNINA-9910143608703321
Berlin, Heidelberg : , : Springer Berlin Heidelberg : , : Imprint : Springer, , 2000
Materiale a stampa
Lo trovi qui: Univ. Federico II
Opac: Controlla la disponibilità qui
High Performance Embedded Architectures and Compilers [[electronic resource] ] : First International Conference, HiPEAC 2005, Barcelona, Spain, November 17-18, 2005, Proceedings / / edited by Tom Conte, Nacho Navarro, Wen-mei W. Hwu, Mateo Valero, Theo Ungerer
High Performance Embedded Architectures and Compilers [[electronic resource] ] : First International Conference, HiPEAC 2005, Barcelona, Spain, November 17-18, 2005, Proceedings / / edited by Tom Conte, Nacho Navarro, Wen-mei W. Hwu, Mateo Valero, Theo Ungerer
Edizione [1st ed. 2005.]
Pubbl/distr/stampa Berlin, Heidelberg : , : Springer Berlin Heidelberg : , : Imprint : Springer, , 2005
Descrizione fisica 1 online resource (XIV, 318 p.)
Disciplina 004
Collana Theoretical Computer Science and General Issues
Soggetto topico Computer arithmetic and logic units
Computer systems
Compilers (Computer programs)
Computer input-output equipment
Logic design
Microprocessors
Computer architecture
Arithmetic and Logic Structures
Computer System Implementation
Compilers and Interpreters
Input/Output and Data Communications
Logic Design
Processor Architectures
Classificazione 54.31
Formato Materiale a stampa
Livello bibliografico Monografia
Lingua di pubblicazione eng
Nota di contenuto Invited Program -- Keynote 1: Using EEMBC Benchmarks to Understand Processor Behavior in Embedded Applications -- Keynote 2: The Chip-Multiprocessing Paradigm Shift: Opportunities and Challenges -- Software Defined Radio – A High Performance Embedded Challenge -- I Analysis and Evaluation Techniques -- A Practical Method for Quickly Evaluating Program Optimizations -- Efficient Sampling Startup for Sampled Processor Simulation -- Enhancing Network Processor Simulation Speed with Statistical Input Sampling -- II Novel Memory and Interconnect Architectures -- Power Aware External Bus Arbitration for System-on-a-Chip Embedded Systems -- Beyond Basic Region Caching: Specializing Cache Structures for High Performance and Energy Conservation -- Streaming Sparse Matrix Compression/Decompression -- XAMM: A High-Performance Automatic Memory Management System with Memory-Constrained Designs -- III Security Architecture -- Memory-Centric Security Architecture -- A Novel Batch Rekeying Processor Architecture for Secure Multicast Key Management -- Arc3D: A 3D Obfuscation Architecture -- IV Novel Compiler and Runtime Techniques -- Dynamic Code Region (DCR) Based Program Phase Tracking and Prediction for Dynamic Optimizations -- Induction Variable Analysis with Delayed Abstractions -- Garbage Collection Hints -- V DomainSpecificArchitectures -- Exploiting a Computation Reuse Cache to Reduce Energy in Network Processors -- Dynamic Evolution of Congestion Trees: Analysis and Impact on Switch Architecture -- A Single (Unified) Shader GPU Microarchitecture for Embedded Systems -- A Low-Power DSP-Enhanced 32-Bit EISC Processor.
Record Nr. UNISA-996465731103316
Berlin, Heidelberg : , : Springer Berlin Heidelberg : , : Imprint : Springer, , 2005
Materiale a stampa
Lo trovi qui: Univ. di Salerno
Opac: Controlla la disponibilità qui
Network and Parallel Computing [[electronic resource] ] : 15th IFIP WG 10.3 International Conference, NPC 2018, Muroran, Japan, November 29 – December 1, 2018, Proceedings / / edited by Feng Zhang, Jidong Zhai, Marc Snir, Hai Jin, Hironori Kasahara, Mateo Valero
Network and Parallel Computing [[electronic resource] ] : 15th IFIP WG 10.3 International Conference, NPC 2018, Muroran, Japan, November 29 – December 1, 2018, Proceedings / / edited by Feng Zhang, Jidong Zhai, Marc Snir, Hai Jin, Hironori Kasahara, Mateo Valero
Edizione [1st ed. 2018.]
Pubbl/distr/stampa Cham : , : Springer International Publishing : , : Imprint : Springer, , 2018
Descrizione fisica 1 online resource (XII, 192 p. 115 illus., 73 illus. in color.)
Disciplina 004.35
Collana Theoretical Computer Science and General Issues
Soggetto topico Computer engineering
Computer networks
Operating systems (Computers)
Logic design
Image processing—Digital techniques
Computer vision
Artificial intelligence
Data protection
Computer Engineering and Networks
Operating Systems
Logic Design
Computer Imaging, Vision, Pattern Recognition and Graphics
Artificial Intelligence
Data and Information Security
ISBN 3-030-05677-5
Formato Materiale a stampa
Livello bibliografico Monografia
Lingua di pubblicazione eng
Nota di contenuto CNLoc: Channel State Information Assisted Indoor WLAN Localization Using Nomadic Access Points -- ALOR: Adaptive Layout Optimization of Raft Groups for Heterogeneous Distributed Key-Value Stores -- STrieGD: A Sampling Trie Indexed Compression Algorithm for Large-Scale Gene Data -- On Retargeting the AI Programming Framework to New Hardwares -- An Efficient Method For Determining Full Point-to-point Latency Of Arbitrary Indirect HPC Networks -- KT-Store: A Key-Order and Write-Order Hybrid Key-Value Store with High Write and Range-query Performance -- GRAM: A GPU-based Property Graph Traversal and Query for HPC Rich Metadata Management -- GPU-Accelerated Clique Tree Propagation for Pouch Latent Tree Models -- HPC-SFI: System-level Fault Injection for High Performance Computing Systems -- Data Fine-pruning: A Simple Way to Accelerate Neural Network Training -- Balancing the QOS and Security in Dijkstra Algorithm by SDN Technology -- Labeled Network Stack: A Co-Designed Stack for Low Tail-Latency and High Concurrency in Datacenter Services -- A Deep Learning Approach for Network Anomaly Detection based on AMF-LSTM -- FSObserver: A Performance Measurement and Monitoring Tool for Distributed Storage Systems -- vGrouper: Optimizing the Performance of Parallel Jobs in Xen by Increasing Synchronous Execution of Virtual Machines -- Systolic Array Based Accelerator and Algorithm Mapping for Deep Learning Algorithms -- A Fine-grained Performance Bottleneck Analysis Method for HDFS -- Mimir+ : An Optimized Framework of MapReduce on Heterogeneous High-Performance Computing System -- DLIR: An Intermediate Representation for Deep Learning Processors -- GPU Memory Management Solution Supporting Incomplete Pages -- Leveraging Subgraph Extraction for Performance Portable Programming Frameworks on DL Accelerators -- An Intelligent Parking Scheduling Algorithm based on Traffic and Driver Behavior Predictions. .
Record Nr. UNISA-996466459603316
Cham : , : Springer International Publishing : , : Imprint : Springer, , 2018
Materiale a stampa
Lo trovi qui: Univ. di Salerno
Opac: Controlla la disponibilità qui
Network and Parallel Computing : 15th IFIP WG 10.3 International Conference, NPC 2018, Muroran, Japan, November 29 – December 1, 2018, Proceedings / / edited by Feng Zhang, Jidong Zhai, Marc Snir, Hai Jin, Hironori Kasahara, Mateo Valero
Network and Parallel Computing : 15th IFIP WG 10.3 International Conference, NPC 2018, Muroran, Japan, November 29 – December 1, 2018, Proceedings / / edited by Feng Zhang, Jidong Zhai, Marc Snir, Hai Jin, Hironori Kasahara, Mateo Valero
Edizione [1st ed. 2018.]
Pubbl/distr/stampa Cham : , : Springer International Publishing : , : Imprint : Springer, , 2018
Descrizione fisica 1 online resource (XII, 192 p. 115 illus., 73 illus. in color.)
Disciplina 004.35
004.6185
Collana Theoretical Computer Science and General Issues
Soggetto topico Computer engineering
Computer networks
Operating systems (Computers)
Logic design
Image processing—Digital techniques
Computer vision
Artificial intelligence
Data protection
Computer Engineering and Networks
Operating Systems
Logic Design
Computer Imaging, Vision, Pattern Recognition and Graphics
Artificial Intelligence
Data and Information Security
ISBN 3-030-05677-5
Formato Materiale a stampa
Livello bibliografico Monografia
Lingua di pubblicazione eng
Nota di contenuto CNLoc: Channel State Information Assisted Indoor WLAN Localization Using Nomadic Access Points -- ALOR: Adaptive Layout Optimization of Raft Groups for Heterogeneous Distributed Key-Value Stores -- STrieGD: A Sampling Trie Indexed Compression Algorithm for Large-Scale Gene Data -- On Retargeting the AI Programming Framework to New Hardwares -- An Efficient Method For Determining Full Point-to-point Latency Of Arbitrary Indirect HPC Networks -- KT-Store: A Key-Order and Write-Order Hybrid Key-Value Store with High Write and Range-query Performance -- GRAM: A GPU-based Property Graph Traversal and Query for HPC Rich Metadata Management -- GPU-Accelerated Clique Tree Propagation for Pouch Latent Tree Models -- HPC-SFI: System-level Fault Injection for High Performance Computing Systems -- Data Fine-pruning: A Simple Way to Accelerate Neural Network Training -- Balancing the QOS and Security in Dijkstra Algorithm by SDN Technology -- Labeled Network Stack: A Co-Designed Stack for Low Tail-Latency and High Concurrency in Datacenter Services -- A Deep Learning Approach for Network Anomaly Detection based on AMF-LSTM -- FSObserver: A Performance Measurement and Monitoring Tool for Distributed Storage Systems -- vGrouper: Optimizing the Performance of Parallel Jobs in Xen by Increasing Synchronous Execution of Virtual Machines -- Systolic Array Based Accelerator and Algorithm Mapping for Deep Learning Algorithms -- A Fine-grained Performance Bottleneck Analysis Method for HDFS -- Mimir+ : An Optimized Framework of MapReduce on Heterogeneous High-Performance Computing System -- DLIR: An Intermediate Representation for Deep Learning Processors -- GPU Memory Management Solution Supporting Incomplete Pages -- Leveraging Subgraph Extraction for Performance Portable Programming Frameworks on DL Accelerators -- An Intelligent Parking Scheduling Algorithm based on Traffic and Driver Behavior Predictions. .
Record Nr. UNINA-9910349385603321
Cham : , : Springer International Publishing : , : Imprint : Springer, , 2018
Materiale a stampa
Lo trovi qui: Univ. Federico II
Opac: Controlla la disponibilità qui
Parallel Processing: Proceedings of the International Conference Workshops 2001: Valencia, Spain
Parallel Processing: Proceedings of the International Conference Workshops 2001: Valencia, Spain
Autore Ni Lionel M
Pubbl/distr/stampa [Place of publication not identified], : IEEE Computer Society Press, 2001
Formato Materiale a stampa
Livello bibliografico Monografia
Lingua di pubblicazione eng
Record Nr. UNISA-996201415503316
Ni Lionel M  
[Place of publication not identified], : IEEE Computer Society Press, 2001
Materiale a stampa
Lo trovi qui: Univ. di Salerno
Opac: Controlla la disponibilità qui
Parallel Processing: Proceedings of the International Conference Workshops 2001: Valencia, Spain
Parallel Processing: Proceedings of the International Conference Workshops 2001: Valencia, Spain
Autore Ni Lionel M
Pubbl/distr/stampa [Place of publication not identified], : IEEE Computer Society Press, 2001
Formato Materiale a stampa
Livello bibliografico Monografia
Lingua di pubblicazione eng
Record Nr. UNINA-9910872901103321
Ni Lionel M  
[Place of publication not identified], : IEEE Computer Society Press, 2001
Materiale a stampa
Lo trovi qui: Univ. Federico II
Opac: Controlla la disponibilità qui
Proceedings of the 13th International Conference on Supercomputing
Proceedings of the 13th International Conference on Supercomputing
Autore Papatheodorou Theodore
Pubbl/distr/stampa [Place of publication not identified], : ACM, 1999
Descrizione fisica 1 online resource (509 pages)
Collana ACM Conferences
Soggetto topico Engineering & Applied Sciences
Computer Science
Formato Materiale a stampa
Livello bibliografico Monografia
Lingua di pubblicazione eng
Altri titoli varianti ICS '99 the 13th ACM International Conference on Supercomputing, Rhodes, Greece - June 20 - 25, 1999
Record Nr. UNINA-9910376222203321
Papatheodorou Theodore  
[Place of publication not identified], : ACM, 1999
Materiale a stampa
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