Info
- Utilizzare la checkbox di selezione a fianco di ciascun documento per attivare le funzionalità di stampa, invio email, download nei formati disponibili del (i) record.
Mixed analog-digital VLSI devices and technology [[electronic resource] /] / Yannis Tsividis
| Mixed analog-digital VLSI devices and technology [[electronic resource] /] / Yannis Tsividis |
| Autore | Tsividis Yannis |
| Pubbl/distr/stampa | Singapore ; ; River Edge, N.J., : World Scientific, c2002 |
| Descrizione fisica | x, 284 p. : ill |
| Disciplina | 621.39/5 |
| Soggetto topico |
Integrated circuits - Very large scale integration - Design and construction
Integrated circuits - Very large scale integration - Mathematical models Mixed signal circuits |
| Soggetto genere / forma | Electronic books. |
| ISBN | 981-270-384-5 |
| Formato | Materiale a stampa  |
| Livello bibliografico | Monografia |
| Lingua di pubblicazione | eng |
| Nota di contenuto | ch. 1. Introduction: mixed analog-digital chips. 1.1. The role and place of modern mixed analog-digital chips. 1.2. Advantages of mixing analog and digital circuits on the same chip. 1.3. Applications of MAD chips. 1.4. Obstacles in the design of MAD chips. 1.5. The aim and contents of this book -- ch. 2. The MOSFET: introduction and qualitative view. 2.1. Introduction. 2.2. MOS transistor structure. 2.3. Assumptions about terminal voltages, currents, and temperature. 2.4. A qualitative description of MOSFET operation. 2.5. A fluid dynamical analog. 2.6. Complete set of characteristics. 2.7. Form of functional [symbol] dependence: practical limits for regions of inversion. 2.8. Factors affecting the extrapolated threshold voltage. 2.9. Other factors affecting the drain current -- ch. 3. MOSFET DC modeling. 3.1. Introduction. 3.2. DC model for weak and for strong inversion. 3.3. Drain versus source. 3.4. Symmetric models. 3.5. General models and moderate inversion. 3.6. Mobility dependence on gate and substrate bias. 3.7. Temperature effects. 3.8. Small-dimension effects. 3.9. Breakdown. 3.10. The pMOS transistor. 3.11. Device symbols. 3.12. Model accuracy, parameter extraction, and computer simulation -- ch. 4. MOSFET small-signal modeling. 4.1. Introduction. 4.2. Small-signal conductance parameters. 4.3. Expressions for small-signal conductance parameters in weak and in strong inversion. 4.4. Capacitance parameters. 4.5. Intrinsic cutoff frequency and limits of model validity. 4.6. The transistor at very high frequencies. 4.7. Noise. 4.8. General models and moderate inversion. 4.9. Parameter extraction for accurate small-signal modeling. 4.10. Requirements for good CAD models -- ch. 5. Technology and available circuit components. 5.1. Introduction. 5.2. The n-well CMOS process. 5.3. BiCMOS processes. 5.4. Other silicon processes. 5.5. Sensors. 5.6. Trimming. 5.7. Tolerance and matching of electrical parameters. 5.8. Chip size and yield. 5.9. The influence of pads and package -- ch. 6. Layout. 6.1. Introduction. 6.2. Relation of fabricated transistors to layout. 6.3. Transistor geometry and layout. 6.4. Layout for device matching and precision parameter ratios. 6.5. Layout for interference reduction. 6.6. Integrated-circuit design. |
| Record Nr. | UNINA-9910451952803321 |
Tsividis Yannis
|
||
| Singapore ; ; River Edge, N.J., : World Scientific, c2002 | ||
| Materiale a stampa | ||
| Lo trovi qui: Univ. Federico II | ||
| ||
Mixed analog-digital VLSI devices and technology [[electronic resource] /] / Yannis Tsividis
| Mixed analog-digital VLSI devices and technology [[electronic resource] /] / Yannis Tsividis |
| Autore | Tsividis Yannis |
| Pubbl/distr/stampa | Singapore ; ; River Edge, N.J., : World Scientific, c2002 |
| Descrizione fisica | x, 284 p. : ill |
| Disciplina | 621.39/5 |
| Soggetto topico |
Integrated circuits - Very large scale integration - Design and construction
Integrated circuits - Very large scale integration - Mathematical models Mixed signal circuits |
| ISBN | 981-270-384-5 |
| Formato | Materiale a stampa |
| Livello bibliografico | Monografia |
| Lingua di pubblicazione | eng |
| Nota di contenuto | ch. 1. Introduction: mixed analog-digital chips. 1.1. The role and place of modern mixed analog-digital chips. 1.2. Advantages of mixing analog and digital circuits on the same chip. 1.3. Applications of MAD chips. 1.4. Obstacles in the design of MAD chips. 1.5. The aim and contents of this book -- ch. 2. The MOSFET: introduction and qualitative view. 2.1. Introduction. 2.2. MOS transistor structure. 2.3. Assumptions about terminal voltages, currents, and temperature. 2.4. A qualitative description of MOSFET operation. 2.5. A fluid dynamical analog. 2.6. Complete set of characteristics. 2.7. Form of functional [symbol] dependence: practical limits for regions of inversion. 2.8. Factors affecting the extrapolated threshold voltage. 2.9. Other factors affecting the drain current -- ch. 3. MOSFET DC modeling. 3.1. Introduction. 3.2. DC model for weak and for strong inversion. 3.3. Drain versus source. 3.4. Symmetric models. 3.5. General models and moderate inversion. 3.6. Mobility dependence on gate and substrate bias. 3.7. Temperature effects. 3.8. Small-dimension effects. 3.9. Breakdown. 3.10. The pMOS transistor. 3.11. Device symbols. 3.12. Model accuracy, parameter extraction, and computer simulation -- ch. 4. MOSFET small-signal modeling. 4.1. Introduction. 4.2. Small-signal conductance parameters. 4.3. Expressions for small-signal conductance parameters in weak and in strong inversion. 4.4. Capacitance parameters. 4.5. Intrinsic cutoff frequency and limits of model validity. 4.6. The transistor at very high frequencies. 4.7. Noise. 4.8. General models and moderate inversion. 4.9. Parameter extraction for accurate small-signal modeling. 4.10. Requirements for good CAD models -- ch. 5. Technology and available circuit components. 5.1. Introduction. 5.2. The n-well CMOS process. 5.3. BiCMOS processes. 5.4. Other silicon processes. 5.5. Sensors. 5.6. Trimming. 5.7. Tolerance and matching of electrical parameters. 5.8. Chip size and yield. 5.9. The influence of pads and package -- ch. 6. Layout. 6.1. Introduction. 6.2. Relation of fabricated transistors to layout. 6.3. Transistor geometry and layout. 6.4. Layout for device matching and precision parameter ratios. 6.5. Layout for interference reduction. 6.6. Integrated-circuit design. |
| Record Nr. | UNINA-9910778263203321 |
|
Tsividis Yannis
|
||
| Singapore ; ; River Edge, N.J., : World Scientific, c2002 | ||
| Materiale a stampa | ||
| Lo trovi qui: Univ. Federico II | ||
| ||
Mixed analog-digital VLSI devices and technology / / Yannis Tsividis
| Mixed analog-digital VLSI devices and technology / / Yannis Tsividis |
| Autore | Tsividis Yannis |
| Edizione | [1st ed.] |
| Pubbl/distr/stampa | Singapore ; ; River Edge, N.J., : World Scientific, c2002 |
| Descrizione fisica | x, 284 p. : ill |
| Disciplina | 621.39/5 |
| Soggetto topico |
Integrated circuits - Very large scale integration - Design and construction
Integrated circuits - Very large scale integration - Mathematical models Mixed signal circuits |
| ISBN | 981-270-384-5 |
| Formato | Materiale a stampa |
| Livello bibliografico | Monografia |
| Lingua di pubblicazione | eng |
| Nota di contenuto | ch. 1. Introduction: mixed analog-digital chips. 1.1. The role and place of modern mixed analog-digital chips. 1.2. Advantages of mixing analog and digital circuits on the same chip. 1.3. Applications of MAD chips. 1.4. Obstacles in the design of MAD chips. 1.5. The aim and contents of this book -- ch. 2. The MOSFET: introduction and qualitative view. 2.1. Introduction. 2.2. MOS transistor structure. 2.3. Assumptions about terminal voltages, currents, and temperature. 2.4. A qualitative description of MOSFET operation. 2.5. A fluid dynamical analog. 2.6. Complete set of characteristics. 2.7. Form of functional [symbol] dependence: practical limits for regions of inversion. 2.8. Factors affecting the extrapolated threshold voltage. 2.9. Other factors affecting the drain current -- ch. 3. MOSFET DC modeling. 3.1. Introduction. 3.2. DC model for weak and for strong inversion. 3.3. Drain versus source. 3.4. Symmetric models. 3.5. General models and moderate inversion. 3.6. Mobility dependence on gate and substrate bias. 3.7. Temperature effects. 3.8. Small-dimension effects. 3.9. Breakdown. 3.10. The pMOS transistor. 3.11. Device symbols. 3.12. Model accuracy, parameter extraction, and computer simulation -- ch. 4. MOSFET small-signal modeling. 4.1. Introduction. 4.2. Small-signal conductance parameters. 4.3. Expressions for small-signal conductance parameters in weak and in strong inversion. 4.4. Capacitance parameters. 4.5. Intrinsic cutoff frequency and limits of model validity. 4.6. The transistor at very high frequencies. 4.7. Noise. 4.8. General models and moderate inversion. 4.9. Parameter extraction for accurate small-signal modeling. 4.10. Requirements for good CAD models -- ch. 5. Technology and available circuit components. 5.1. Introduction. 5.2. The n-well CMOS process. 5.3. BiCMOS processes. 5.4. Other silicon processes. 5.5. Sensors. 5.6. Trimming. 5.7. Tolerance and matching of electrical parameters. 5.8. Chip size and yield. 5.9. The influence of pads and package -- ch. 6. Layout. 6.1. Introduction. 6.2. Relation of fabricated transistors to layout. 6.3. Transistor geometry and layout. 6.4. Layout for device matching and precision parameter ratios. 6.5. Layout for interference reduction. 6.6. Integrated-circuit design. |
| Record Nr. | UNINA-9910813214303321 |
|
Tsividis Yannis
|
||
| Singapore ; ; River Edge, N.J., : World Scientific, c2002 | ||
| Materiale a stampa | ||
| Lo trovi qui: Univ. Federico II | ||
| ||