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Architecture of Computing Systems - ARCS 2011 [[electronic resource] ] : 24th International Conference, Lake Como, Italy, February 24-25, 2011. Proceedings / / edited by Mladen Berekovic, William Fornaciari, Uwe Brinkschulte, Cristina Silvano
| Architecture of Computing Systems - ARCS 2011 [[electronic resource] ] : 24th International Conference, Lake Como, Italy, February 24-25, 2011. Proceedings / / edited by Mladen Berekovic, William Fornaciari, Uwe Brinkschulte, Cristina Silvano |
| Edizione | [1st ed. 2011.] |
| Pubbl/distr/stampa | Berlin, Heidelberg : , : Springer Berlin Heidelberg : , : Imprint : Springer, , 2011 |
| Descrizione fisica | 1 online resource (XIII, 271 p. 114 illus., 60 illus. in color.) |
| Disciplina | 004.22 |
| Collana | Theoretical Computer Science and General Issues |
| Soggetto topico |
Computer networks
Computer systems Operating systems (Computers) Software engineering Application software Information storage and retrieval systems Computer Communication Networks Computer System Implementation Operating Systems Software Engineering Computer and Information Systems Applications Information Storage and Retrieval |
| Soggetto genere / forma | Kongress. |
| ISBN | 3-642-19137-1 |
| Formato | Materiale a stampa  |
| Livello bibliografico | Monografia |
| Lingua di pubblicazione | eng |
| Record Nr. | UNISA-996466041503316 |
| Berlin, Heidelberg : , : Springer Berlin Heidelberg : , : Imprint : Springer, , 2011 | ||
| Materiale a stampa | ||
| Lo trovi qui: Univ. di Salerno | ||
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Automatic Tuning of Compilers Using Machine Learning [[electronic resource] /] / by Amir H. Ashouri, Gianluca Palermo, John Cavazos, Cristina Silvano
| Automatic Tuning of Compilers Using Machine Learning [[electronic resource] /] / by Amir H. Ashouri, Gianluca Palermo, John Cavazos, Cristina Silvano |
| Autore | Ashouri Amir H |
| Edizione | [1st ed. 2018.] |
| Pubbl/distr/stampa | Cham : , : Springer International Publishing : , : Imprint : Springer, , 2018 |
| Descrizione fisica | 1 online resource (XVII, 118 p. 23 illus., 6 illus. in color.) |
| Disciplina | 005.453 |
| Collana | PoliMI SpringerBriefs |
| Soggetto topico |
Computational intelligence
Programming languages (Electronic computers) Computer simulation Artificial intelligence Computational Intelligence Programming Languages, Compilers, Interpreters Simulation and Modeling Artificial Intelligence |
| ISBN | 3-319-71489-9 |
| Formato | Materiale a stampa |
| Livello bibliografico | Monografia |
| Lingua di pubblicazione | eng |
| Nota di contenuto | Background -- DSE Approach for Compiler Passes -- Addressing the Selection Problem of Passes using ML -- Intermediate Speedup Prediction for the Phase-ordering Problem -- Full-sequence Speedup Prediction for the Phase-ordering Problem -- Concluding Remarks. . |
| Record Nr. | UNINA-9910299586103321 |
Ashouri Amir H
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| Cham : , : Springer International Publishing : , : Imprint : Springer, , 2018 | ||
| Materiale a stampa | ||
| Lo trovi qui: Univ. Federico II | ||
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Near Threshold Computing [[electronic resource] ] : Technology, Methods and Applications / / edited by Michael Hübner, Cristina Silvano
| Near Threshold Computing [[electronic resource] ] : Technology, Methods and Applications / / edited by Michael Hübner, Cristina Silvano |
| Edizione | [1st ed. 2016.] |
| Pubbl/distr/stampa | Cham : , : Springer International Publishing : , : Imprint : Springer, , 2016 |
| Descrizione fisica | 1 online resource (104 p.) |
| Disciplina | 620 |
| Soggetto topico |
Electronic circuits
Microprocessors Circuits and Systems Processor Architectures Electronic Circuits and Devices |
| ISBN | 3-319-23389-0 |
| Formato | Materiale a stampa |
| Livello bibliografico | Monografia |
| Lingua di pubblicazione | eng |
| Nota di contenuto | PART I: NTC opportunities, challenges and limits -- Chapter 1: Extreme Energy Efficiency by Near Threshold Voltage Operation -- Part II Micro-architecture challenges and energy management at NTC -- Chapter2: Many-core Architecture for NTC: Energy Efficiency from the Ground Up -- Chapter 3: Variability-Aware Voltage Island Management for Near-Threshold Voltage Computing With Performance Guarantees -- Part III Memory system design for NTC -- Chapter4: Resizable Data Composer (RDC) Cache: A Near-Threshold Cache tolerating Process Variation Via architectural fault tolerance -- Chapter 5 Memories for NTC. |
| Record Nr. | UNINA-9910254193103321 |
| Cham : , : Springer International Publishing : , : Imprint : Springer, , 2016 | ||
| Materiale a stampa | ||
| Lo trovi qui: Univ. Federico II | ||
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PARMA-DITAM 2014 : proceedings of 5th Workshop on Parallel Programming and Run-Time Management Techniques for Many-Core Architectures : 3rd Workshop on Design Tools and Architectures for Multicore Embedded Computing Platforms : January 20, 2014, Vienna, Au
| PARMA-DITAM 2014 : proceedings of 5th Workshop on Parallel Programming and Run-Time Management Techniques for Many-Core Architectures : 3rd Workshop on Design Tools and Architectures for Multicore Embedded Computing Platforms : January 20, 2014, Vienna, Au |
| Autore | Silvano Cristina |
| Pubbl/distr/stampa | [Place of publication not identified], : ACM, 2014 |
| Descrizione fisica | 1 online resource (45 pages) |
| Collana | ACM Other conferences |
| Soggetto topico |
Engineering & Applied Sciences
Computer Science |
| ISBN | 1-4503-2607-2 |
| Formato | Materiale a stampa |
| Livello bibliografico | Monografia |
| Lingua di pubblicazione | eng |
| Altri titoli varianti |
Parallel Programming and Run-Time Management Techniques for Many-Core Architectures-Design Tools and Architectures for Multicore Embedded Computing Platforms 2014
Proceedings of Workshop on Parallel Programming and Run-Time Management Techniques for Many-Core Architectures and Design Tools and Architectures for Multicore Embedded Computing Platforms PARMA-DITAM '14 5th Workshop on Parallel Programming and Run-Time Management Techniques for Many-core Architectures & 3rd Workshop on Design Tools and Architectures for Multicore Embedded Computing Platforms, Vienna, Austria - January 20 - 20, 2014 |
| Record Nr. | UNINA-9910376384303321 |
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Silvano Cristina
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| [Place of publication not identified], : ACM, 2014 | ||
| Materiale a stampa | ||
| Lo trovi qui: Univ. Federico II | ||
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PASC '23 : Proceedings of the Platform for Advanced Scientific Computing Conference / / Axel Huebl, Cristina Silvano, Timothy Robinson
| PASC '23 : Proceedings of the Platform for Advanced Scientific Computing Conference / / Axel Huebl, Cristina Silvano, Timothy Robinson |
| Autore | Huebl Axel |
| Pubbl/distr/stampa | New York, NY : , : Association for Computing Machinery, , 2023 |
| Descrizione fisica | 1 online resource (274 pages) |
| Disciplina | 511.3 |
| Soggetto topico |
Computational complexity
Computer science |
| Formato | Materiale a stampa |
| Livello bibliografico | Monografia |
| Lingua di pubblicazione | eng |
| Record Nr. | UNINA-9910731402103321 |
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Huebl Axel
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| New York, NY : , : Association for Computing Machinery, , 2023 | ||
| Materiale a stampa | ||
| Lo trovi qui: Univ. Federico II | ||
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Proceedings of the 13th IEEE/ACM International Symposium on Networks-on-Chip / / Paul Bogdan and Cristina Silvano
| Proceedings of the 13th IEEE/ACM International Symposium on Networks-on-Chip / / Paul Bogdan and Cristina Silvano |
| Autore | Bogdan Paul |
| Pubbl/distr/stampa | New York : , : Association for Computing Machinery, , 2019 |
| Descrizione fisica | 1 online resource (various pagings) : illustrations |
| Disciplina | 004.6 |
| Soggetto topico |
Networks on a chip
Computer networks |
| Formato | Materiale a stampa |
| Livello bibliografico | Monografia |
| Lingua di pubblicazione | eng |
| Record Nr. | UNINA-9910412119003321 |
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Bogdan Paul
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| New York : , : Association for Computing Machinery, , 2019 | ||
| Materiale a stampa | ||
| Lo trovi qui: Univ. Federico II | ||
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RAPIDO'12 : proceedings of the 2012 Workshop on Rapid Simulation and Performance Evaluation : Methods and Tools : 23 January, 2012, Paris, France
| RAPIDO'12 : proceedings of the 2012 Workshop on Rapid Simulation and Performance Evaluation : Methods and Tools : 23 January, 2012, Paris, France |
| Autore | Pérez Daniel Gracia |
| Pubbl/distr/stampa | [Place of publication not identified], : ACM, 2012 |
| Descrizione fisica | 1 online resource (44 pages) |
| Collana | ACM Other conferences |
| Soggetto topico |
Engineering & Applied Sciences
Computer Science |
| Formato | Materiale a stampa |
| Livello bibliografico | Monografia |
| Lingua di pubblicazione | eng |
| Altri titoli varianti |
Rapid Simulation and Performance Evaluation'12 : proceedings of the 2012 Workshop on Rapid Simulation and Performance Evaluation : Methods and Tools : 23 January, 2012, Paris, France
Proceedings of the 2012 Workshop on Rapid Simulation and Performance Evaluation: Methods and Tools APIDO '12 Proceedings of the 2012 Workshop on Rapid Simulation and Performance Evaluation: Methods and Tools |
| Record Nr. | UNINA-9910376136803321 |
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Pérez Daniel Gracia
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| [Place of publication not identified], : ACM, 2012 | ||
| Materiale a stampa | ||
| Lo trovi qui: Univ. Federico II | ||
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Transactions on High-Performance Embedded Architectures and Compilers V [[electronic resource] /] / edited by Cristina Silvano, Koen Bertels, Michael Schulte
| Transactions on High-Performance Embedded Architectures and Compilers V [[electronic resource] /] / edited by Cristina Silvano, Koen Bertels, Michael Schulte |
| Edizione | [1st ed. 2019.] |
| Pubbl/distr/stampa | Berlin, Heidelberg : , : Springer Berlin Heidelberg : , : Imprint : Springer, , 2019 |
| Descrizione fisica | 1 online resource (IX, 141 p. 88 illus., 36 illus. in color.) |
| Disciplina | 004.3 |
| Collana | Transactions on High-Performance Embedded Architectures and Compilers |
| Soggetto topico |
Arithmetic and logic units, Computer
Microprogramming Logic design Architecture, Computer Operating systems (Computers) Programming languages (Electronic computers) Arithmetic and Logic Structures Control Structures and Microprogramming Logic Design Computer System Implementation Operating Systems Programming Languages, Compilers, Interpreters |
| ISBN | 3-662-58834-X |
| Formato | Materiale a stampa |
| Livello bibliografico | Monografia |
| Lingua di pubblicazione | eng |
| Nota di contenuto | Efficient Mapping of Streaming Applications for Image Processing on Graphics Cards.-Programmable and Scalable Architecture for Graphics Processing Units -- Circular Buffers with Multiple Overlapping Windows for Cyclic Task Graphs -- A Hardware-Accelerated Estimation-Based Power Profiling Unit. - Enabling Early Power-Aware Embedded Software Design and On-Chip Power Management -- The Abstract Streaming Machine: Compile-Time Performance Modelling of Stream Programs on Heterogeneous Multiprocessors -- Prototyping a Configurable Cache/Scratchpad Memory with Virtualized User-Level RDMA Capability -- A Dynamic Reconfigurable Super-VLIW Architecture for a Fault Tolerant Nanoscale Design. |
| Record Nr. | UNINA-9910337583703321 |
| Berlin, Heidelberg : , : Springer Berlin Heidelberg : , : Imprint : Springer, , 2019 | ||
| Materiale a stampa | ||
| Lo trovi qui: Univ. Federico II | ||
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Transactions on High-Performance Embedded Architectures and Compilers V [[electronic resource] /] / edited by Cristina Silvano, Koen Bertels, Michael Schulte
| Transactions on High-Performance Embedded Architectures and Compilers V [[electronic resource] /] / edited by Cristina Silvano, Koen Bertels, Michael Schulte |
| Edizione | [1st ed. 2019.] |
| Pubbl/distr/stampa | Berlin, Heidelberg : , : Springer Berlin Heidelberg : , : Imprint : Springer, , 2019 |
| Descrizione fisica | 1 online resource (IX, 141 p. 88 illus., 36 illus. in color.) |
| Disciplina | 004.3 |
| Collana | Transactions on High-Performance Embedded Architectures and Compilers |
| Soggetto topico |
Arithmetic and logic units, Computer
Microprogramming Logic design Architecture, Computer Operating systems (Computers) Programming languages (Electronic computers) Arithmetic and Logic Structures Control Structures and Microprogramming Logic Design Computer System Implementation Operating Systems Programming Languages, Compilers, Interpreters |
| ISBN | 3-662-58834-X |
| Formato | Materiale a stampa |
| Livello bibliografico | Monografia |
| Lingua di pubblicazione | eng |
| Nota di contenuto | Efficient Mapping of Streaming Applications for Image Processing on Graphics Cards.-Programmable and Scalable Architecture for Graphics Processing Units -- Circular Buffers with Multiple Overlapping Windows for Cyclic Task Graphs -- A Hardware-Accelerated Estimation-Based Power Profiling Unit. - Enabling Early Power-Aware Embedded Software Design and On-Chip Power Management -- The Abstract Streaming Machine: Compile-Time Performance Modelling of Stream Programs on Heterogeneous Multiprocessors -- Prototyping a Configurable Cache/Scratchpad Memory with Virtualized User-Level RDMA Capability -- A Dynamic Reconfigurable Super-VLIW Architecture for a Fault Tolerant Nanoscale Design. |
| Record Nr. | UNISA-996466429403316 |
| Berlin, Heidelberg : , : Springer Berlin Heidelberg : , : Imprint : Springer, , 2019 | ||
| Materiale a stampa | ||
| Lo trovi qui: Univ. di Salerno | ||
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