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Computer Aided Verification [[electronic resource] ] : 33rd International Conference, CAV 2021, Virtual Event, July 20–23, 2021, Proceedings, Part I / / edited by Alexandra Silva, K. Rustan M. Leino
| Computer Aided Verification [[electronic resource] ] : 33rd International Conference, CAV 2021, Virtual Event, July 20–23, 2021, Proceedings, Part I / / edited by Alexandra Silva, K. Rustan M. Leino |
| Autore | Silva Alexandra |
| Edizione | [1st ed. 2021.] |
| Pubbl/distr/stampa | Cham : , : Springer International Publishing : , : Imprint : Springer, , 2021 |
| Descrizione fisica | 1 online resource (939 p.) |
| Disciplina | 005.1 |
| Altri autori (Persone) | LeinoK. Rustan M |
| Collana | Theoretical Computer Science and General Issues |
| Soggetto topico |
Software engineering
Artificial intelligence Computer science Machine theory Computer simulation Software Engineering Artificial Intelligence Computer Science Logic and Foundations of Programming Formal Languages and Automata Theory Computer Modelling |
| ISBN | 3-030-81685-0 |
| Formato | Materiale a stampa  |
| Livello bibliografico | Monografia |
| Lingua di pubblicazione | eng |
| Nota di contenuto | Invited Papers -- NNrepair: Constraint-based Repair of Neural Network Classifiers -- Balancing automation and control for formal verification of microprocessors -- Algebraic Program Analysis -- Programmable Program Synthesis -- Deductive Synthesis of Programs with Pointers: Techniques, Challenges, Opportunities -- AI Verification -- DNNV: A Framework for Deep Neural Network Verification -- Robustness Verification of Quantum Classifiers -- BDD4BNN: A BDD-based Quantitative Analysis Framework for Binarized Neural Networks -- Automated Safety Verification of Programs Invoking Neural Networks -- Scalable Polyhedral Verification of Recurrent Neural Networks -- Verisig 2.0: Verification of Neural Network Controllers Using Taylor Model Preconditioning -- Robustness Verification of Semantic Segmentation Neural Networks using Relaxed Reachability -- PEREGRiNN: Penalized-Relaxation Greedy Neural Network Verifier -- Concurrency and Blockchain -- Isla: Integrating full-scale ISA semantics and axiomatic concurrency models -- Summing Up Smart Transitions -- Stateless Model Checking under a Reads-Value-From Equivalence -- Gobra: Modular Specification and Verification of Go Programs -- Delay-Bounded Scheduling Without Delay! -- Checking Data-Race Freedom of GPU Kernels, Compositionally -- GenMC: A Model Checker for Weak Memory Models -- Hybrid and Cyber-Physical Systems -- Synthesizing Invariant Barrier Certificates via Difference-of-Convex Programming -- An Iterative Scheme of Safe Reinforcement Learning for Nonlinear Systems via Barrier Certificate Generation -- HybridSynchAADL: Modeling and Formal Analysis of Virtually Synchronous CPSs in AADL -- Computing Bottom SCCs Symbolically Using Transition Guided Reduction -- Implicit Semi-Algebraic Abstraction for Polynomial Dynamical Systems -- IMITATOR 3: Synthesis of timing parameters beyond decidability -- Formally Verified Switching Logic for Recoverability of Aircraft Controller -- SceneChecker: Boosting Scenario Verification using Symmetry Abstractions -- Effective Hybrid System Falsification Using Monte Carlo Tree Search Guided by QB-Robustness -- Fast zone-based algorithms for reachability in pushdown timed automata -- Security -- Verified Cryptographic Code for Everybody -- Not All Bugs Are Created Equal, But Robust Reachability Can Tell The Difference -- A Temporal Logic for Asynchronous Hyperproperties -- Product Programs in the Wild: Retrofitting Program Verifiers to Check Information Flow Security -- Constraint-based Relational Verification -- Pre-Deployment Security Assessment for Cloud Services through Semantic Reasoning -- Synthesis -- Synthesis with Asymptotic Resource Bounds -- Program Sketching by Automatically Generating Mocks from Tests -- Counterexample-Guided Partial Bounding for Recursive Function Synthesis -- PAYNT: A Tool for Inductive Synthesis of Probabilistic Programs -- Adapting Behaviors via Reactive Synthesis -- Causality-based Game Solving. |
| Record Nr. | UNISA-996464498503316 |
Silva Alexandra
|
||
| Cham : , : Springer International Publishing : , : Imprint : Springer, , 2021 | ||
| Materiale a stampa | ||
| Lo trovi qui: Univ. di Salerno | ||
| ||
Computer Aided Verification [[electronic resource] ] : 33rd International Conference, CAV 2021, Virtual Event, July 20–23, 2021, Proceedings, Part II / / edited by Alexandra Silva, K. Rustan M. Leino
| Computer Aided Verification [[electronic resource] ] : 33rd International Conference, CAV 2021, Virtual Event, July 20–23, 2021, Proceedings, Part II / / edited by Alexandra Silva, K. Rustan M. Leino |
| Autore | Silva Alexandra |
| Edizione | [1st ed. 2021.] |
| Pubbl/distr/stampa | Cham : , : Springer International Publishing : , : Imprint : Springer, , 2021 |
| Descrizione fisica | 1 online resource (955 p.) |
| Disciplina | 005.1 |
| Altri autori (Persone) | LeinoK. Rustan M |
| Collana | Theoretical Computer Science and General Issues |
| Soggetto topico |
Software engineering
Machine theory Artificial intelligence Computer science Computer simulation Software Engineering Formal Languages and Automata Theory Artificial Intelligence Computer Science Logic and Foundations of Programming Computer Modelling |
| ISBN | 3-030-81688-5 |
| Formato | Materiale a stampa |
| Livello bibliografico | Monografia |
| Lingua di pubblicazione | eng |
| Nota di contenuto | Complexity and Termination -- Learning Probabilistic Termination Proofs -- Ghost Signals: Verifying Termination of Busy Waiting -- Reflections on Termination of Linear Loops -- Decision Tree Learning in CEGIS-Based Termination Analysis -- ATLAS: Automated Amortised Complexity Analysis of Self-Adjusting Data Structures -- Decision Procedures and Solvers -- Theory Exploration Powered by Deductive Synthesis -- CoqQFBV: A Scalable Certified SMT Quantifier-Free Bit-Vector Solver -- Porous Invariants -- JavaSMT 3: Interacting with SMT Solvers in Java -- Efficient SMT-based Analysis of Failure Propagation -- ToolX : Better Delta Debugging for the SMT-LIBv2 Language and Friends -- Learning Union of Integer Hypercubes with Queries (with applications to monadic decomposition) -- Interpolation and Model Checking for Nonlinear Arithmetic -- An SMT Solver for Regular Expressions and Linear Arithmetic over String Length -- Counting Minimal Unsatisfiable Subsets -- Sound Verification Procedures for Temporal Properties of Infinite-State Systems -- Hardware and Model Checking -- Progress in Certifying Hardware Model Checking Results -- Model-Checking Structured Context-Free Languages -- Model Checking ! -Regular Properties with Decoupled Search -- AIGEN: Random Generation of Symbolic Transition Systems -- GPU Acceleration of Bounded Model Checking with ParaFROST -- Pono: A Flexible and Extensible SMT-based Model Checker -- Logical Foundations -- Towards a Trustworthy Semantics-Based Language Framework via Proof Generation -- Formal Foundations of Fine-Grained Explainability -- Latticed k-Induction with an Application to Probabilistic Programs -- Stochastic Systems -- Runtime Monitors for Markov Decision Processes -- Model Checking Finite-Horizon Markov Chains with Probabilistic Inference -- Enforcing Almost-Sure Reachability in POMDPs -- Rigorous Floating-Point Roundo Error Analysis of Probabilistic Computations -- Model-free Reinforcement Learning for Branching Markov Decision Processes -- Software Verification -- Cameleer: a Deductive Verification Tool for OCaml -- LLMC: Verifying High-Performance Software -- Formally Validating a Practical Verification Condition Generator -- Automatic Generation and Validation of Instruction Encoders and Decoders -- An SMT Encoding of LLVM's Memory Model for Bounded Translation Validation -- Automatically Tailoring Abstract Interpretation to Custom Usage Scenarios -- Functional Correctness of C implementations of Dijkstra's, Kruskal's, and Prim's Algorithms -- Gillian, Part II: Real-World Verification for JavaScript and C -- Debugging Network Reachability with Blocked Paths -- Lower-Bound Synthesis using Loop Specialization and Max-SMT -- Fast Computation of Strong Control Dependencies -- Di y: Inductive Reasoning of Array Programs using Difference Invariants. |
| Record Nr. | UNISA-996464499103316 |
|
Silva Alexandra
|
||
| Cham : , : Springer International Publishing : , : Imprint : Springer, , 2021 | ||
| Materiale a stampa | ||
| Lo trovi qui: Univ. di Salerno | ||
| ||
Computer Aided Verification : 33rd International Conference, CAV 2021, Virtual Event, July 20–23, 2021, Proceedings, Part II / / edited by Alexandra Silva, K. Rustan M. Leino
| Computer Aided Verification : 33rd International Conference, CAV 2021, Virtual Event, July 20–23, 2021, Proceedings, Part II / / edited by Alexandra Silva, K. Rustan M. Leino |
| Autore | Silva Alexandra |
| Edizione | [1st ed. 2021.] |
| Pubbl/distr/stampa | Cham : , : Springer International Publishing : , : Imprint : Springer, , 2021 |
| Descrizione fisica | 1 online resource (955 p.) |
| Disciplina | 005.1 |
| Altri autori (Persone) | LeinoK. Rustan M |
| Collana | Theoretical Computer Science and General Issues |
| Soggetto topico |
Software engineering
Machine theory Artificial intelligence Computer science Computer simulation Software Engineering Formal Languages and Automata Theory Artificial Intelligence Computer Science Logic and Foundations of Programming Computer Modelling |
| ISBN | 3-030-81688-5 |
| Formato | Materiale a stampa |
| Livello bibliografico | Monografia |
| Lingua di pubblicazione | eng |
| Nota di contenuto | Complexity and Termination -- Learning Probabilistic Termination Proofs -- Ghost Signals: Verifying Termination of Busy Waiting -- Reflections on Termination of Linear Loops -- Decision Tree Learning in CEGIS-Based Termination Analysis -- ATLAS: Automated Amortised Complexity Analysis of Self-Adjusting Data Structures -- Decision Procedures and Solvers -- Theory Exploration Powered by Deductive Synthesis -- CoqQFBV: A Scalable Certified SMT Quantifier-Free Bit-Vector Solver -- Porous Invariants -- JavaSMT 3: Interacting with SMT Solvers in Java -- Efficient SMT-based Analysis of Failure Propagation -- ToolX : Better Delta Debugging for the SMT-LIBv2 Language and Friends -- Learning Union of Integer Hypercubes with Queries (with applications to monadic decomposition) -- Interpolation and Model Checking for Nonlinear Arithmetic -- An SMT Solver for Regular Expressions and Linear Arithmetic over String Length -- Counting Minimal Unsatisfiable Subsets -- Sound Verification Procedures for Temporal Properties of Infinite-State Systems -- Hardware and Model Checking -- Progress in Certifying Hardware Model Checking Results -- Model-Checking Structured Context-Free Languages -- Model Checking ! -Regular Properties with Decoupled Search -- AIGEN: Random Generation of Symbolic Transition Systems -- GPU Acceleration of Bounded Model Checking with ParaFROST -- Pono: A Flexible and Extensible SMT-based Model Checker -- Logical Foundations -- Towards a Trustworthy Semantics-Based Language Framework via Proof Generation -- Formal Foundations of Fine-Grained Explainability -- Latticed k-Induction with an Application to Probabilistic Programs -- Stochastic Systems -- Runtime Monitors for Markov Decision Processes -- Model Checking Finite-Horizon Markov Chains with Probabilistic Inference -- Enforcing Almost-Sure Reachability in POMDPs -- Rigorous Floating-Point Roundo Error Analysis of Probabilistic Computations -- Model-free Reinforcement Learning for Branching Markov Decision Processes -- Software Verification -- Cameleer: a Deductive Verification Tool for OCaml -- LLMC: Verifying High-Performance Software -- Formally Validating a Practical Verification Condition Generator -- Automatic Generation and Validation of Instruction Encoders and Decoders -- An SMT Encoding of LLVM's Memory Model for Bounded Translation Validation -- Automatically Tailoring Abstract Interpretation to Custom Usage Scenarios -- Functional Correctness of C implementations of Dijkstra's, Kruskal's, and Prim's Algorithms -- Gillian, Part II: Real-World Verification for JavaScript and C -- Debugging Network Reachability with Blocked Paths -- Lower-Bound Synthesis using Loop Specialization and Max-SMT -- Fast Computation of Strong Control Dependencies -- Di y: Inductive Reasoning of Array Programs using Difference Invariants. |
| Record Nr. | UNINA-9910491853003321 |
|
Silva Alexandra
|
||
| Cham : , : Springer International Publishing : , : Imprint : Springer, , 2021 | ||
| Materiale a stampa | ||
| Lo trovi qui: Univ. Federico II | ||
| ||
Computer Aided Verification : 33rd International Conference, CAV 2021, Virtual Event, July 20–23, 2021, Proceedings, Part I / / edited by Alexandra Silva, K. Rustan M. Leino
| Computer Aided Verification : 33rd International Conference, CAV 2021, Virtual Event, July 20–23, 2021, Proceedings, Part I / / edited by Alexandra Silva, K. Rustan M. Leino |
| Autore | Silva Alexandra |
| Edizione | [1st ed. 2021.] |
| Pubbl/distr/stampa | Cham : , : Springer International Publishing : , : Imprint : Springer, , 2021 |
| Descrizione fisica | 1 online resource (939 p.) |
| Disciplina | 005.1 |
| Altri autori (Persone) | LeinoK. Rustan M |
| Collana | Theoretical Computer Science and General Issues |
| Soggetto topico |
Software engineering
Artificial intelligence Computer science Machine theory Computer simulation Software Engineering Artificial Intelligence Computer Science Logic and Foundations of Programming Formal Languages and Automata Theory Computer Modelling |
| ISBN | 3-030-81685-0 |
| Formato | Materiale a stampa |
| Livello bibliografico | Monografia |
| Lingua di pubblicazione | eng |
| Nota di contenuto | Invited Papers -- NNrepair: Constraint-based Repair of Neural Network Classifiers -- Balancing automation and control for formal verification of microprocessors -- Algebraic Program Analysis -- Programmable Program Synthesis -- Deductive Synthesis of Programs with Pointers: Techniques, Challenges, Opportunities -- AI Verification -- DNNV: A Framework for Deep Neural Network Verification -- Robustness Verification of Quantum Classifiers -- BDD4BNN: A BDD-based Quantitative Analysis Framework for Binarized Neural Networks -- Automated Safety Verification of Programs Invoking Neural Networks -- Scalable Polyhedral Verification of Recurrent Neural Networks -- Verisig 2.0: Verification of Neural Network Controllers Using Taylor Model Preconditioning -- Robustness Verification of Semantic Segmentation Neural Networks using Relaxed Reachability -- PEREGRiNN: Penalized-Relaxation Greedy Neural Network Verifier -- Concurrency and Blockchain -- Isla: Integrating full-scale ISA semantics and axiomatic concurrency models -- Summing Up Smart Transitions -- Stateless Model Checking under a Reads-Value-From Equivalence -- Gobra: Modular Specification and Verification of Go Programs -- Delay-Bounded Scheduling Without Delay! -- Checking Data-Race Freedom of GPU Kernels, Compositionally -- GenMC: A Model Checker for Weak Memory Models -- Hybrid and Cyber-Physical Systems -- Synthesizing Invariant Barrier Certificates via Difference-of-Convex Programming -- An Iterative Scheme of Safe Reinforcement Learning for Nonlinear Systems via Barrier Certificate Generation -- HybridSynchAADL: Modeling and Formal Analysis of Virtually Synchronous CPSs in AADL -- Computing Bottom SCCs Symbolically Using Transition Guided Reduction -- Implicit Semi-Algebraic Abstraction for Polynomial Dynamical Systems -- IMITATOR 3: Synthesis of timing parameters beyond decidability -- Formally Verified Switching Logic for Recoverability of Aircraft Controller -- SceneChecker: Boosting Scenario Verification using Symmetry Abstractions -- Effective Hybrid System Falsification Using Monte Carlo Tree Search Guided by QB-Robustness -- Fast zone-based algorithms for reachability in pushdown timed automata -- Security -- Verified Cryptographic Code for Everybody -- Not All Bugs Are Created Equal, But Robust Reachability Can Tell The Difference -- A Temporal Logic for Asynchronous Hyperproperties -- Product Programs in the Wild: Retrofitting Program Verifiers to Check Information Flow Security -- Constraint-based Relational Verification -- Pre-Deployment Security Assessment for Cloud Services through Semantic Reasoning -- Synthesis -- Synthesis with Asymptotic Resource Bounds -- Program Sketching by Automatically Generating Mocks from Tests -- Counterexample-Guided Partial Bounding for Recursive Function Synthesis -- PAYNT: A Tool for Inductive Synthesis of Probabilistic Programs -- Adapting Behaviors via Reactive Synthesis -- Causality-based Game Solving. |
| Record Nr. | UNINA-9910491852903321 |
|
Silva Alexandra
|
||
| Cham : , : Springer International Publishing : , : Imprint : Springer, , 2021 | ||
| Materiale a stampa | ||
| Lo trovi qui: Univ. Federico II | ||
| ||