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Automated reasoning : third international joint conference, IJCAR 2006, Seattle, WA, USA, August 17-20, 2006 : proceedings / / Ulrich Furbach, Natarajan Shankar (eds.)
Automated reasoning : third international joint conference, IJCAR 2006, Seattle, WA, USA, August 17-20, 2006 : proceedings / / Ulrich Furbach, Natarajan Shankar (eds.)
Edizione [1st ed. 2006.]
Pubbl/distr/stampa Berlin, : Springer, 2006
Descrizione fisica 1 online resource (XVI, 688 p.)
Disciplina 006.3
Altri autori (Persone) FurbachUlrich
ShankarN (Natarajan)
Collana Lecture notes in computer science. Lecture notes in artificial intelligence
LNCS sublibrary. SL 7, Artificial intelligence
Soggetto topico Automatic theorem proving
Computer logic
ISBN 3-540-37188-5
Formato Materiale a stampa
Livello bibliografico Monografia
Lingua di pubblicazione eng
Nota di contenuto Invited Talks -- Mathematical Theory Exploration -- Searching While Keeping a Trace: The Evolution from Satisfiability to Knowledge Compilation -- Representing and Reasoning with Operational Semantics -- Session 1. Proofs -- Flyspeck I: Tame Graphs -- Automatic Construction and Verification of Isotopy Invariants -- Pitfalls of a Full Floating-Point Proof: Example on the Formal Proof of the Veltkamp/Dekker Algorithms -- Using the TPTP Language for Writing Derivations and Finite Interpretations -- Session 2. Search -- Stratified Context Unification Is NP-Complete -- A Logical Characterization of Forward and Backward Chaining in the Inverse Method -- Connection Tableaux with Lazy Paramodulation -- Blocking and Other Enhancements for Bottom-Up Model Generation Methods -- Session 3. System Description 1 -- The MathServe System for Semantic Web Reasoning Services -- System Description: GCLCprover + GeoThms -- A Sufficient Completeness Checker for Linear Order-Sorted Specifications Modulo Axioms -- Extending the TPTP Language to Higher-Order Logic with Automated Parser Generation -- Session 4. Higher-Order Logic -- Extracting Programs from Constructive HOL Proofs Via IZF Set-Theoretic Semantics -- Towards Self-verification of HOL Light -- An Interpretation of Isabelle/HOL in HOL Light -- Combining Type Theory and Untyped Set Theory -- Session 5. Proof Theory -- Cut-Simulation in Impredicative Logics -- Interpolation in Local Theory Extensions -- Canonical Gentzen-Type Calculi with (n,k)-ary Quantifiers -- Dynamic Logic with Non-rigid Functions -- Session 6. System Description 2 -- AProVE 1.2: Automatic Termination Proofs in the Dependency Pair Framework -- CEL — A Polynomial-Time Reasoner for Life Science Ontologies -- FaCT++ Description Logic Reasoner: System Description -- Importing HOL into Isabelle/HOL -- Session 7. Search -- Geometric Resolution: A Proof Procedure Based on Finite Model Search -- A Powerful Technique to Eliminate Isomorphism in Finite Model Search -- Automation of Recursive Path Ordering for Infinite Labelled Rewrite Systems -- Session 8. Proof Theory -- Strong Cut-Elimination Systems for Hudelmaier’s Depth-Bounded Sequent Calculus for Implicational Logic -- Eliminating Redundancy in Higher-Order Unification: A Lightweight Approach -- First-Order Logic with Dependent Types -- Session 9. Proof Checking -- Automating Proofs in Category Theory -- Formal Global Optimisation with Taylor Models -- A Purely Functional Library for Modular Arithmetic and Its Application to Certifying Large Prime Numbers -- Proving Formally the Implementation of an Efficient gcd Algorithm for Polynomials -- Session 10. Combination -- A SAT-Based Decision Procedure for the Subclass of Unrollable List Formulas in ACL2 (SULFA) -- Solving Sparse Linear Constraints -- Inferring Network Invariants Automatically -- A Recursion Combinator for Nominal Datatypes Implemented in Isabelle/HOL -- Session 11. Decision Procedures -- Decidability and Undecidability Results for Nelson-Oppen and Rewrite-Based Decision Procedures -- Verifying Mixed Real-Integer Quantifier Elimination -- Presburger Modal Logic Is PSPACE-Complete -- Tree Automata with Equality Constraints Modulo Equational Theories -- Session 12. CASC-J3 -- CASC-J3 The 3rd IJCAR ATP System Competition -- Session 13. Rewriting -- Matrix Interpretations for Proving Termination of Term Rewriting -- Partial Recursive Functions in Higher-Order Logic -- On the Strength of Proof-Irrelevant Type Theories -- Consistency and Completeness of Rewriting in the Calculus of Constructions -- Session 14. Description Logic -- Specifying and Reasoning About Dynamic Access-Control Policies -- On Keys and Functional Dependencies as First-Class Citizens in Description Logics -- A Resolution-Based Decision Procedure for .
Altri titoli varianti IJCAR 2006
Record Nr. UNINA-9910767562503321
Berlin, : Springer, 2006
Materiale a stampa
Lo trovi qui: Univ. Federico II
Opac: Controlla la disponibilità qui
Integrated formal analysis of timed-triggered ethernet [[electronic resource] /] / Bruno Dutertre, Natarajan Shankar, and Sam Owre
Integrated formal analysis of timed-triggered ethernet [[electronic resource] /] / Bruno Dutertre, Natarajan Shankar, and Sam Owre
Autore Dutertre Bruno
Pubbl/distr/stampa Hampton, Va. : , : National Aeronautics and Space Administration, Langley Research Center, , [2012]
Descrizione fisica 1 online resource (28 pages) : illustrations
Altri autori (Persone) ShankarN (Natarajan)
OwreSam
Collana NASA/CR
Soggetto topico Ethernet
Protocol (computers)
Topology
Computer networks
Time synchronization
Formalism
Mathematical models
Formato Materiale a stampa
Livello bibliografico Monografia
Lingua di pubblicazione eng
Record Nr. UNINA-9910702076503321
Dutertre Bruno  
Hampton, Va. : , : National Aeronautics and Space Administration, Langley Research Center, , [2012]
Materiale a stampa
Lo trovi qui: Univ. Federico II
Opac: Controlla la disponibilità qui
Verified software, theories, tools, experiments : second international conference, VSTTE 2008, Toronto, Canada, October 6-8, 2008 : proceedings / / Natarajan Shankar, Jim Woodcock (editors)
Verified software, theories, tools, experiments : second international conference, VSTTE 2008, Toronto, Canada, October 6-8, 2008 : proceedings / / Natarajan Shankar, Jim Woodcock (editors)
Edizione [1st ed. 2008.]
Pubbl/distr/stampa Berlin, Germany : , : Springer, , [2008]
Descrizione fisica 1 online resource (XII, 263 p.)
Disciplina 005.14
Collana Programming and Software Engineering
Soggetto topico Computer programs - Verification
ISBN 3-540-87873-4
Formato Materiale a stampa
Livello bibliografico Monografia
Lingua di pubblicazione eng
Nota di contenuto Keynote Talks (Abstracts) -- Readable Formal Proofs -- From Verification to Synthesis -- Verification, Least-Fixpoint Checking, Abstraction -- Combining Tests and Proofs -- Logics -- Propositional Dynamic Logic for Recursive Procedures -- Mapped Separation Logic -- Unguessable Atoms: A Logical Foundation for Security -- Combining Domain-Specific and Foundational Logics to Verify Complete Software Systems -- Tools -- JML4: Towards an Industrial Grade IVE for Java and Next Generation Research Platform for JML -- Incremental Benchmarks for Software Verification Tools and Techniques -- Case Studies -- Verified Protection Model of the seL4 Microkernel -- Verification of the Deutsch-Schorr-Waite Marking Algorithm with Modal Logic -- Bounded Verification of Voting Software -- Methodology -- Expression Decomposition in a Rely/Guarantee Context -- A Verification Approach for System-Level Concurrent Programs -- Boogie Meets Regions: A Verification Experience Report -- Flexible Immutability with Frozen Objects -- Verisoft -- The Verisoft Approach to Systems Verification -- Formal Functional Verification of Device Drivers -- Verified Process-Context Switch for C-Programmed Kernels -- Paper from VSTTE 2005 -- Where Is the Value in a Program Verifier?.
Record Nr. UNISA-996465273103316
Berlin, Germany : , : Springer, , [2008]
Materiale a stampa
Lo trovi qui: Univ. di Salerno
Opac: Controlla la disponibilità qui
Verified software, theories, tools, experiments : second international conference, VSTTE 2008, Toronto, Canada, October 6-8, 2008 : proceedings / / Natarajan Shankar, Jim Woodcock (editors)
Verified software, theories, tools, experiments : second international conference, VSTTE 2008, Toronto, Canada, October 6-8, 2008 : proceedings / / Natarajan Shankar, Jim Woodcock (editors)
Edizione [1st ed. 2008.]
Pubbl/distr/stampa Berlin, Germany : , : Springer, , [2008]
Descrizione fisica 1 online resource (XII, 263 p.)
Disciplina 005.14
Collana Programming and Software Engineering
Soggetto topico Computer programs - Verification
ISBN 3-540-87873-4
Formato Materiale a stampa
Livello bibliografico Monografia
Lingua di pubblicazione eng
Nota di contenuto Keynote Talks (Abstracts) -- Readable Formal Proofs -- From Verification to Synthesis -- Verification, Least-Fixpoint Checking, Abstraction -- Combining Tests and Proofs -- Logics -- Propositional Dynamic Logic for Recursive Procedures -- Mapped Separation Logic -- Unguessable Atoms: A Logical Foundation for Security -- Combining Domain-Specific and Foundational Logics to Verify Complete Software Systems -- Tools -- JML4: Towards an Industrial Grade IVE for Java and Next Generation Research Platform for JML -- Incremental Benchmarks for Software Verification Tools and Techniques -- Case Studies -- Verified Protection Model of the seL4 Microkernel -- Verification of the Deutsch-Schorr-Waite Marking Algorithm with Modal Logic -- Bounded Verification of Voting Software -- Methodology -- Expression Decomposition in a Rely/Guarantee Context -- A Verification Approach for System-Level Concurrent Programs -- Boogie Meets Regions: A Verification Experience Report -- Flexible Immutability with Frozen Objects -- Verisoft -- The Verisoft Approach to Systems Verification -- Formal Functional Verification of Device Drivers -- Verified Process-Context Switch for C-Programmed Kernels -- Paper from VSTTE 2005 -- Where Is the Value in a Program Verifier?.
Record Nr. UNINA-9910483923703321
Berlin, Germany : , : Springer, , [2008]
Materiale a stampa
Lo trovi qui: Univ. Federico II
Opac: Controlla la disponibilità qui