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Advances in Computer Systems Architecture [[electronic resource] ] : 8th Asia-Pacific Conference, ACSAC 2003, Aizu-Wakamatsu, Japan, September 23-26, 2003, Proceedings / / edited by Amos Omondi, Stanislav Sedukhin
Advances in Computer Systems Architecture [[electronic resource] ] : 8th Asia-Pacific Conference, ACSAC 2003, Aizu-Wakamatsu, Japan, September 23-26, 2003, Proceedings / / edited by Amos Omondi, Stanislav Sedukhin
Edizione [1st ed. 2003.]
Pubbl/distr/stampa Berlin, Heidelberg : , : Springer Berlin Heidelberg : , : Imprint : Springer, , 2003
Descrizione fisica 1 online resource (XIV, 410 p.)
Disciplina 004.2/2
Collana Lecture Notes in Computer Science
Soggetto topico Architecture, Computer
Logic design
Arithmetic and logic units, Computer
Input-output equipment (Computers)
Microprocessors
Computer communication systems
Computer System Implementation
Logic Design
Arithmetic and Logic Structures
Input/Output and Data Communications
Processor Architectures
Computer Communication Networks
ISBN 3-540-39864-3
Formato Materiale a stampa
Livello bibliografico Monografia
Lingua di pubblicazione eng
Nota di contenuto How Can the Earth Simulator Impact on Human Activities -- Toward Architecting and Designing Novel Computers -- Designing Ultra-large Instruction Issue Windows -- Multi-threaded Microprocessors – Evolution or Revolution -- The Development of System Software for Parallel Supercomputers -- Asynchronous Bit-Serial Datapath for Object-Oriented Reconfigurable Architecture PCA -- Reconfigurable Logic: A Saviour for Experimental Computer Architecture Research -- Design and Implementation of Java Processors -- MOOSS: CPU Architecture with Memory Protection and Support for OOP -- Reducing Access Count to Register-Files through Operand Reuse -- SimAlpha Version 1.0: Simple and Readable Alpha Processor Simulator -- Towards an Asynchronous MIPS Processor -- On Implementing High Level Concurrency in Java -- Simultaneous MultiStreaming for Complexity-Effective VLIW Architectures -- A Novel Architecture for Genomic Sequence Searching and Alignment -- A Reconfigurable Multi-threaded Architecture Model -- Reconfigurable Instruction-Level Parallel Processor Architecture -- Mapping Applications to a Coarse Grain Reconfigurable System -- Packing with Boundary Constraints for a Reconfigurable Operating System -- Arithmetic Circuits Combining Residue and Signed-Digit Representations -- A New On-the-fly Summation Algorithm -- State Reordering for Low Power Combinational Logic -- User-Level Management of Kernel Memory -- Variable Radix Page Table: A Page Table for Modern Architectures -- L1 Cache and TLB Enhancements to the RAMpage Memory Hierarchy -- Legba: Fast Hardware Support for Fine-Grained Protection -- Live-Cache: Exploiting Data Redundancy to Reduce Leakage Energy in a Cache Subsystem -- Implementation of Fast Address-Space Switching and TLB Sharing on the StrongARM Processor -- Performance of the Achilles Router -- Latency Improvement in Virtual Multicasting -- A Router Architecture to Achieve Link Rate Throughput in Suburban Ad-hoc Networks.
Record Nr. UNINA-9910144047403321
Berlin, Heidelberg : , : Springer Berlin Heidelberg : , : Imprint : Springer, , 2003
Materiale a stampa
Lo trovi qui: Univ. Federico II
Opac: Controlla la disponibilità qui
Advances in Computer Systems Architecture [[electronic resource] ] : 8th Asia-Pacific Conference, ACSAC 2003, Aizu-Wakamatsu, Japan, September 23-26, 2003, Proceedings / / edited by Amos Omondi, Stanislav Sedukhin
Advances in Computer Systems Architecture [[electronic resource] ] : 8th Asia-Pacific Conference, ACSAC 2003, Aizu-Wakamatsu, Japan, September 23-26, 2003, Proceedings / / edited by Amos Omondi, Stanislav Sedukhin
Edizione [1st ed. 2003.]
Pubbl/distr/stampa Berlin, Heidelberg : , : Springer Berlin Heidelberg : , : Imprint : Springer, , 2003
Descrizione fisica 1 online resource (XIV, 410 p.)
Disciplina 004.2/2
Collana Lecture Notes in Computer Science
Soggetto topico Architecture, Computer
Logic design
Arithmetic and logic units, Computer
Input-output equipment (Computers)
Microprocessors
Computer communication systems
Computer System Implementation
Logic Design
Arithmetic and Logic Structures
Input/Output and Data Communications
Processor Architectures
Computer Communication Networks
ISBN 3-540-39864-3
Formato Materiale a stampa
Livello bibliografico Monografia
Lingua di pubblicazione eng
Nota di contenuto How Can the Earth Simulator Impact on Human Activities -- Toward Architecting and Designing Novel Computers -- Designing Ultra-large Instruction Issue Windows -- Multi-threaded Microprocessors – Evolution or Revolution -- The Development of System Software for Parallel Supercomputers -- Asynchronous Bit-Serial Datapath for Object-Oriented Reconfigurable Architecture PCA -- Reconfigurable Logic: A Saviour for Experimental Computer Architecture Research -- Design and Implementation of Java Processors -- MOOSS: CPU Architecture with Memory Protection and Support for OOP -- Reducing Access Count to Register-Files through Operand Reuse -- SimAlpha Version 1.0: Simple and Readable Alpha Processor Simulator -- Towards an Asynchronous MIPS Processor -- On Implementing High Level Concurrency in Java -- Simultaneous MultiStreaming for Complexity-Effective VLIW Architectures -- A Novel Architecture for Genomic Sequence Searching and Alignment -- A Reconfigurable Multi-threaded Architecture Model -- Reconfigurable Instruction-Level Parallel Processor Architecture -- Mapping Applications to a Coarse Grain Reconfigurable System -- Packing with Boundary Constraints for a Reconfigurable Operating System -- Arithmetic Circuits Combining Residue and Signed-Digit Representations -- A New On-the-fly Summation Algorithm -- State Reordering for Low Power Combinational Logic -- User-Level Management of Kernel Memory -- Variable Radix Page Table: A Page Table for Modern Architectures -- L1 Cache and TLB Enhancements to the RAMpage Memory Hierarchy -- Legba: Fast Hardware Support for Fine-Grained Protection -- Live-Cache: Exploiting Data Redundancy to Reduce Leakage Energy in a Cache Subsystem -- Implementation of Fast Address-Space Switching and TLB Sharing on the StrongARM Processor -- Performance of the Achilles Router -- Latency Improvement in Virtual Multicasting -- A Router Architecture to Achieve Link Rate Throughput in Suburban Ad-hoc Networks.
Record Nr. UNISA-996466063403316
Berlin, Heidelberg : , : Springer Berlin Heidelberg : , : Imprint : Springer, , 2003
Materiale a stampa
Lo trovi qui: Univ. di Salerno
Opac: Controlla la disponibilità qui